JPS62179081A - Binarization circuit - Google Patents

Abstract

PURPOSE:To attain a stable binarization processing in a real time by a simple circuit constitution by constantly stably binarizing a delay video signal in a slice level higher by a specific value from a black level minimum value when the delay video signal and the slice level are inputted to a comparator. CONSTITUTION:The videos signal passing through the delay circuit 5 and the slice level voltage outputted from a capacitor by the charge and the discharge to the capacitor 4 by the video signal through diode train 1 and 2 are compared in the comparator 6. At that time, a bottom part of the black level of the delay video signal is arranged so as to be placed at the central part of the bottom part of the black level of the slice level and as a result of this, the delay video signal is constantly stably sliced and binarized in the slice level higher by the forward droop of potential Vf2 of the backward diode series 2. Thereby, the stable binarization can be performed by the simple circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a binarization circuit, and more specifically, it is used in an optical reading device for reading characters, bar codes, etc. on printed matter. This invention relates to a video signal binarization circuit.

Conventional technology When reading characters, barcodes, etc. on printed matter, characters,
The density level of the barcode line is not constant, and the analog video signal output from the image sensor that detects it changes irregularly, as shown in FIG. 1 of Japanese Patent Publication No. 60-37952.

When converting such video signals into binary format, if you perform black/white binary conversion using a fixed slice level, areas that should be black may become white and lines may be missing, or conversely, areas that should be white may become black and lines may be missing. Sometimes there is a gap. Like that 2
Character recognition or barcode reading based on digitized data results in incorrect recognition or reading.

In order to avoid this, the invention disclosed in the above-mentioned Japanese Patent Publication No. 60-37952 uses a method of performing binarization (slicing) using a plurality of different slice levels and determining the optimal slice level from the results. There is.

Problems to be Solved by the Invention However, such a method requires a plurality of binarization circuits and arithmetic circuits. Furthermore, after first performing 2 (p'l) conversion, it is necessary to store the video signal in a buffer until binarization is performed again using the optimal slice level.

Therefore, the circuit scale becomes extremely large, which increases costs, and real-time processing cannot be realized.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to solve the above problems and provide a binarization circuit that has a simple circuit configuration and can perform stable binarization processing in real time.

Means for solving the problem, that is, according to the present invention, a delay circuit 5 that receives the video signal A and delays it for a predetermined time, as in the basic configuration of the binarization circuit of the present invention shown in FIG. A forward diode array 1 having at least one diode and a reverse diode array 2 having at least one diode are connected in parallel, and one end is connected to the video signal A.
a capacitor 4 connected to the other end of the diode circuit, one input receives the voltage of the capacitor as a slice level voltage, and the other input receives the delayed video signal B from the delay circuit. There is provided a binarization circuit characterized in that it includes a comparator circuit 6 which outputs a binarized signal.

Note that in FIG. 1, a resistor 3 is additionally connected for current limiting.

Rule J The operation of the above-mentioned binarization circuit according to the present invention will be explained with reference to FIG. In the waveform diagram at the top of FIG. 2, a high voltage level represents white and a low voltage level represents black, the input video signal A is shown as a solid line, and the delayed video signal B delayed by the delay circuit 5 is shown as a dashed line. The slice level obtained by the capacitor 4 is shown by a broken line. The waveform diagram at the bottom of FIG. 2 shows the binarized signal output from the comparator circuit 6.

First, when the video signal is at a high voltage level, the voltage is the forward potential drop V r + of the forward diode string 1.
If larger, forward diode string 1 is on (conducting)
state, the capacitor 4 is charged, and the potential of the capacitor 4 becomes high. As a result, the voltage of the capacitor 4 becomes a voltage lower than the voltage of the video signal A by the forward potential drop V r l of the forward diode array 1 . At that time, both diode strings are in an off (non-conducting) state, and this state is
This is the state at the left end of the waveform diagram in the upper part of FIG.

From this state, when the input video signal A begins to transition from white to black, the voltage at the slice level is initially held by the capacitor 4. When the level of video signal A decreases further and becomes lower than the held slice level voltage, and the difference becomes greater than the forward potential drop f2 of reverse diode array 2, diode array 2 turns on (
The slice level follows the video signal A at a voltage higher than the video signal A by Vtx and begins to fall.

This state continues until the video signal A drops to the minimum black level (on section 2 in FIG. 2).

When the input video signal A begins to rise from the black minimum level toward white, the diode string 2 is turned off. At this time, diode string 1 is still in the off state. Therefore, the slice level voltage is maintained (both 1.2 in FIG. 2 are off periods).

When the video signal A becomes higher than the slice level voltage and the difference becomes larger than the forward voltage Vr+ of the diode string 1, the diode string 1 turns on.
The slice level follows and starts to rise at a voltage V r + lower than the video signal A. This state continues until the video signal A reaches the maximum value of the white level (on section 1 in FIG. 2).

After that, when the video signal A starts to fall, the diode string l
is turned off again and the slice level voltage is maintained (both 1.2 in FIG. 2 are off periods).

As a result, as can be seen from FIG. 2, the slice level follows the input video signal A with a delay of time T2 when it falls and by time T when it rises. This time T,,T, is,
It is determined by the slope of the video signal and the forward voltages Vr+, vr2 of the diode string 1.2.

Now, set Vr+ and Vr2 so that T+>T2, and set the delay time T3 of the delay circuit 5 as T+>T3>T2.
When set so that, as shown in FIG. 2, the bottom part of the black level of the delayed video signal B will be located in the center of the bottom part of the black level of the slice level.

Therefore, if the delayed video signal B and the slice level as described above are input to the comparator circuit 6, the delayed video signal B will always be approximately equal to the minimum value of the black level, as shown in the waveform diagram at the bottom of FIG. It is stably binarized at a slice level higher by vr2.

Embodiment Hereinafter, an embodiment of a binarization circuit according to the present invention will be described with reference to FIG. 3 of the accompanying drawings.

In the binarization circuit shown in FIG. 3, a delay circuit 5 for receiving a video signal includes a matching resistor rl, a delay line 7, and a matching resistor r2 connected in series. The connection between the delay line 7 and the matching resistor r2 is connected to the non-inverting input of the comparison circuit 6, and the other end of the matching resistor r2 is connected to the positive power supply voltage VD+. As the delay line 7, various elements such as impedance coils and surface acoustic wave elements can be used. Further, as the comparison circuit 6, an IC comparator can be used. However, if the output of the comparator IC is an oven collector,
■ Its output and positive supply voltage. Between 0 and several Ω to tens of Ω
Connect a pull-up resistor r3 of approximately

A slice level circuit 9 that supplies a slice level to the inverting input of the comparator circuit 6 has a differential amplifier 8 that receives a video signal and functions as a buffer, and the output of the differential amplifier 8 is connected to a forward diode array l. It is connected to one end of a parallel circuit with the reverse direction diode array 2, and the other end of the parallel circuit is connected to one end of the capacitor 4 and the inverting input of the comparator circuit 6. The other end of the capacitor 4 is grounded.

Note that the current limiting resistor 3 shown in the basic circuit of FIG.
In the binarization circuit shown in FIG. 3, no special provision is made in consideration of the impedance of the line or guide.

In the above binarization circuit, the forward potential drop V f l of the diode array 1 needs to be smaller than the level of the lightest character or barcode to be determined as black. Otherwise the bottom of the black will not be lower than the slice level,
Lines are missing. Further, the forward potential drop vrz of the diode array 2 needs to be smaller than V r +.

This adjustment is easily possible by selecting the number and type of diodes, but if fine adjustment is desired, it is possible to adjust the level of the video signal at the front stage of this circuit, or use a differential amplifier as a comparator. Offset adjustment may be performed as shown at 10.

When adjusting the number and type of diodes, the forward potential drop is about 0.7■ for junction diodes and about 0.4■ for Schottky diodes, so by combining them, any forward potential drop can be achieved. The potential drop is 0.
It can be selected with an accuracy of 1■ to 0.3■.

The capacitance of capacitor 4 must be selected depending on the frequency of the video signal, but it is usually a very small value (several tens of pF to
A few hundred pF) may be sufficient, and in some cases, parasitic capacitance may be sufficient.
Sometimes it is not necessary to connect a special capacitor element.

The above-mentioned binarization circuit is used in an optical reader that can read characters, barcodes, etc. on printed matter by illuminating the printed matter with light and using an image sensor to detect the distribution of reflected light from the printed matter. If so, it works as follows.

That is, the video signal that has passed through the delay circuit 5 and the video signal that has passed through the diode arrays 1 and 2 are connected to the capacitor 4.
A comparator circuit 6 compares the slice level voltage output from the capacitor by charging and discharging the capacitor. At that time, the bottom part of the black level of the delayed video signal from the delay circuit 5 is located in the center of the bottom part of the black level of the slice level output from the capacitor, and as a result,
The delayed video signal is always stably sliced and binarized at a slice level higher by the forward potential drop Vr2 of the reverse diode array 2.

Effects of the Invention As described above, the binarization circuit according to the present invention can perform stable binarization with a simple circuit. Therefore, OCR (Opti
Cal Character Reader), BC
It is most suitable for R (BarCode Reader) and the like. In particular, hand-held PO3 (Point
of 5ales) is advantageous for OCR or BCR.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the basic configuration of the binarization circuit according to the present invention, FIG. 2 is a waveform diagram of each part of the binarization circuit in FIG. 1, and FIG. 3 is a circuit diagram showing the basic configuration of the binarization circuit according to the present invention 1 is a circuit diagram of one embodiment of a circuit; FIG. [Main reference numbers] 1.2... Reverse diode array

Claims (4)

[Claims] (1) A delay circuit that receives a video signal and delays it for a predetermined time, a forward diode string having at least one diode, and a reverse diode string having at least one diode are connected in parallel, and one end a diode circuit for receiving the video signal; a capacitor connected to the other end of the diode circuit; one input receiving the voltage of the capacitor as a slice level voltage; and the other input receiving the output of the delay circuit; A binarization circuit comprising: a comparison circuit that outputs a digitized signal. (2) The video signal is a signal output from an image sensor for reading characters, barcodes, etc. on printed matter, and is turned on when the area detected by the image sensor changes from black to white. The peak value of the video signal obtained when the forward voltage of one diode string of the pair of diode strings detects a character or bar code written in the thinnest line that should be detected as black. 2. The binarization circuit according to claim 1, wherein the number of diodes constituting the one diode array or the level of the video signal is adjusted so that the value is smaller than . (3) The forward voltage of the other diode string that is turned on when the video signal changes from white to black in the portion detected by the image sensor is smaller than the forward voltage of the one diode string; 3. The binarization circuit according to claim 2, wherein the number of diodes in the other diode string or the level of the video signal is adjusted. (4) The delay time by the delay circuit is larger than the delay time of the slice level voltage with respect to the video signal that occurs when the video signal changes from white to black, and when the video signal changes from black to white. The binarization circuit according to any one of claims 1 to 3, wherein the value is smaller than a delay time of the resulting slice level with respect to the video signal.