JPS62171241A - Time division multiplex communication system - Google Patents

Time division multiplex communication system

Info

Publication number
JPS62171241A
JPS62171241A JP1277086A JP1277086A JPS62171241A JP S62171241 A JPS62171241 A JP S62171241A JP 1277086 A JP1277086 A JP 1277086A JP 1277086 A JP1277086 A JP 1277086A JP S62171241 A JPS62171241 A JP S62171241A
Authority
JP
Japan
Prior art keywords
communication
channel
packet
communication line
time division
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1277086A
Other languages
Japanese (ja)
Inventor
Kiyoharu Inao
稲生 清春
Toshiki Okuzumi
奥住 俊樹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Priority to JP1277086A priority Critical patent/JPS62171241A/en
Publication of JPS62171241A publication Critical patent/JPS62171241A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To decrease the number of operating channels of time division multi plex communication from 2 channels into one channel while keeping the reliabil ity of a duplicated communication line by adding a different address for each interface adaptor identification to a sending packet and using its identification address so as to discriminate each communication. CONSTITUTION:A packet sending circuit 1 in an equipment ST adds an identification address 1 to a data, when it comes from one communication line L1 and a time division multiplex TDM frame is sent to a time slot of a channel 1. When a data comes from other communication line L2, the packet transmission circuit 1 adds an identification address 2 to shape the packet form and the TDM frame is sent in the time slot of the channel 1. Thus, since which of the duplicated communication lines L1, L2 is to be used depends of the identification address added to the TDM frame, the number of operation channels is decreased from 2 to 1 channel.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、二重化された通信ラインを介して接続された
複数の通信装置間で、時分割多重通信を行なう通信系に
おける時分割多重通信方式に関する。更に詳しくは、本
発明は、二重化された通信ラインで、片側待機状態又は
両側交互使用のような時系列的に同時使用することのな
い通信系におけるチャンネル(タイムスロット)の制御
方式の改善に関するものである。
Detailed Description of the Invention (Industrial Application Field) The present invention relates to a time division multiplex communication method in a communication system that performs time division multiplex communication between a plurality of communication devices connected via a duplex communication line. Regarding. More specifically, the present invention relates to an improvement in a channel (time slot) control method in a communication system where a duplex communication line is not used simultaneously in time series, such as when one side is on standby or both sides are used alternately. It is.

(従来の技術) 第4図は、時分割多重通信系における通信ラインの結合
部を示す構成説明図である。図中、Ll。
(Prior Art) FIG. 4 is a configuration explanatory diagram showing a communication line coupling section in a time division multiplex communication system. In the figure, Ll.

L2は二重化された通信ライン、STは時分割多重通信
装置で、二重化通信ラインとのインターフェイスを受持
つインターフェイスアダプタを含んでおり、二重化通信
ラインLl、 L2に対して、2チヤンネル(タイムス
ロット)を割り当てている。
L2 is a duplex communication line, and ST is a time division multiplex communication device, which includes an interface adapter that interfaces with the duplex communication line, and provides two channels (time slots) for the duplex communication lines Ll and L2. Assigned.

第5図は、この通信系における二重化通信の動作説明図
である。第5図(a)は、通常の動作時においては、一
方の通信ラインL1を使用しており、他方の通信ライン
L2は待機状態となっていて、事故が発生すると、それ
まで待機状態中であった他方の通信ラインL2を使用す
る方式である。第5図(b)は、通信ラインL1とL2
とを、交互に使用し、常に両通信ラインL1とL2のチ
ェ、りを行ない、事故が発生すると正常々通信ラインを
使用する方式である。
FIG. 5 is an explanatory diagram of the operation of duplex communication in this communication system. Figure 5(a) shows that during normal operation, one communication line L1 is used, and the other communication line L2 is in a standby state, and when an accident occurs, it remains in a standby state until then. This method uses the other communication line L2. FIG. 5(b) shows communication lines L1 and L2.
In this system, both communication lines L1 and L2 are used alternately, and both communication lines L1 and L2 are checked at all times, and when an accident occurs, the normal communication line is used.

(発明が解決しようとする問題点) このような従来の通信系においては、各通信装置のイン
ターフェイスアダプタに2チヤンネルが占有され、通信
効率が悪いという問題があった。
(Problems to be Solved by the Invention) In such a conventional communication system, there was a problem in that two channels were occupied by the interface adapter of each communication device, resulting in poor communication efficiency.

本発明は、このような問題点に鑑みてなされたもので、
その目的は、二重化通信ラインの信頼性を保持したまま
で、時分割多重通信の使用チャンネルを2チヤンネルか
ら1チヤンネルに削減することのできる通信方式を提供
しようとするものである。
The present invention was made in view of these problems, and
The purpose is to provide a communication system that can reduce the number of channels used for time division multiplex communication from two channels to one channel while maintaining the reliability of duplex communication lines.

(問題点を解決するための手段) 前記した目的を達成する本発明の構成は、二重化された
通信ラインを介して接続された複数の通信装置間で時分
割多重通信を行なう通信系において、酌記各通信装置と
二重化通信ラインとを結合するインタフェイスアダプタ
は、ライン個々に対応させ、通信チャンネルを同一にし
ており、各々のインタフェイスアダプタ識別のために異
なるアドレスを送出パケ?)K付加し、当該識別アドレ
スにより各々の通信を判別することを特徴とするもので
ある。
(Means for Solving the Problems) The configuration of the present invention that achieves the above-mentioned object is advantageous in a communication system that performs time division multiplex communication between a plurality of communication devices connected via a duplex communication line. The interface adapters that connect each communication device and the redundant communication line correspond to each line, have the same communication channel, and send out different addresses to identify each interface adapter. ) K is added, and each communication is discriminated based on the identification address.

(実施例) 第1図は、本発明の通信方式を適用した装置の構成プロ
、り図である。図において、1はパケット送信回路で、
送信データ(TX DATA )に、識別用アドレスを
付加し、送信パケット形式を整えてパケy ) (TX
 PACKET )を送出する。2はアドレス判別回路
で、自局の識別アドレスが与えられており、受信パケy
 ) (RX PACKET )が自局宛かどう 2かを識別アドレスによって判別する。3は受信バケ2
 ) (RX PACKET )を受信するパケット受
信回路で、アドレス判別回路2より自局宛のパ、ケット
であることを示す検出信号DETを入力し、識別アドレ
スとデータとを分離し、データ(RXDATA )を取
り込む。
(Embodiment) FIG. 1 is a diagram showing the configuration of a device to which the communication method of the present invention is applied. In the figure, 1 is a packet transmission circuit;
An identification address is added to the transmission data (TX DATA), the transmission packet format is adjusted, and the packet is sent to the transmission data (TX DATA).
PACKET). 2 is an address discrimination circuit, which is given the identification address of its own station, and which recognizes the received packet y.
) (RX PACKET) is addressed to the local station (2) based on the identification address. 3 is receiving bucket 2
) (RX PACKET), inputs the detection signal DET indicating that the packet is addressed to the local station from the address discrimination circuit 2, separates the identification address from the data, and reads the data (RXDATA). Incorporate.

第2図は、二重化された通信ラインLl、 L2への結
合部を示す構成概念図である。
FIG. 2 is a conceptual diagram illustrating the connection to the duplexed communication lines L1 and L2.

この構成は、各通信ラインLL、1,2に対して、2チ
ヤンネルが割り当てられている点では、第4図に示すも
のと変らないが、各チャ/ネルに識別アドレスJI、J
Iがそれぞれ設定されている点では異なっている。
This configuration is the same as that shown in FIG. 4 in that two channels are assigned to each communication line LL, 1, 2, but each channel has an identification address JI, J.
They differ in that I is set respectively.

このように構成された装置の動作を、次に第3図のタイ
ムチャートを参照しながら説明する。
The operation of the apparatus configured as described above will now be described with reference to the time chart of FIG.

第2図において、装置ST内のパケット送信回路1は、
@3図(イ)に示すように、一方の通信ラインLlより
データが到来でると、これに識別アドレス(’1’)を
(ハ)に示すように付加し、パケット形式を整え、チャ
ンネル1のタイムス口、トに時分割多重(TDM ) 
7レームを送出する。パケット受信回路3ば、他の装置
において、チャンネル1のタイムス口、トから送出され
たパケットを受信すると、パケットに付加されている識
別アドレスをアドレス判別回路2によって判別し、自i
t宛(=1)の場合、データを取り込む。取り込んだデ
ータは、一方の通信ラインL1’K、第3図に)に示す
ように送出する。
In FIG. 2, the packet transmission circuit 1 in the device ST is
@3 As shown in Figure (A), when data arrives from one communication line Ll, an identification address ('1') is added to it as shown in (C), the packet format is adjusted, and the data is sent to channel 1. time division multiplexing (TDM)
Sends 7 frames. When the packet receiving circuit 3 receives a packet sent from the time slot of channel 1 in another device, the address discriminating circuit 2 determines the identification address added to the packet,
If it is addressed to t (=1), the data is taken in. The captured data is sent out through one communication line L1'K, as shown in FIG. 3).

次K、第3図(ロ)に示すように、他方の通信ラインL
2よりデータが到来すると、パケット送信回路1は、(
ハ)に示すように、識別アドレス(lz#)を付加し、
パケット形式を整え、チャンネル1のタイムス口、トに
TDMフレームを送出する。パケ、ト受信回路3は、他
の装置におけるチャンネル1の受信パケットが自装置宛
(=2)の場合、データを取り込み、今度は通信ライン
L2′に、第3図(ホ)に示すようにこのデータを送出
する。
Next K, as shown in Figure 3 (b), the other communication line L
When data arrives from 2, the packet transmitting circuit 1 transmits (
Add an identification address (lz#) as shown in c),
The packet format is adjusted and the TDM frame is sent to the time slot of channel 1. If the received packet on channel 1 in another device is addressed to the device itself (=2), the packet receiving circuit 3 takes in the data and sends it to the communication line L2' as shown in FIG. 3 (e). Send this data.

以上のように、二重化された通信ラインLL、L2のど
ちらを使用するかを、TDMフレームに識別アドレスを
付加し、この識別アドレスに従って行なうようにしたも
ので、これによって使用チャンネルを2チヤンネルから
1チヤンネルに削減するとともに、チャンネルアクセス
の制御を簡単にしている。
As described above, an identification address is added to the TDM frame to determine which of the duplexed communication lines LL and L2 is to be used, and this is done according to this identification address. This reduces the number of channels and simplifies the control of channel access.

(発明の効果) 以上説明したように、本発明によれば、二重化通信ライ
ンの信頼性を保持したままで、時分割多重通信の使用チ
ャンネルを2チヤンネルから1チヤンネルに削減できる
(Effects of the Invention) As described above, according to the present invention, the number of channels used for time division multiplex communication can be reduced from two channels to one channel while maintaining the reliability of the duplex communication line.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の通信方式を適用した装置の構成プロ
、り図、第2図は通信ラインへの結合部を示す構成概念
図、第3図は動作の一例を示すタイムチャート、第4図
は時分割多重通信系における従来の通信ラインの結合部
を示す構成説明図、第5図はその動作波形図である。 LL、L2・・・二重化通信ライン、1・・・パケット
送信回路、2・・・アドレス判別回路、3・・・バケッ
ト受信回路。 代理人   弁理士  小 沢 信、助 \、(、、) 、ノ′
FIG. 1 is a diagram showing the configuration of a device to which the communication method of the present invention is applied, FIG. FIG. 4 is a configuration explanatory diagram showing a conventional communication line coupling section in a time division multiplex communication system, and FIG. 5 is an operational waveform diagram thereof. LL, L2... Duplex communication line, 1... Packet transmitting circuit, 2... Address discrimination circuit, 3... Bucket receiving circuit. Agent: Patent Attorney Makoto Ozawa, Suke \、(、、)、ノ′

Claims (1)

【特許請求の範囲】[Claims] 二重化された通信ラインを介して接続された複数の通信
装置間で時分割多重通信を行なう通信系において、前記
各通信装置と二重化通信ラインとを結合するインタフェ
イスアダプタは、ライン個々に対応させ、通信チャンネ
ルを同一にしており、各々のインタフェイスアダプタ識
別のために異なるアドレスを送出パケットに付加し、当
該識別アドレスにより各々の通信を判別することを特徴
とする時分割多重通信方式。
In a communication system that performs time-division multiplex communication between a plurality of communication devices connected via a duplex communication line, an interface adapter that connects each communication device and the duplex communication line corresponds to each line, A time division multiplex communication system characterized by using the same communication channel, adding different addresses to outgoing packets to identify each interface adapter, and discriminating each communication based on the identification address.
JP1277086A 1986-01-23 1986-01-23 Time division multiplex communication system Pending JPS62171241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1277086A JPS62171241A (en) 1986-01-23 1986-01-23 Time division multiplex communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1277086A JPS62171241A (en) 1986-01-23 1986-01-23 Time division multiplex communication system

Publications (1)

Publication Number Publication Date
JPS62171241A true JPS62171241A (en) 1987-07-28

Family

ID=11814638

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1277086A Pending JPS62171241A (en) 1986-01-23 1986-01-23 Time division multiplex communication system

Country Status (1)

Country Link
JP (1) JPS62171241A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6276949A (en) * 1985-09-30 1987-04-09 Matsushita Electric Ind Co Ltd Loop network system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6276949A (en) * 1985-09-30 1987-04-09 Matsushita Electric Ind Co Ltd Loop network system

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