JPS6133053A - Exchange device - Google Patents

Abstract

PURPOSE:To attain connection between two terminals with an exchange device which stores a special signal terminal, by using a means which converts alternately the ON/OFF state of the control signal logic between a terminal and the exchange device and the presence/absence of a special signal. CONSTITUTION:The signal existing on an I line 9 of an X.21 interface 34 is produced from the special signal extracted out of the signal on a T line 36 of a special interface 33. Then a high-speed clock is produced according to the signal on a C line 7 of the interface 34. This clock is sent onto an R line 37 of the interface 33. Thus mutual connection is possible between a terminal including a special signal and containing an adaptor 32 and a terminal containing the interface 34.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a switching device that accommodates data terminals, terminals such as FAX (facsimile), and telephones and performs line switching processing.

[Prior art]

An example of the configuration of a conventional switching system is shown in FIG.

In Figure 1, (1) is a terminal equipped with a CCITT Recommendation X.20 interface, (2) is a terminal equipped with a CCITT Recommendation X.21 interface, +41,
+51 are the T line, R line, +61, +71, 181, +91 +(1
0) are the T line, C line of the X/21 interface, respectively.
The R line, T line, and E line are shown. Figure 1 shows the exchange device (
Although only one terminal each of tl+ and +21'e is shown as a representative example, it goes without saying that a plurality of terminals (1) and a plurality of terminals (21) can be connected.

The X.20 interface is used for asynchronous terminals, and the X.21 interface is used for synchronous terminals.

FIG. 2 is an operation time chart showing the signal procedure between the switching device (3) and the terminal (2:) when the terminal (2) equipped with an X.21 interface is the calling party. (old) is ready state, α is call acceptance signal, 03) is call acceptance signal, 04 is selection signal, (IQ is connection completion signal, (1f'9 is communication ready state, (I91 is communication ready signal) show.

In other words, the state where a logic "1" signal is sent on the T line, C line, R line, and ■ line (signal logic "1" on the C line and I line means an off signal) is the ready state. , Setting the signal logic on the T line and C line to "0" from this state means the call request signal θno.

The exchange device (31) that detected the call request signal α sends a call acceptance signal f131' on the R line, and sends this signal to the terminal (2
), the terminal (2) sends a selection signal to the switching device (3:) via the 04kT line. 3), a communication line is set up between both the calling and receiving terminals, and a connection completion signal αυ is sent to both terminals.The switching device (31 immediately thereafter sends a communication ready signal 091). is sent to both terminals, and the calling terminal sends data on the T line and receives data on the R line.

FIG. 3 is an operation time chart showing the signal procedure between the switching device (31) and the terminal (2) when the terminal (21) equipped with the X.21 interface is the called party. The same code indicates the corresponding signal, 171 is the incoming call signal, +1
81 is an incoming call acceptance signal. In other words, the switching device (31) sends an incoming call signal aη onto the R line to the called terminal (2) specified by the selection signal from the calling side, and the called terminal (2) that detects this sends out the incoming call signal aη on the R line. An acceptance signal is sent out, and the exchange device (3) detects this, connects the line, and sends out a connection completion signal 00 and a communicable signal Ql as described above.

Figures 4 and 5 show X-21s that were able to communicate with each other.
2 is an operation time chart showing the signal procedure when two terminals equipped with an interface recover to the ready state (former ready state), where the same symbols as in FIG. 2 indicate corresponding signals, (2α is a recovery request signal, Ql) Recovery confirmation signal, @ is network ready signal, (c) is terminal ready signal, (c) is disconnection instruction signal, (
c) is completed with a disconnection confirmation signal. The examples shown in FIGS. 4 and 5 are cases where the calling terminal side sends out the recovery request signal (2).

At the time the recovery confirmation signal is activated.

Since the line is connected, the signals on the T and C lines of the calling terminal become signals on the R and ■ lines of the called terminal, respectively, and the recovery request signal )
Detected as . When the recovery request signal +20 is detected,
Switching equipment (3) releases all communication lines and sends a recovery confirmation signal 6!1) on the R line and the ■ line, which becomes a network ready signal).
Send out.

When the calling terminal detects the network ready signal, the switching device (3)
The terminal sends a ready signal to enter the ready state.

The called terminal that has detected the disconnection instruction signal (c) sends a disconnection confirmation signal () to the switching device (3). Cut confirmation signal (c)
The switching equipment (3) that detected this sends out a network ready signal (■) on the R line (81), and the called terminal that confirms this outputs a terminal ready signal and enters the ready state.

FIG. 6 is an operation time chart showing the signal procedure between the switching device (3) and the terminal (11) when the terminal (1) equipped with the The same symbols indicate the same signals. In terminal (1), T!, R
When the signal logics on the lines are both "0", it indicates a ready state, and the call acceptance signal 04 is indicated by sending a logic "1" signal onto the T line, and the call acceptance signal (131 is indicated by sending a signal on the Rm Indicated by sending a signal of logic "1".Subsequent selection signal ←◆, connection completion signal α→ transmission and reception, and communication enabled state αQ
The setting can be easily understood from the explanation regarding FIG.

The off-line diagram is an operation time chart shown in the signal section 1@i' between the switching device (31) and the terminal (1) when the terminal (1) equipped with the X.20 interface is the called side,
The same reference numerals as in Fig. 3 indicate corresponding signals, and the incoming call signal 07) is generated by the switching equipment (3) setting the signal logic on the R line to "1", and the incoming call terminal (1) detecting all of these signals. sets the signal logic on the T line to "1" and sends an N call acceptance signal decoy on the T line. The subsequent process can be easily understood from the explanation regarding Figure 73.

Figures 8 and 9 show X-20s that were able to communicate with each other.
5 is an operation time chart showing a signal procedure when two terminals equipped with an interface return to a ready state, in which the same reference numerals as in FIGS. 4 and 5 indicate corresponding signals, and a recovery request signal is sent from the calling terminal side. The case where ■ is sent is shown.

When the calling terminal side sets the signal logic on the T line to "0" and sends out a recovery request signal (201), this signal part is input from the R line via the switching device (31 and switching device (3)) to the called terminal. If the period of logic "0" of this signal continues for 210m5 or more, the side understands that it is not a logic "0" in the data but a signal part, and the called side interprets it as a disconnection instruction signal (c). Yes, old confirmation signal eυ.

The same applies to the disconnection confirmation signal (c), and the subsequent operation can be easily understood from the explanation regarding FIGS. 4 and 5.

By the way, a terminal (1) equipped with an X.20 interface
An adapter is used when a terminal having a conventional V series interface is accommodated in a switching device (3) to which a terminal (2) having an X.21 interface is connected. Figure 10 is a block diagram showing an example of a connection using such an adapter, where (26) is a terminal with a V series interface, (A) is an adapter, and ■ corresponds to (3) in Figure 1. This is a switching device, and the terminal (26) and adapter (c) are connected through a V series interface. Furthermore, if the terminal (26) is an asynchronous terminal,
An X.20 interface can be used to connect the adapter and the exchanger. If the terminal (2h) is a synchronous terminal,
Is it possible to connect the adapter (a) and the exchange device using an X.21 interface? Since the adapter becomes expensive for such a connection, it is recommended to connect it using a special signal interface for economical reasons. is common.

The special signal interface has only T and R lines and is equivalent to the X.20 interface, but in the ready state, both the T and R lines carry a high-speed clock signal ( high frequency pulse train)
The difference is that it sends out . Therefore, the call request signal, call acceptance signal, and incoming call signal are expressed by stopping the transmission of the high-speed clock and setting the signal logic on the signal line to "1". The confirmation signal is expressed by setting the signal logic on the signal line to "0" and starting sending out a high-speed clock.

Figure 11 shows the signaling procedure between the switching equipment and the terminal when a terminal equipped with a special signal interface is the calling party, and Figure 12 shows the signal procedure between the switching equipment and the terminal when the terminal equipped with a special signaling interface is the called party. FIG. 13 and FIG. 14 are operation time charts showing a signal procedure when two terminals equipped with special signal interfaces that were in a mutually communicable state return to a ready state, In these figures, the same symbols as in FIGS. 2 to 5 indicate corresponding states or signals, and (28) is a high-speed clock constituting a special signal.

The operations shown in FIGS. 11 to 14 can be easily understood from the explanations for FIGS. 2 to 5, so their explanation will be omitted.
・Interconnection between terminals equipped with X.21 interface and terminals equipped with special signal interfaces is difficult, and therefore it is difficult to interconnect terminals equipped with X.21 interface and V series synchronous terminals. Ta.

[Summary of the invention]

This invention was made in order to eliminate the drawbacks of the conventional ones as described above, and in this invention, a special signal (high speed clock) extracted from a signal on the T line of the special signal interface is transferred to the I line of the X.21 interface. By creating a signal, generating a high-speed clock according to the signal on the C line of the X.21 interface, and sending it on the R line of the special signal interface, the (including terminals connected to the X.21 interface) and terminals equipped with an X.21 interface.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 15 is a block diagram showing an embodiment of the present invention, and in the figure, +21, +61, +71, +81
, (91, tlol indicates the same reference numeral and the same part in FIG. 1, Ql is a terminal having a synchronous V series interface, 0 is a switching device corresponding to (3; in FIG.
a is an adapter, 0 is a special signal interface, (b)
is the X.21 interface, (to) is the synchronous V series interface, and (b) and 0η are the T and R lines of the special signal interface (to), respectively.

FIG. 16 is a block diagram showing the flow of signals in the switching device 0 of FIG. 15, where the same symbols as in FIG. 15 indicate the same parts or the same signals, θQ is a line adapter for special signal interface, 11) ijT The data and high-speed clock are separated from the signal on the line (to), and the high-speed clock (28
(6) is a signal synthesis device; (6) is a special signal (i.e. 04 is a communication path memory, (c) is a connection control device, (g) is a line adapter for the X/21 interface, 071 is an element timing generator, 0→ is a data signal, 0* is a control signal ,(
7) is a special signal consisting of a high speed clock.

FIG. 17 is a format diagram showing an example of the configuration of the communication path memory shown in FIG. Bits and data bits are transmitted in bit serial form on the T line or R line, converted to bit parallel form by the channel memory (T), and sent to the connection control device (9).
) connections are exchanged.

The data signal (g) output from the signal separator @η is stored as a data bit DO$ in the channel memory,
When a special signal exists on the T-line (2), the control signal (to) that detects it sets the control bit C (to) in the communication path memory to logic "1", and the T-line If there is no special signal on the
-0”. On the other hand, the data signal 6→ on the T line (6) becomes the data bit D, the control signal section on the C line (7) becomes the control bit C9, and the connection control device (c) has two communication path memories @ Since it controls the connection to Keyaki,
The same connection control device as for the connection between two terminals with an X.21 interface may be used.

When the control signal (to) on the C line (7) is logic rlJ, the special signal generator (g) outputs a special signal-sound, and sends it onto the R line (b) via the signal synthesizer (6). .

The terminals □□□ and terminal 12 in FIG. 15 operate at mutually independent timing, and the output of the element timing generator value η is sent to EHO (I+).

〔Effect of the invention〕

As described above, according to the present invention, the control signal functions "1" (off) and "0" (on) on the C line and ■ line between the terminal having the X.21 interface and the switching device, and the special signal TIIj between a terminal having an interface (including a terminal connected to a special signal interface via an adapter) and a switching device, by using means for mutually converting the presence or absence of a special signal on the R line made it possible to connect between

[Brief explanation of drawings]

Figure 1 is a block diagram showing an example of the configuration of a conventional switching system, and Figure 2 is an operating time diagram showing the signaling procedure between the switching equipment and the terminal when the calling party is a terminal equipped with an X.21 interface. When a terminal equipped with an
Figures 4 and 5 show X-21s that were able to communicate with each other.
Figure 6 is an operation time chart showing the signal procedure when two terminals equipped with an interface return to the ready state.
In this case, the year code 111jf between the switching device and the terminal
! Figure 27 is an operation time chart showing the signal procedure between the switching equipment and the terminal when a terminal equipped with an X.20 interface is the called party.
Figures 9 and 9 are operation time charts showing the signal procedure when two terminals equipped with Block diagram showing an example, No. 11
The figure shows an operation time chart showing the signaling procedure between the switching equipment and the terminal when a terminal equipped with a special signal interface is the calling party, and FIG. 12 shows a terminal equipped with a special signal interface when the called party is the called party. , FIG. 13 and FIG. 14 are operation time charts showing the signal procedure when two terminals equipped with special signal interfaces that have been in a mutually communicable state return to a ready state, and FIG. FIG. 16 is a block diagram showing the signal flow in the switching device of FIG. 15, and FIG. 17 is a block diagram showing the example.
FIG. 7 is a format diagram showing an example of the configuration of the communication path memory shown in FIG. 6; (2)...terminal having an X.21 interface, +
61, 171, lsl, (91, lHj...
・Respectively X/21 interface T line, C line, R line, ■ line, E line, (2)...Synchronous V series terminal, 0
1)...exchange device, 0-bar...adapter, (g)...
・T line of special signal interface, (b)...R line of special signal interface, OlS...control bit, wire...data bit, 01...line adapter for special signal interface, el)...・Signal separation device, θ port...Signal synthesis device, (G)...Special signal generation device,
04...Call path memory, )...Connection control device, α
→...Line adapter for X.21 interface. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] X.2 with CCITT Recommendation X.21 interface
1 terminal, which is logically equivalent to the CCITT Recommendation In a switching device accommodating a special signal terminal equipped with a signal interface, a line adapter for the special signal interface provided for connecting the above-mentioned X.21 terminal and the above-mentioned special signal terminal, and a line adapter for the special signal interface provided on the side of the line adapter for the special signal interface. A first communication path memory provided, an X.21 interface line adapter, and a second communication path memory provided on the side of the X.21 interface line adapter, and the special signal interface line adapter When the special signal exists on the T line, the control bit of the first channel memory is set to logic "1", and when the special signal does not exist, the control bit is set to logic "0" to control the connection. The control bit of the second channel memory input through the device is logic "1".
The X.21 interface adapter includes means for sending the special signal on the R line of the interface only when A switching device characterized by comprising means for setting a logic and transmitting the logic of the control bit of the first channel memory input via the connection control device onto the I line of the interface.