JPS62166625A - Pll circuit - Google Patents

Pll circuit

Info

Publication number
JPS62166625A
JPS62166625A JP61009199A JP919986A JPS62166625A JP S62166625 A JPS62166625 A JP S62166625A JP 61009199 A JP61009199 A JP 61009199A JP 919986 A JP919986 A JP 919986A JP S62166625 A JPS62166625 A JP S62166625A
Authority
JP
Japan
Prior art keywords
band
voltage
circuit
voltage controlled
controlled oscillator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61009199A
Other languages
Japanese (ja)
Inventor
Kazumi Kawashima
河島 和美
Makoto Ishida
誠 石田
Tadashi Yamada
忠 山田
Hiroyasu Shinpo
新保 博康
Yuichi Shiotani
塩谷 友一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP61009199A priority Critical patent/JPS62166625A/en
Publication of JPS62166625A publication Critical patent/JPS62166625A/en
Pending legal-status Critical Current

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Superheterodyne Receivers (AREA)

Abstract

PURPOSE:To stop the oscillation of the oscillator circuit of an unnecessary band to reduce unnecessary radiation, by interrupting and conducting the supply voltages of voltage-controlled oscillator circuits for each band in a PLL circuit in corresponding with band selection. CONSTITUTION:Voltage-controlled oscillation circuits 7 and 7' are respectively provided with switching circuits 30 and 31 which are use for interrupting and conducting the application of supply voltages to band switching S1 and S2. Since a transistor 28 is under a conducted state and another transistor 23 is set to a conducted state when a band switching signal S1 is high and another band switching signal S2 is low, and then, the 1st band is selected, a supply voltage is supplied to the voltage-controlled oscillator circuit 7 and the circuit 7 makes oscillating operations. Moreover, transistors 29 and 24 are cut off since the band switching signal S2 is low and, accordingly, no supply voltage is applied across the voltage-controlled oscillator circuit 7'. As a result, the voltage-controlled oscillator circuit 7' is set to a nonoperating state and unnecessary radiation is prevented.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ラジオ受信機やテレビジョン受像機の選局装
置に使用する電圧制御発振回路の制御手段に関するもの
であり、特に、局部発振回路をPLL (位相同期ルー
プ)で構成した多バンドシンセサイザー受信機に用いら
れるPLL回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to control means for voltage controlled oscillation circuits used in channel selection devices for radio receivers and television receivers. The present invention relates to a PLL circuit used in a multiband synthesizer receiver configured with a phase-locked loop (phase-locked loop).

従来の技術 第2図に従来の局部発振回路6をPLL回路で構成した
シンセサイザー受信機の一例を示す。
2. Prior Art FIG. 2 shows an example of a conventional synthesizer receiver in which the local oscillation circuit 6 is constructed from a PLL circuit.

この回路では、放送電波をアンテナ1から取り込み、R
F増巾部2を介して混合器3で局部発根回路6との周波
数差を取り出し、IF増巾部4及び検波回路部6を介し
て希望の信号を得る。
In this circuit, broadcast radio waves are taken in from antenna 1, and R
A mixer 3 extracts the frequency difference from the local rooting circuit 6 via the F amplification section 2, and a desired signal is obtained via the IF amplification section 4 and the detection circuit section 6.

ここで、局部発振回路6は、基準発振回路11と、電圧
制御発振回路7と、その出力を任意の分周比に設定出来
る可変分周器9と、この可変分周器9の出力と基準発振
回路11の出力を比較するだめの位相比較器1oとを備
え、位相比較器1゜の出力をローパスフィルター8を介
して電圧制御発振回路7に加えて制御し、所定の周波数
で発根する出力を得るようにしている。
Here, the local oscillation circuit 6 includes a reference oscillation circuit 11, a voltage controlled oscillation circuit 7, a variable frequency divider 9 whose output can be set to an arbitrary frequency division ratio, and an output of the variable frequency divider 9 and a reference It is equipped with a phase comparator 1o for comparing the output of the oscillation circuit 11, and the output of the phase comparator 1° is added to the voltage controlled oscillation circuit 7 via a low-pass filter 8 to control it and oscillate at a predetermined frequency. I'm trying to get the output.

この可変分周器9はデジタル信号処理をしているため、
電圧制御発振回路7の出力は増巾器を設けて論理レベル
まで増巾する必要がある。
Since this variable frequency divider 9 performs digital signal processing,
The output of the voltage controlled oscillation circuit 7 must be amplified to a logic level by providing an amplifier.

ここで、従来の増巾回路及び多バンド電圧制御発振回路
の切換部を第3図に示す。電圧制御発振回路7,7′の
出力をアナログ増巾部13,14で増巾し、バンド切換
信号S1.S2でゲート回路19 、20及び21を介
して選択し、可変分周回路部22に印加する。ここで、
バンド切換信号S1.S2の信号はスイ・フチング素子
17.18に印加され、電圧制御発振回路7,7′の出
力のうち不要な出力を接地する様に動作させ、不要輻射
を少なくする様に構成されている。
Here, FIG. 3 shows a switching section of a conventional amplification circuit and a multiband voltage controlled oscillation circuit. The outputs of the voltage controlled oscillator circuits 7, 7' are amplified by analog amplifying sections 13, 14, and band switching signals S1. In S2, the signal is selected via the gate circuits 19, 20, and 21 and applied to the variable frequency dividing circuit section 22. here,
Band switching signal S1. The signal S2 is applied to switching elements 17 and 18, which operate to ground unnecessary outputs of the voltage controlled oscillation circuits 7 and 7', thereby reducing unnecessary radiation.

発明が解決しようとする問題点 前述した様に、第2図に示した従来例では、スイッチン
グ素子17.18で不要な電圧制御発振回路出力を接地
して不要輻射を少なくする様に構成しているが、電圧制
御発振回路7,7′の両者ともに発振状態にあり、ここ
から飛び出す不要輻射を遮断する様には構成されていな
い。このため、不要な輻射信号により妨害を生じること
が多いという問題があった。
Problems to be Solved by the Invention As mentioned above, in the conventional example shown in FIG. 2, the switching elements 17 and 18 are configured to ground unnecessary voltage-controlled oscillation circuit outputs to reduce unnecessary radiation. However, both voltage controlled oscillation circuits 7 and 7' are in an oscillating state, and are not configured to block unnecessary radiation emitted from them. Therefore, there has been a problem in that interference is often caused by unnecessary radiated signals.

そこで、本発明は、この電圧制御発振回路の不要輻射を
防止したPLL回路を提供することを目的とするもので
ある。
Therefore, an object of the present invention is to provide a PLL circuit that prevents unnecessary radiation from the voltage controlled oscillation circuit.

問題点を解決するための手段 本発明においては、バンド切換信号を用いる等して、複
数の電圧制御発振回路のうち選択されているバンドに対
応したもの以外の電源電圧の印加を選択的に遮断すると
ともに、それらの電圧制御発振回路の出力を選択的に取
り出してプログラマブル分周器に供給するようにしたも
のである。
Means for Solving the Problems In the present invention, the application of power supply voltages other than those corresponding to the selected band among the plurality of voltage controlled oscillation circuits is selectively cut off by using a band switching signal or the like. At the same time, the outputs of these voltage controlled oscillation circuits are selectively taken out and supplied to a programmable frequency divider.

作  用 このようにバンド切換信号等で電圧制御発振回路の電源
電圧の印加を選択的に遮断、導通させかつ選択的に出力
を取り出すようにしたことにより、必要とする電圧制御
発振回路のみを動作させて他の使用されない電圧制御発
振回路は動作しないようにすることができるため、不要
輻射を非常に少なくすることができる。
Function In this way, by selectively cutting off or conducting the application of the power supply voltage to the voltage controlled oscillation circuit using a band switching signal, etc., and selectively taking out the output, only the necessary voltage controlled oscillation circuit can be operated. Since other unused voltage controlled oscillation circuits can be made inoperable, unnecessary radiation can be greatly reduced.

実施例 以下、本発明の一実施例のPLL回路を第3図の図面を
参照して説明する。
Embodiment Hereinafter, a PLL circuit according to an embodiment of the present invention will be explained with reference to the drawing of FIG.

第1図の可変分周器9に相当する部分が第3図の12で
あり、電圧制御発振回路7,7′の出力をアナログアン
プ13.14で増巾し、アンドゲート19 、20及び
、オアーゲート21を介して一バンド切換え信号S1.
S2により選択された信号を可変分周回路22へ導く。
The part corresponding to the variable frequency divider 9 in FIG. 1 is 12 in FIG. One band switching signal S1.
The signal selected by S2 is guided to the variable frequency divider circuit 22.

ここで、電圧制御発振回路7,7′はバンド切換回路S
1.S2で電源電圧の印加を遮断、導通させるための切
換回路30.31を備えている。23゜24はPNP 
)ランジスタで、抵抗24.25を介してプルアンプし
ており、ベース抵抗26.27を介してNPN )ラン
ジスタ28.29のコレクタに接続する。トランジスタ
28.29のエミッタは接地しており、この各々のトラ
ンジスタ28゜29のペースにバンド切換信号S1.S
2を印加している。
Here, the voltage controlled oscillation circuits 7 and 7' are band switching circuits S
1. Switching circuits 30 and 31 are provided to cut off and conduct the application of the power supply voltage at S2. 23°24 is PNP
) transistor, which is pull-amplified through a resistor 24.25, and connected to the collector of an NPN transistor (NPN) transistor 28.29 through a base resistor 26.27. The emitters of the transistors 28 and 29 are grounded, and the band switching signals S1 . S
2 is applied.

ここで、バンド切換信号S がs HwでS2がIL1
で第1のバンドが選択されている場合には、トランジス
タ28は導通状態であり、これによりトランジスタ23
が導通状態となるため、電圧制御発振回路フに電源電圧
が供給されこれが発振動作する。又、バンド切換信号S
2が“L”であるからトランジスタ29は力、ソトオフ
であり、トランジスタ24も力・、l−オフとなるため
、電圧制御発振回路7′には電源電圧が印加されない。
Here, the band switching signal S is s Hw and S2 is IL1
When the first band is selected in , transistor 28 is conductive, which causes transistor 23
becomes conductive, so the power supply voltage is supplied to the voltage controlled oscillator circuit, causing it to oscillate. Also, the band switching signal S
2 is "L", the transistor 29 is off, and the transistor 24 is also off, so no power supply voltage is applied to the voltage controlled oscillation circuit 7'.

このため、電源電圧制御発振回路7′は不動作状態とな
る。これにより、不要輻射は防止される。
Therefore, the power supply voltage controlled oscillation circuit 7' becomes inoperative. This prevents unnecessary radiation.

同時に、ゲート19.20の入力もバンド切換信号S1
.S2で切換られる。即ち、バンド切換信号S1が“H
lであるからゲート19の出力がオアゲート21へ伝達
され、ゲート2oによりアナログアンプ14出力は遮断
される。これは、電圧制御発振回路7′は動作していな
いが、アナログアンプ14は増巾ゲインが高いので何ら
かの出力信号が出て悪影響を及ぼすことのない様にゲー
)20を設けているのである。
At the same time, the input of the gates 19 and 20 is also the band switching signal S1.
.. It is switched in S2. That is, the band switching signal S1 is “H”.
1, the output of the gate 19 is transmitted to the OR gate 21, and the output of the analog amplifier 14 is cut off by the gate 2o. This is because although the voltage controlled oscillation circuit 7' is not operating, the analog amplifier 14 has a high amplification gain, so the gate 20 is provided to prevent any output signal from being output and causing any adverse effects.

バンド切換信号S が“L’で82が1 )(lの場合
はこの逆の動作となる。
When the band switching signal S is "L" and 82 is 1) (if it is 1, the operation is the opposite).

発明の効果 この様に、本発明によれば、バンド選択に対応してPL
L回路中の各バンド用の電圧制御発振回路の電源電圧を
遮断、導通させるようにしたことにより、不要なバンド
の発振回路の発振を停止させ、不要輻射を少なくするこ
とが出来る。
Effects of the Invention As described above, according to the present invention, the PL
By cutting off and conducting the power supply voltage of the voltage controlled oscillation circuit for each band in the L circuit, oscillation of the oscillation circuit of unnecessary bands can be stopped and unnecessary radiation can be reduced.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例におけるPLL回路の回路図
、第2図は一般のPLLシンセサイザー受信機の構成を
示すブロック図、第3図は第2図中の従来の主要部を示
す図 ′−°  ・・  である。 2・・・・・・RF増巾部、3・・・・・・混合器、4
・・・・・・中間周波増巾部、5・・・・・・検波回路
、6・・・・・・局部発振回路、7,7′・・・・・・
電圧制御発振回路、8・・・・・・ローパスフィルター
%9・・・・・・可変分周回路、1o・・・・・・位相
比較回路、11・・・・・・基準周波数発振回路、30
゜31・・・・・・電源電圧供給用スイッチング回路。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名第3
Fig. 1 is a circuit diagram of a PLL circuit according to an embodiment of the present invention, Fig. 2 is a block diagram showing the configuration of a general PLL synthesizer receiver, and Fig. 3 is a diagram showing the conventional main parts in Fig. 2. ′−°... 2...RF amplification section, 3...Mixer, 4
...Intermediate frequency amplification section, 5...Detection circuit, 6...Local oscillation circuit, 7, 7'...
Voltage controlled oscillation circuit, 8...Low pass filter %9...Variable frequency divider circuit, 1o...Phase comparison circuit, 11...Reference frequency oscillation circuit, 30
゜31...Switching circuit for power supply voltage supply. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 3
figure

Claims (1)

【特許請求の範囲】[Claims] 多バンド受信機の各バンドに対応した複数の電圧制御発
振器と、各々の電圧制御発振器の出力を増幅してプログ
ラマグル分周器に導く複数のアナログ増幅器と、バンド
選択に応動して上記電圧制御発振器の出力を選択的に上
記プログラマグル分周器に導くように上記アナログ増幅
器の出力を制御する手段と、バンド選択に応動して選択
されなかった上記アナログ増幅器のに対応する上記電圧
制御発振器の電源電圧を遮断状態にし選択された上記電
圧制御発振器の電源電圧だけを印加するスイッチング手
段とを具備したことを特徴とするPLL回路。
A plurality of voltage controlled oscillators corresponding to each band of a multi-band receiver, a plurality of analog amplifiers that amplify the output of each voltage controlled oscillator and guide it to a programmable frequency divider, and the above voltage control in response to band selection. means for controlling the output of the analog amplifier to selectively route the output of the oscillator to the programmable frequency divider; and means for controlling the output of the voltage controlled oscillator corresponding to the analog amplifiers not selected in response to band selection A PLL circuit comprising switching means for cutting off the power supply voltage and applying only the power supply voltage of the selected voltage controlled oscillator.
JP61009199A 1986-01-20 1986-01-20 Pll circuit Pending JPS62166625A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61009199A JPS62166625A (en) 1986-01-20 1986-01-20 Pll circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61009199A JPS62166625A (en) 1986-01-20 1986-01-20 Pll circuit

Publications (1)

Publication Number Publication Date
JPS62166625A true JPS62166625A (en) 1987-07-23

Family

ID=11713825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61009199A Pending JPS62166625A (en) 1986-01-20 1986-01-20 Pll circuit

Country Status (1)

Country Link
JP (1) JPS62166625A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0310418A (en) * 1989-06-07 1991-01-18 Sanyo Electric Co Ltd Reference clock controller for clock regenerating pll circuit
US6175724B1 (en) * 1998-07-31 2001-01-16 Motorola, Inc. Band switchable injection oscillator and communication device using same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0310418A (en) * 1989-06-07 1991-01-18 Sanyo Electric Co Ltd Reference clock controller for clock regenerating pll circuit
US6175724B1 (en) * 1998-07-31 2001-01-16 Motorola, Inc. Band switchable injection oscillator and communication device using same

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