JPS6214557A - 4-phase psk demodulator - Google Patents

Abstract

PURPOSE:To perform accurate demodulation by comparing the phase difference between input and output signals of a narrow band pass filter having a variable center frequency which a converted signal passes and applying the comparison output to the narrow band pass filter through a low pass filter to make said phase difference zero. CONSTITUTION:A reception signal 1 is inputted to a remodulating part 201 and an orthogonal phase demodulating part 202 through a preamplifier 101. The demodulated signal is inputted to the remodulating part 201 to produce a carrier signal 18. The signal 18 becomes the reference reproduced carrier signal 6 of the demodulating part 202 through an AFC part 203 to form a loop. The signal 18 is multiplied in a multiplier 115 by the signal supplied from an oscillator 112, and the output of the multiplier 115 is supplied to a multiplier 120 and a narrow band BPF 117 through a BPF 116. The output of the BPF 117 is supplied to a variable phase shifter 119 and a multiplier 123 through a limiter circuit 118, and the phase comparison output of the multiplier 120 is supplied to the BPF 117 through an LPF 121 to change the center frequency of the BPF 117. Thus, the frequency of the AFC loop is made constant to perform the accurate demodulation.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a synchronous demodulator that demodulates a four-phase PSK modulated signal in a microwave frequency band in the fields of communication and broadcasting.

[Conventional technology]

RFTDM (
Radio Frequency TimeD 1
In recent years, the vision multiplex system has come into use. Japan Broadcasting Corporation's MUSE
(Multiplex 5ub-Nyquist
An example of this is high-definition television broadcasting based on Sampling En-coding. To transmit data by modulating a high frequency signal, a four-phase PSK modulation method is used, which is excellent in terms of occupied bandwidth and transmission efficiency.

The receiving device receives the high frequency signal as described above and converts it into a 4-phase PS
When demodulating a K-modulated signal, a multi-stage frequency conversion circuit is used to convert the signal into a specific intermediate frequency signal and input it to the demodulator.

A 4-phase PSK demodulator mainly uses a synchronous demodulation method in which a carrier wave signal is regenerated from an input 4-phase PSK modulated signal, and the modulated data is demodulated using this regenerated carrier wave signal.

As a high-speed carrier signal regeneration method, inverse modulation method or 4
Although the multiplication method is common, the inverse modulation method is advantageous when the frequency of the input carrier signal is high. FIG. 3 shows an example of a carrier wave regeneration/demodulation circuit using the inverse modulation method. This circuit is composed of a quadrature phase demodulation circuit 401, a remodulation circuit 402, and a narrow band pass filter circuit 403, forming a carrier signal regeneration loop. Input 4-phase PSK modulation signal a
is demodulated by a quadrature phase demodulation circuit 401 using reproduced carrier wave signals f and g, which serve as reference signals. Multiplier 302,3
03, many unnecessary components are generated in addition to the demodulated signal, but in order to remove these, the demodulated signal is passed through low-pass filters 305 and 306, and further inputted to limiter circuits 307 and 308, and then sent to the remodulation circuit 402. i is supplied.

A remodulation circuit 402 receives the demodulated signal.

When i is multiplied by input signals m and l by multipliers 309 and 310 and then added by an adder 312, a carrier wave signal n without a modulation component is obtained. The carrier wave signal n is passed through a narrow band pass filter 313 to improve the C/N ratio, and is further supplied to a limiter circuit 314 to remove amplitude fluctuations of the signal.
It is sent out via the variable phase shifter 315 as a reference signal g+f used for the quadrature phase demodulation circuit 401. Furthermore, 304
．． 311 is a phase shifter that delays the signal phase by π/2.

Hereinafter, the signals of each part of the circuit of FIG. 3 will be expressed mathematically, and the reproduction operation of the carrier wave signal will be explained. The 4-phase PSK modulation signal a input from the input terminal 301 is a = I cos
wt+Qsin wt (here, I and Q are constants with positive and negative values, 1H1=IQ1), and the quadrature phase demodulation circuit 4010 reference signals f and g have a phase error φ1. −g=KIs
In (wt-φ+). The output signals S and c of the multipliers 302 and 303 are expressed as b= (Icos ht+Qsin wt) ・(−
+ cos (wt-φI))・K2 = ((KI Q/2) sin 2wt-cos
φ1-(KI I/2) sin 2w1s
in φr (K +Q/2)sin φ+
” (KI Q/2) cos2 wt-
sin φr −(KI I/2cos φ1
-(KI I/2)cos 2wt-cos φ
+ (KII/2) sin 2wt-5in
φ+)・Kzc = (Icos wt+Qsin
wt) ・KI sin (wt-φ,) = ((KI Q/ 2) cos φI −(
KI Q/2)・CO3211t-CO3φ+
(KI Q/ 2) sin2 wt-sinφ+
+(KI I/2) sin 2wt' cos φ
r (KI I/2) sin φ, -(KI
I/2) cos 2wt-5in φ+)・K
It becomes z.

When the signals s and c are supplied to low-pass filters 305 and 306, the output signals d and e are given by d=-Ka Qsinφ,-, rcos φ1e with the gain of the filter as
" K 4 Qcos φ, - becomes l5in φ1 (here + Kz K3 / 2 = K4). When the signals d and e are supplied to the limiter circuits 307 and 308, if φ is a small value, the limiter circuit 307,3
In the output signal of 08, i becomes h=-, In=, Q (here, is a constant of the limiter circuit), and the signal i becomes a constant value when φ1 is small. Next, the signal 1.i is supplied to the remodulation circuit 402 and the signal 1. Multiplied by m. The delay circuit 316 includes the multiplier 30
The demodulated signals from 2 and 303 to multipliers 309 and 310 respectively compensate for the delay amount of i, and if the delay it (phase change amount) is φ2, then the signal! 2m can be expressed as follows.

1 = I cos (wt-φz) + Qsin
(wt-φ2)m = -Qcos (wt-φz)
+l5in (wt-φ (Here, the gains of the delay circuit 316 and phase shifter 311 are assumed to be 1 for simplicity.) Therefore, the output signals j of the multipliers 309 and 310.

If k is the gain of the multiplier, then j = I QK7 cos (wt-φz)
I" K7 sin (wt-φ2) k = I QK? cos (wt-φz)
+Q" K7 sin (wt-φ2) (Where?=KS ・K6) The output signal n of the adder 312 is set to 1, and the gain of the adder is 1. n= (1"+Q") ・K7 sin (wt
−φ2)=Ks sin (wt−φri (here, Ks = (I” +Q2)・K,=constant) Processed by a narrow band pass filter 313, a limiter circuit 314, and a variable phase shifter 315. These become the reference signals f and g of the quadrature phase demodulation circuit 401.The variable phase shifter 315 uses the output signal g as + sin wt
This circuit adjusts the phase and gain so that

The carrier wave signal is reproduced through the operations described above.

[Problem that the invention seeks to solve]
1 4-phase psK input to the demodulator with the above configuration
As mentioned above, the modulated signal (hereinafter referred to as received signal) is an intermediate frequency signal whose frequency is converted from the microwave frequency band by a multi-stage frequency conversion circuit, and its frequency stability is determined by the stability of the local oscillation frequency of the frequency conversion circuit. Depends on the degree.

By the way, when the frequency of the received signal changes in the 4-phase PSK demodulator, the frequency of the reproduced carrier signal n passing through the narrow band pass filter 313 changes, so that the input signal n and output signal q of the filter 313 change. A phase difference occurs, and the phase of the reproduced carrier signal g becomes ambiguous. Therefore, in the multi-stage frequency conversion circuit, a crystal oscillation circuit may be used as the local oscillation circuit to stabilize the frequency of the intermediate frequency signal, but this method is disadvantageous in terms of circuit configuration and cost.

Furthermore, in a four-phase PSK modulated signal, when the data transmission rate is high, the frequency of the regenerated carrier signal of the demodulator generally becomes high, and the narrow band pass filter 313. There is a drawback that designing and configuring the limiter circuit 314 and the like becomes difficult.

An object of the present invention is to provide a demodulator that regenerates a carrier signal from a received four-phase PSK modulated signal and demodulates using the regenerated carrier signal. It is an object of the present invention to provide a demodulator which can perform correct demodulation even if there is a frequency fluctuation of a received signal without causing the occurrence of the problem.

[Means for solving problems]

The apparatus of the present invention includes a quadrature phase demodulation section that receives a received signal and demodulates it using a reference recovered carrier signal.

a remodulation section which inputs the output of the quadrature phase demodulation section and reproduces a carrier signal by calculation with the received signal; and an APC section which inputs the reproduced carrier signal and supplies a reference reproduction carrier signal to the quadrature phase demodulation section. A closed loop is formed and demodulation is performed.

The APC section includes a frequency conversion circuit that reduces the frequency of an input signal, a narrow band pass filter with a variable center frequency that passes the converted signal, and a phase comparison circuit that detects a phase difference between input and output signals of the narrow band pass filter. , and a frequency conversion circuit that increases the frequency again and outputs it, and applies the output of the phase comparator circuit to the narrow band pass filter via a low pass filter to shift the center frequency and change the position of the input/output signal. Let the phase difference be zero.

The APC section having the above configuration is applied when the data transmission rate of the 4-phase PSK modulated signal is high. Since the frequency of the reproduced carrier wave signal is high, the frequency is once converted to a lower frequency, and then phase control is performed. However, if the data transmission rate is not so high, phase control can be performed as is without frequency conversion, and the circuit becomes simple.

[Effect]

When the frequency of the received signal changes and therefore the frequency of the regenerated carrier signal input to the APC section changes, the frequency of the signal passing through the narrow band pass filter of the APC section deviates from the center frequency. Therefore, a phase difference occurs between the input signal and output signal of the filter, but in this device, the center frequency of the narrow band pass filter is changed according to the above phase difference, so that the input signal always becomes the center frequency of the filter. No phase difference occurs between input and output signals. In this way, the reference recovered carrier signal that passes through the APC section and is input to the quadrature phase demodulation section is always maintained in the correct phase relationship with the received signal even if there is a fluctuation in the frequency of the received signal of this demodulation device.

〔Example〕

Hereinafter, one embodiment of the present invention will be described based on FIG. This device includes a remodulator 201. Quadrature phase demodulator 20
2. It consists of an APC section 203. Received signal (4 phase P
SK Henbata signal) 1 is sent to the remodulator 2 via the preamplifier 101.
01 and is input to the quadrature phase demodulation section 202. The demodulated signals 11 and 12 demodulated by the quadrature phase demodulator 202 are sent to the remodulator 2.
01 and reproduces the carrier signal 18. This recovered carrier wave signal 18 passes through the APC section 203 and is input as the reference recovered carrier wave signal 6 to the orthogonal phase demodulation section 202, thereby forming a loop. Demodulated signals 11 and 12 are output from output terminals 301 and 302.

The details of each part will be explained below. Quadrature phase demodulator 20
2 are multipliers 107, 108 . Low pass filter 109
, 110. It is composed of limiter circuits 111 and 112, and has two branch paths. The input signal 2 is quadrature phase demodulated by multiplying the reference regenerated carrier signal 6 by the signal 7 which has been made orthogonal in phase by the -π/2 phase shifter 113, and a demodulated signal 3°8 is obtained in each branch. Demodulated signals 3 and 8 have unnecessary components generated as a result of multiplication removed by low-pass filters 109 and 110, and amplitude limited by limiter circuits 111 and 112 to become demodulated signals 11. '12.

The demodulated signals 11 and 12 are output as 4-phase PSK demodulated signals from output terminals 301 and 302, and are also outputted from the remodulator 2.
01.

The remodulator 201 includes a delay circuit 102 . -π/2 phase shifter 1
051 multipliers 103, 104. It is composed of an adder 106. The demodulated signals 11 and 12 are sent to multipliers 103 and 1, respectively.
04, which has passed through the delay circuit 102, and the received signal 15 which has further passed through the -π/2 phase shifter 105. The output signals 16 and 17 of the multipliers 103 and 104 are added together by the adder 106 to become a reproduced carrier wave signal 18 without modulation components, which is then sent to the next stage APC section 203.
supplied to

The APC section 203 includes multipliers 115, 123, 120, band pass filters 116, 124 . Narrow band pass filter 11
7. Rimi Tsuta circuit 118. Variable phase shifter 119, 125
．． It is composed of a low-pass filter 121 and an oscillator 122, forming a kind of PLL. The regenerated carrier signal 1
8 is subjected to frequency conversion by multiplication with a signal supplied from an oscillator 122 in a multiplier 115, and is passed through a band pass filter 116 to remove unnecessary components generated at that time.

The conversion frequency is set low and narrow band pass filter 117
．． Implementation of circuits such as the limiter circuit 118 is easy. The frequency of the regenerated carrier signal 18 is fI.

Letting the oscillation frequency of the oscillator 122 be fo and the conversion frequency f2, f2=f, -f.

It is set so that the relationship is as follows. The multiplier 123 performs frequency conversion by multiplying the signal 22 by the output signal of the oscillator 122. If the frequency of the output signal 28 of the band-pass filter 124 is f3, the frequency conversion is performed so that f=f2+f0. . Therefore, from the cutting allowance, f,=f, and the frequencies of the reproduced carrier wave signals 18 and 28 are the same and do not depend on the oscillation frequency of the oscillator 122.

Further, the output signal 20 of the bandpass filter 116 is transmitted to the multiplier 1
20 and a narrow band pass filter 117, and the output signal of the narrow band pass filter 117 is supplied to a limiter circuit 118.
After the amplitude is limited by , the signal is supplied to variable phase shifter 119 and multiplier 123 . The multiplier 120 is for performing a phase comparison between the signal 20 and the output signal 23 of the variable phase shifter 119, and its output signal 24 is supplied to the narrow band pass filter 117 via the low pass filter 121. , change its center frequency. The variable phase shifter 119 sets the center frequency of the narrow band pass filter 117 with respect to the reproduced carrier signal 18 of the reference frequency. FIG. 4 shows the frequency characteristics of the narrow band pass filter 117 having characteristics necessary for improving the C/N, including the case where the center frequency is changed. fo is the reference center frequency.

An example of the narrow band pass filter 117 is shown in FIG. As shown in the figure, a low output impedance buffer 501 is connected to the front stage, a high input impedance buffer 502 is connected to the rear stage, a resonant circuit is created with Rl+Ll+Cz, and varactor diodes D+ and Dz, which serve as variable capacitors, are connected in parallel. By changing the bias of the diode using the signal 25, the resonant frequency is changed.

The frequency of the signal 18 input to the APC section 203 changes,
When the frequency of the frequency-converted signal 20 deviates from the reference and a phase difference occurs between the input and output signals of the narrow band pass filter 117, the PLL causes the signal 25 input to the narrow band pass filter 117 to change the center wave number. , and the frequency of the signal 20, there is no phase difference. In this way, even if the frequency of the received signal 1, and thus the input signal 18 of the APC section 203, fluctuates, the phase fluctuation of the APC loop can be eliminated. and bandpass filter 124
The phase of the output signal is adjusted using the second variable phase shifter 125 so that it becomes a reference signal for the orthogonal phase demodulation section 202, and the output signal is output as a reference recovered carrier signal 6.

Next, when the data transmission rate is not so high, the frequency of the recovered carrier signal is also low, so the APC section 203'
Therefore, it is not necessary to perform frequency conversion. Therefore, the circuit configuration of the APC section 203' is also simplified as shown in FIG. That is, the multipliers 115 and 123 and the bandpass filters 116 and 124 that constitute the two frequency converters in FIG.
And the circuit excludes the oscillator 122. A in Figure 2
The operation of the PC section 203' can be considered to be exactly the same.

〔Effect of the invention〕

As explained above, in the present invention, the regenerated carrier signal obtained from the re-modulation section by the inverse conversion method is converted into the frequency of the frequency-converted signal by the APC section including the phase-locked loop, and is converted into a narrow band with a variable center frequency. The output of the phase comparison circuit is controlled so that the center frequencies of the pass filters match.

Therefore, since no phase difference occurs due to the narrow band pass filter, even if a fluctuation occurs in the received four-phase PSK modulated signal, it is possible to provide the reference reproduced carrier signal with the correct phase relationship to the quadrature phase demodulator.

Furthermore, since the APC section converts the frequency to a lower frequency, it becomes easier to design a narrow band pass filter and a limiter circuit. When the data transmission rate is low, the APC section does not perform frequency conversion, and a similar effect can be obtained by directly regenerating carrier signals.

[Brief explanation of the drawing]

Figures 1 and 2 are circuit diagrams showing one embodiment of the present invention, and Figure 3 is a circuit diagram showing an embodiment of the present invention.
This figure is a circuit diagram of a conventional example, FIG. 4 is a diagram showing the characteristics of a narrow band pass filter necessary for carrier wave signal reproduction, and FIG. 5 is a diagram showing an example of a narrow band pass filter with a variable center frequency. 201-remodulation section, 202-quadrature phase demodulation section, 203
-・APC section, 102-・-Delay circuit, 103, 104, 107, 108, 115° 120.1
23--multiplier, 106--adder, 109.110,121--low-pass filter, 11
6.124 - band pass filter, 117 - narrow band pass filter (center frequency variable filter), 105.113 - π/2 phase shifter, 119.125
- variable phase shifter, 111.112, 118- limiter circuit, 122- oscillator,

Claims (2)

[Claims] (1) a quadrature phase modulation section that inputs a 4-phase PSK modulated signal as a received signal and demodulates it using a reference recovered carrier signal;
a re-modulating section which inputs the output of the quadrature phase modulator and reproduces a carrier signal by calculation with the received signal; and an APC section which inputs the reproduced carrier signal and supplies a reference reproduced carrier signal to the quadrature phase demodulator. A demodulation device that demodulates a received signal by forming a closed loop with the It has a phase comparison circuit that detects the phase difference between the input and output signals of the bandpass filter, and a frequency conversion circuit that increases the frequency again and outputs the same. A 4-phase PSK demodulator characterized in that the phase difference between input and output signals is made zero by applying the voltage to a band-pass filter and moving the center frequency. (2) a quadrature phase modulation section that inputs a 4-phase PSK modulated signal as a received signal and demodulates it using a reference recovered carrier signal;
a re-modulating section which inputs the output of the quadrature phase modulator and reproduces a carrier signal by calculation with the received signal; and an APC section which inputs the reproduced carrier signal and supplies a reference reproduced carrier signal to the quadrature phase demodulator. A demodulation device that demodulates a received signal by forming a closed loop with the APC unit, the APC unit comprising a narrow band pass filter with a variable center frequency and a phase comparison circuit that detects a phase difference between input and output signals of the narrow band pass filter. and applying the output of the phase comparison circuit to the narrow band pass filter via a low pass filter to shift the center frequency and make the phase difference between the input and output signals zero. PSK demodulator.