JPS62144476A - Image information binary-coding system - Google Patents

Image information binary-coding system

Info

Publication number
JPS62144476A
JPS62144476A JP60286713A JP28671385A JPS62144476A JP S62144476 A JPS62144476 A JP S62144476A JP 60286713 A JP60286713 A JP 60286713A JP 28671385 A JP28671385 A JP 28671385A JP S62144476 A JPS62144476 A JP S62144476A
Authority
JP
Japan
Prior art keywords
picture element
binary
pixel
line
ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60286713A
Other languages
Japanese (ja)
Inventor
Takashi Hagiwara
萩原 孝
Takanori Yamamoto
貴典 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60286713A priority Critical patent/JPS62144476A/en
Publication of JPS62144476A publication Critical patent/JPS62144476A/en
Pending legal-status Critical Current

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  • Image Processing (AREA)
  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE:To eliminate binary-coding errors due to the effect of surrounding picture elements by detecting 4 picture elements at the upper/lower/left/right position of a noted picture element in binary-coding and reading picture information and correcting the resulting noted picture element level while referring to a correction table. CONSTITUTION:After an analog image from a CCD 11 is digitized, the result is subjected to sample holding by an n-bit latch 13 and a preceding line and a noted binary-coded line are stored in a RAM 14. As soon as a succeeding line is read, after a picture element R2 is extracted from the RAM 14, the preceding line is given in a RAM 15, one bit is shifted by a delay circuit (DEL) 16 to extract a picture element R1. A signal of the binary-coded line is shifted by 1 bit in a DEL 17 to extract a noted picture element D and a picture element R3 is extracted via a DEL 18. A signal of the preceding line is given to a DEL 19, one bit is shifted and a picture element R4 is extracted from the RAM 14. Then the noted picture 1 is divided into a table ROM 21 receiving a longitudinal component (R1, D, R3) and a table 22 receiving a lateral component (R2, D, R3), they are corrected separately, the result is put in a decode ROM 23, a slice level is given to apply binary-coding finally.

Description

【発明の詳細な説明】 〔概  要〕 本発明は、ファクシミ’)等の画像情報を扱う装置にお
いて、画像情報を2値化して読込む際、2値化しようと
する注目画素に対する前後左右の4画素を検出し、この
検出結果の注目画素レベルを予め設定した補正テーブル
を参照することによシ補正するようにしたものである。
[Detailed Description of the Invention] [Summary] The present invention provides an apparatus that handles image information, such as a facsimile machine, when reading image information by binarizing it. Four pixels are detected, and the pixel level of interest of the detection result is corrected by referring to a preset correction table.

これによυ、注目画素に対する周囲画素の影゛1−9に
よる2値化誤9をなくすることができる。
This makes it possible to eliminate the binarization error 9 due to the influence of surrounding pixels 1-9 on the pixel of interest.

〔産業上の利用分野〕[Industrial application field]

本発明はファクシミリJ等の画像情報を2値化する際の
注目画素に対する周囲画素の影響を補、正するようにし
た画像情報2値化方式に関するものである。
The present invention relates to an image information binarization method that corrects the influence of surrounding pixels on a pixel of interest when binarizing image information of a facsimile J or the like.

〔従来の技術〕[Conventional technology]

従来、ファクシミリ等において、画像情報を電気信号に
変換する場合、一般的に密着形画像七ンサを用いる方法
と、光学系を用すてOOD (電荷結合素子)に結像さ
せる方法があるが、前者は現時点では高価格のため、A
6原稿を読込める装置等では後者が有利であシ、現在の
主流となっている。
Conventionally, when converting image information into electrical signals in facsimiles and the like, there are generally two methods: using a contact type image sensor and using an optical system to form an image on an OOD (charge-coupled device). The former is currently expensive, so A
The latter is advantageous in devices that can read six originals, and is currently the mainstream.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記00Dに結像させる方法は、光学系を用いるためレ
ンズのMTF 、光源の光による乱反射等が悪影響を及
ぼして画質低下の原因となる。その影響が著しく表われ
ると、白または黒の画素が周囲の黒または白によりつぶ
される現象が生じる。この現象を第4図(α)〜(c)
により説明する。
Since the above-mentioned method of forming an image on 00D uses an optical system, the MTF of the lens, diffused reflection due to light from a light source, etc. have an adverse effect, causing a reduction in image quality. When this effect becomes significant, a phenomenon occurs in which white or black pixels are crushed by surrounding black or white pixels. This phenomenon is illustrated in Figure 4 (α) to (c).
This is explained by:

同図の方法はCODを用いてアナログの画信号をスライ
スレベルと比較して画像データを2値化するものである
The method shown in the figure uses COD to compare an analog image signal with a slice level to binarize image data.

同図(α)は注目している2値化ラインとその前後のラ
インにおける白、黒(斜線)画素の状態例A、 Bを示
し、同図(6)の実線はCODで検出された画像信号1
点線はスライスレベルであり、同図(C)はその結果得
られた2値化画像データを示している。この場合、注目
されている同図(G)の2値化ラインと同図(C)の2
値化画像データを比較してみると明らかに前述の現象の
影響を受けている。すなわち、面状態Bのように、周囲
が全部白の中に黒が1画素ある場合等は画像信号の波形
がなまり、白くつぶれてしまう。また、逆に黒画素の中
に白が1画素の場合も同じ理由で黒くつぶれてしまうこ
とになる。また、画状態人においても両端の画素が相当
に白の影響を受けからくも黒を検出しているが、条件が
悪ければ両端の画素が白くつぶれる可能性もある。
Figure (α) shows examples A and B of the states of white and black (diagonal line) pixels in the binarization line of interest and the lines before and after it, and the solid line in Figure (6) shows the image detected by COD. signal 1
The dotted line is the slice level, and FIG. 2C shows the resulting binarized image data. In this case, the binarization line in the same figure (G) that is attracting attention and the two-value line in the same figure (C)
Comparing the digitized image data, it is clear that it is affected by the above-mentioned phenomenon. That is, when there is one black pixel in a completely white surrounding area, as in surface condition B, the waveform of the image signal becomes dull and becomes white. Conversely, if there is one white pixel in a black pixel, the image will become black for the same reason. Furthermore, even in people with poor image quality, the pixels at both ends of the image are significantly affected by white, so black is detected, but if the conditions are bad, the pixels at both ends may become white.

本発明の目的は、2値化しようとする画素が周囲の反転
画素の影響を受けるのに対し補正するようにした画像情
報2値化方式を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an image information binarization method that corrects the influence of surrounding inverted pixels on pixels to be binarized.

〔問題点を解決するための手段〕[Means for solving problems]

前記目的を達成するため、本発明においては、画像情報
を2値化して読込む際、2値化しようとする注目画素に
対してその前後左右の4画素を検出し、この検出結果の
注目画素レベルを予め設定した補正テーブルを参照する
ことによシ補正するようにしたものである。
In order to achieve the above object, in the present invention, when image information is binarized and read, four pixels on the front, back, left and right sides of the pixel of interest to be binarized are detected, and the pixel of interest as a result of this detection is The correction is performed by referring to a correction table in which levels are set in advance.

〔作 用〕[For production]

注目画素の周囲の反転画素の影響を補正するため、この
状態を検出し、注目画素に対する前後左右のレベル変化
をアドレスとした補正テーブルを予め設定しておき、こ
れを参照して注目画素を正しいものに補正する。これに
よシ、周囲画素の影響による注目画素の2値化誤シをな
くすることができる。
In order to correct the influence of inverted pixels around the pixel of interest, this state is detected and a correction table is set in advance with the level changes in the front, back, left, and right directions relative to the pixel of interest as addresses, and this is referred to to correct the pixel of interest. Correct things. This makes it possible to eliminate binarization errors of the pixel of interest due to the influence of surrounding pixels.

〔実施例〕〔Example〕

第1図(α)〜(C)は本発明の実施例の構成説明図で
ある。
FIGS. 1(α) to 1(C) are configuration explanatory diagrams of an embodiment of the present invention.

同図(b)において、0OD11から送られてきたアナ
ログ画像信号をnピッ) A/Dコンバータ12でデジ
タル変換した後、nビットラッテ13でサンプルホール
ドし、RAM14に同図(tL)の画像1に示すような
前ライン、注目2値化2インを格納する。次に3ライン
目の後ラインを読むと同時に、注目画素りの周囲に位置
する几1〜R4のタイミングを合わせるように、まずR
AM14の出力から2で1化ラインの画素R2を取出し
た後、前ラインではRAM14から殆ど同時に几AM1
5に入れ遅延回路(DEL ) 1(5で1ビツトずら
し画素几1を取出す。2値化ラインではDBL 17で
1ビツトずらし注目画素りを取出し、さらにDEL 1
8を介して画素FL3を取出す。後ラインではDEL1
9を介しFLAM14から1ビツトずらし画素R4を取
出す。
In the same figure (b), the analog image signal sent from 0OD11 is converted into digital data by the A/D converter 12 (n bits), sampled and held by the n bit latte 13, and the image 1 of the same figure (tL) is stored in the RAM 14. The previous line and the binarized 2-in of interest are stored as shown in . Next, at the same time as reading the line after the third line, first R
After extracting the pixel R2 of the unification line at 2 from the output of AM14, the previous line receives pixel R2 from RAM14 almost simultaneously.
Delay circuit (DEL) 1 (5 shifts 1 bit and takes out pixel 1. In the binarization line, DBL 17 shifts 1 bit and takes out the pixel of interest, and then DEL 1
8, the pixel FL3 is taken out. DEL1 on the back line
The pixel R4 shifted by 1 bit is taken out from the FLAM 14 via the pixel R4.

次に、注目画素りと周囲画素几1〜几4の関係をテーブ
ル化し、たとえば各画素レベルを16段階として4ピツ
トで表わし、従って几1〜几4画素の状態を4X4=1
6ピツトのアドレスで注目画素をサーチするように構成
すればよいが、アドレスが多数となり構成が複雑化する
Next, the relationship between the pixel of interest and the surrounding pixels 1 to 4 is made into a table. For example, each pixel level is expressed in 16 levels with 4 pits. Therefore, the state of pixels 1 to 4 is 4X4 = 1.
Although it is possible to search for the pixel of interest using 6-pit addresses, the number of addresses becomes large and the configuration becomes complicated.

そこで、本願では、第1図(c)に注目画像1の縦(几
1.D、R4)を入力するテーブル化0M21と、横(
R2,D、几3)を入力するテーブルROM 22とに
分け、それぞれ別々に補正した後、デコードROM23
に入れスライスレベルを与えて最終的に2値化するもの
である。
Therefore, in the present application, in FIG.
R2, D, 几3) are input to the table ROM 22, and after correcting each separately, the decode ROM 23
The image is then input into the image, given a slice level, and finally binarized.

第2図は第1図(c)の実例による詳細説明図である。FIG. 2 is a detailed explanatory diagram of the example shown in FIG. 1(c).

同図において、RAM 14に格納された注目画素と周
囲画素レベルが画像1のように検出される場合の実例を
示す。
In the figure, an example is shown in which the pixel of interest and surrounding pixel levels stored in the RAM 14 are detected as in image 1.

すなわち、縦(几1.D、R4)を16進で表わしたア
ドレスAAAをテーブルROM21に入れて正しい注目
画素レベル10を出力する。同様に横(fL2.D、R
3)を16進で表わしたアドレスFAFをテーブル化O
M 22に入れて正しい注目画素レベル6を出力する。
That is, the address AAA in which the vertical axis (1.D, R4) is expressed in hexadecimal is entered into the table ROM 21, and the correct target pixel level 10 is output. Similarly, horizontal (fL2.D, R
3) Table the address FAF expressed in hexadecimal.
M22 and outputs the correct target pixel level 6.

コノ両テーブルROM O出力10進数10 (101
0)と6(0110)およびスライスレベルの10進数
9 (1001)とをアドレスとした9A6を、デコー
ドROM23に入れて最終的な注目画素のレベル0が得
られる。
Both table ROM O output decimal number 10 (101
0), 6 (0110), and the slice level decimal number 9 (1001) as addresses are entered into the decode ROM 23 to obtain the final level 0 of the pixel of interest.

この場合には注目画素はOlすなわち黒であるにもかか
わらず周囲の白の影響を受けて10に化けていたことが
分る。
In this case, it can be seen that even though the pixel of interest is Ol, that is, black, it has been transformed into a 10 due to the influence of the surrounding white.

第6図は本発明の他の実施例の構成説明図である。FIG. 6 is a configuration explanatory diagram of another embodiment of the present invention.

同図において、第1図(b)と同様に、nビットラッチ
16でサンプルホールドした同図(α)に示す画像1の
6ラインのデータをそれぞれ前ラインをRAM31、注
目2値化ラインをRAM32.後ツインをRAM 33
に格納する。6ラインを読み終ったならば、MPU 5
4は2値化しようとしている注目画素の前後左右の画素
のレベルを前述と同様にアドレスとして組合わせテーブ
ル几0M65をサーチし、スライスレベルで判定し正し
い注目画素のレベルを求めて出力する。
In the same figure, similarly to FIG. 1(b), 6 lines of data of image 1 shown in FIG. .. Rear twin RAM 33
Store in. After reading 6 lines, MPU 5
4 searches the combination table 0M65 using the levels of the pixels on the front, rear, left, and right sides of the pixel of interest to be binarized as addresses in the same manner as described above, and determines the correct level of the pixel of interest based on the slice level and outputs it.

テーブル几0M35は第1図(c)と同様にアドレス数
を減少するため、2つのテーブルROMに分割し少ない
アドレスビットの組合わせとして構成することもできる
。すなわち、第1図のバードウェアによるタイミング構
成をMPUによるプログラムで行ないテーブルROMを
参照するようにしたものである。
In order to reduce the number of addresses in the table 0M35 as in FIG. 1(c), it can be divided into two table ROMs and configured as a combination of fewer address bits. That is, the timing configuration by the hardware shown in FIG. 1 is implemented by a program by the MPU, and the table ROM is referred to.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明によれば、ファクシミリ等
の画像情報を2値化して読込む際、2値化しようとする
注目画素に対する周囲画素を検出し、この検出結果の注
目画素レベルを予め設定した補正テーブルを参照するこ
とによυ補正を行なうものである。これによシ、従来発
生していた注目画素に対する周囲の反転画素の影響によ
る2値化誤りを殆どなくすることができ、画像品質の向
上に役立つところが大きい。
As explained above, according to the present invention, when image information such as a facsimile is binarized and read, surrounding pixels to the pixel of interest to be binarized are detected, and the level of the pixel of interest as a result of this detection is determined in advance. The υ correction is performed by referring to the set correction table. As a result, it is possible to almost eliminate binarization errors caused by the influence of inverted pixels surrounding the pixel of interest, which conventionally occur, and this greatly contributes to improving image quality.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(c)は本発明の実施例の構成説明図、
第2図は実施例の実例による詳細説明図、第3図(α)
、(b)は本発明の他の実施例の構成説明図、第4図は
従来例の説明図であシ、図中、1はメモリの画像データ
、11はCOD、12はnビットA/D ニア :yバ
ーク、13はnビットラッチ、14.15.51〜36
はRAM、 16〜19は遅延回路、21 、22.3
5はテーブルROM、 23はデコードROM、 34
はMPUを示す。
FIGS. 1(a) to 1(c) are configuration explanatory diagrams of embodiments of the present invention,
Figure 2 is a detailed explanatory diagram based on an example of the embodiment, Figure 3 (α)
, (b) is an explanatory diagram of the configuration of another embodiment of the present invention, and FIG. 4 is an explanatory diagram of the conventional example. In the figure, 1 is image data in memory, 11 is COD, and 12 is n-bit A/ D near: y bark, 13 is n bit latch, 14.15.51-36
is RAM, 16 to 19 are delay circuits, 21, 22.3
5 is a table ROM, 23 is a decode ROM, 34
indicates MPU.

Claims (1)

【特許請求の範囲】 画像情報を2値化して用いる処理装置において、画像情
報を2値化して読込む際、2値化しようとする注目画素
に対してその前後左右の4画素を検出する手段と、 該検出結果の注目画素レベルを予め設定した補正テーブ
ルを参照することにより補正する手段とを具えたことを
特徴とする画像情報2値化方式。
[Claims] In a processing device that binarizes and uses image information, when the image information is binarized and read, means for detecting four pixels on the front, rear, left, and right sides of a pixel of interest to be binarized. An image information binarization method, comprising: means for correcting the pixel level of interest of the detection result by referring to a preset correction table.
JP60286713A 1985-12-19 1985-12-19 Image information binary-coding system Pending JPS62144476A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60286713A JPS62144476A (en) 1985-12-19 1985-12-19 Image information binary-coding system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60286713A JPS62144476A (en) 1985-12-19 1985-12-19 Image information binary-coding system

Publications (1)

Publication Number Publication Date
JPS62144476A true JPS62144476A (en) 1987-06-27

Family

ID=17708035

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60286713A Pending JPS62144476A (en) 1985-12-19 1985-12-19 Image information binary-coding system

Country Status (1)

Country Link
JP (1) JPS62144476A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0310320A (en) * 1989-06-08 1991-01-17 Takayama:Kk Arithmetic circuit
JPH05159048A (en) * 1991-12-10 1993-06-25 Toko Inc Picture processor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0310320A (en) * 1989-06-08 1991-01-17 Takayama:Kk Arithmetic circuit
JPH05159048A (en) * 1991-12-10 1993-06-25 Toko Inc Picture processor

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