JPS62143354A - Deflection circuit - Google Patents

Deflection circuit

Info

Publication number
JPS62143354A
JPS62143354A JP28187285A JP28187285A JPS62143354A JP S62143354 A JPS62143354 A JP S62143354A JP 28187285 A JP28187285 A JP 28187285A JP 28187285 A JP28187285 A JP 28187285A JP S62143354 A JPS62143354 A JP S62143354A
Authority
JP
Japan
Prior art keywords
deflecting
deflection
circuit
signals
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP28187285A
Other languages
Japanese (ja)
Other versions
JP2580114B2 (en
Inventor
Sumio Hosaka
純男 保坂
Takeshi Onishi
毅 大西
Hifumi Tamura
田村 一二三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP60281872A priority Critical patent/JP2580114B2/en
Publication of JPS62143354A publication Critical patent/JPS62143354A/en
Application granted granted Critical
Publication of JP2580114B2 publication Critical patent/JP2580114B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To aim at the promotion of high speed and high accuracy, by installing a deflecting signal generating circuit producing biaxial deflecting signals, having bipolarity, from biaxial position signals and an electrical network with resistively divides these deflecting signals and forms voltage of these deflecting signal to each electrode of a multipolar electrostatic deflecting system. CONSTITUTION:A multipolar electrostatic deflecting system 6, electrostatically deflecting a charged beam with electrodes much more than quadrupoles, for example, eight electrodes is driven. And, biaxial deflecting signals + or -Vx and + or -Vy having bipolarity are formed from biaxial position signals Vx and Vy by a deflecting signal generating circuit. Next, this deflecting signal is resistively divided whereby voltage as the deflecting signal to each electrode of the multipolar electrostatic deflecting system 6 is formed by an electric network. This electric network forms voltage as the deflecting signal to each electrode with electric potential to be secured by resistively dividing potential between these deflecting signals Vx, -Vx, Vy and -Vy and grounding and another electric potential to be secured by resistively dividing potential between these deflecting signals. This voltage is realized by a resistive dividing circuit. Thus, a driving signal to the deflecting system is formed by resistive division on the basis of two sets of biaxial deflecting signals + or -Vx and + or -Vy, so that a drive circuit of the multipolar electrostaitic deflecting system is simplifiable, thus the promotion of high speed and high accuracy are attainable.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は荷電ビーム偏向用の偏向回路に係り。[Detailed description of the invention] [Field of application of the invention] The present invention relates to a deflection circuit for deflecting a charged beam.

特に、4電極より多い電極で荷電ビームを静電偏向する
対称型多重極静電偏向器を高速、高精度に駆動するのに
好適な偏向回路に関する。
In particular, the present invention relates to a deflection circuit suitable for driving a symmetric multipole electrostatic deflector that electrostatically deflects a charged beam using more than four electrodes at high speed and with high precision.

〔発明の背景〕[Background of the invention]

従来、この種の偏向器に関して、第44回(1983年
秋季)応用物理学会学術講演会、講演予稿集。
Conventionally, regarding this type of deflector, the 44th (Autumn 1983) Academic Conference of the Japan Society of Applied Physics, a collection of lecture proceedings.

26p−T−11に記載のように、8重接静電偏向器に
は8個の駆動増幅器が必要であり、駆動増幅器を減少さ
せることのできる偏向方式の開発が重要であると指摘し
、これに対して9両極性を有する2軸の偏向信号X、−
X、Y、−Yだけで駆動できる20極不等分割円筒型静
電偏向器が提案されている。この提案方式によれば、上
記の多数の駆動増幅器が必要であるという不都合点は解
消できるが、しかし、偏向電極の高精度な加工及び組立
が要求されるという問題点がある。すなわち、多重極偏
向方式は各電極を駆動するための駆動増幅器を各々の電
極に対応して設けるために、電気特性がそろった。つま
り、オフセット電圧、ドリフト。
26p-T-11, an octuplic electrostatic deflector requires eight drive amplifiers, and points out that it is important to develop a deflection method that can reduce the number of drive amplifiers, On the other hand, the two-axis deflection signal X, - having nine polarities
A 20-pole unequally divided cylindrical electrostatic deflector that can be driven only by X, Y, and -Y has been proposed. According to this proposed method, the disadvantage of requiring a large number of drive amplifiers can be solved, but there is a problem in that highly accurate machining and assembly of the deflection electrodes is required. That is, in the multipole deflection method, a drive amplifier for driving each electrode is provided corresponding to each electrode, so that the electrical characteristics are uniform. In other words, offset voltage, drift.

ノイズなどが少ない駆動増幅器を用意する必要がある。It is necessary to prepare a drive amplifier with low noise.

しかし、8重極偏向方式は、′f4j、気回路で非回路
差補正が可能であり、上記の問題点を解消することによ
り、20極不等分割円筒型静電偏向器よりも製作容易で
、かつ、付−!IF機能が多いという長所を引き出すこ
とができる利点がある。
However, the octupole deflection method allows for non-circuit difference correction in the 'f4j, air circuit, and by solving the above problems, it is easier to manufacture than the 20-pole unevenly divided cylindrical electrostatic deflector. , and attached! It has the advantage of being able to take advantage of the many IF functions.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、従来技術での上記した問題点を解消し
、平易に形成できて高精度な、多重極偏向器駆動用の駆
動回路を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems of the prior art and to provide a drive circuit for driving a multipole deflector that can be easily formed and has high precision.

〔発明の概要〕[Summary of the invention]

本発明では、上記目的を達成するために、4電極より多
い電極で荷電ビームを静電偏向する多重極静電偏向器を
駆動する偏向回路において、2軸の位置信号V X I
 V yより両極性を有する211tl!Iの偏向信号
vX、−Vx、Vx、−v、を作る偏向信号発生回路と
、これらの偏向信号を抵抗分割することにより多重極静
電偏向器の各′電極への偏向信号としての電圧を形成す
る回路網とを備えた構成とする。
In order to achieve the above object, the present invention uses a two-axis position signal V
211tl, which is more bipolar than V y! A deflection signal generating circuit generates deflection signals vX, -Vx, Vx, -v of I, and divides these deflection signals by resistance to generate a voltage as a deflection signal to each 'electrode of a multipole electrostatic deflector. The configuration includes a circuit network to be formed.

〔発明の実施例〕[Embodiments of the invention]

以下9本発明の実施例を第1図〜第6図により説明する
Hereinafter, nine embodiments of the present invention will be explained with reference to FIGS. 1 to 6.

第1図は一実施例ブロック構成図で、8重接静電偏向器
を駆動する偏向回路の場合である。第1図において、1
は直交する2軸の位置信号vX。
FIG. 1 is a block diagram of one embodiment, which is a deflection circuit for driving an octuplic electrostatic deflector. In Figure 1, 1
are position signals vX of two orthogonal axes.

Vyを発生する位置信号発生回路、2はこの位置信号V
 Xg V yより両極性を有する2軸の偏向信号vX
、−vX、Vx、−vヶを作って出力する偏向信号発生
回路、3はこれらの偏向信号±V X r±Vアを入力
に受けて後述する抵抗分割回路によって偏向器を構成す
る各電極へ供給するための余弦分布状の8個の電圧信号
y %〜V 、 /を作る偏向電極用電圧分割回路、4
は増幅回路、5は非点収差補正用電圧信号φ8.φ2を
発生する非点収差補正用電圧源、6は■〜■の8個の電
極で構成される8重接静電偏向器である。
A position signal generation circuit that generates Vy, 2 is this position signal V
Two-axis deflection signal vX with bipolar polarity from Xg V y
, -vX, Vx, and -v, and 3 is a deflection signal generating circuit that generates and outputs these deflection signals ±V a voltage divider circuit for deflection electrodes that produces eight cosine-distributed voltage signals y%~V, / to be supplied to 4;
5 is an amplifier circuit, and 5 is an astigmatism correction voltage signal φ8. A voltage source for astigmatism correction that generates φ2, and 6 are an octuplic electrostatic deflector composed of eight electrodes ① to ②.

偏向電極用電圧分割回路3の出力信号が余弦分布状とな
るためには、その入力信号、出力信号間の関係式が (a)非点補正がない場合 ■1′=vx           )V、’=(VX
+V、)/TT    1(b)非点補正がある場合 7・′=7・す・       ) v、’=(v、+vy)/Uフーφ2   □v、’=
v、−φに          1V6’=(Vx  
Vy)/J2−φ2 1とならなければならない。
In order for the output signal of the deflection electrode voltage divider circuit 3 to have a cosine distribution, the relational expression between the input signal and the output signal is (a) When there is no astigmatism correction ■1'=vx )V,'= (VX
+V, )/TT 1(b) If there is astigmatism correction 7・'=7・su・) v,'=(v,+vy)/Ufuφ2 □v,'=
v, -φ 1V6'=(Vx
Vy)/J2-φ2 1.

従来は、これらの演算は演算増幅器により実行されて、
■1′〜V ’e /を形成していた。しかし、その場
合は回路素子の増幅度、オフセット、トリフト及びノイ
ズレベル等を一定内にそろえる必要があり、これは2回
路を複雑にし、高価なものにしていた。
Traditionally, these operations are performed by operational amplifiers,
■1'~V'e/ was formed. However, in that case, it is necessary to align the amplification degree, offset, drift, noise level, etc. of the circuit elements within a certain range, which makes the two circuits complicated and expensive.

このような問題点を解消するために1本発明では抵抗分
割回路により(1)式、(2)式を実現する。
In order to solve these problems, the present invention realizes equations (1) and (2) using a resistor divider circuit.

まず、(1)式を実現する場合、第2図のように抵抗回
路を構成すると、■1′〜Va’は次の(3)式のよう
に形成される。
First, when formula (1) is realized, if a resistor circuit is constructed as shown in FIG. 2, then (1) to Va' are formed as shown in formula (3) below.

いま、R工とR2が次の(4)式の関係を満たすように
その抵抗値を決めると、■1′は(5)式となる。
Now, if the resistance values of R and R2 are determined so that they satisfy the relationship of the following equation (4), then 1' becomes the equation (5).

R2=「Σ(R,+R,)         (4)■
□’=VX/J#            (5)さら
に、v、=vx/J1.vy=Vy/41を導入すると
、(3)式はVxとv2により(6)式のように表わさ
れる。
R2=“Σ(R,+R,) (4)■
□'=VX/J# (5) Furthermore, v,=vx/J1. When vy=Vy/41 is introduced, equation (3) is expressed as equation (6) using Vx and v2.

すなわち、第2図のような抵抗分割回路を用いれば、偏
向感度は通常の偏向感度の1/汀に低下することになる
が、入力信号を「1倍する増幅回路4を設けることによ
り1通常の偏向感度に戻すことができる。あるいは、偏
向信号発生回路2で形成する±vX、±v2をさらに「
Σ倍増幅した偏向信号としておけば、増幅回路4を介さ
ずに電圧分割回路3の出力をそのまま各電極に供給でき
るようになる。
In other words, if a resistor divider circuit as shown in Fig. 2 is used, the deflection sensitivity will be reduced to 1/1 of the normal deflection sensitivity, but by providing the amplifier circuit 4 that multiplies the input signal by 1, the deflection sensitivity will be reduced to 1/1 of the normal deflection sensitivity. Alternatively, ±vX and ±v2 formed by the deflection signal generation circuit 2 can be further
If the deflection signal is amplified by a factor of Σ, the output of the voltage dividing circuit 3 can be directly supplied to each electrode without going through the amplifier circuit 4.

第3図は非点補正がある場合の(2)式を実現するため
の実施例回路図で、非点補正電圧φ8. ・φ2より±
φ8.±φアを作り、これらの電圧を第2図の接地電位
に対して第3図に示すように印加する。
FIG. 3 is an embodiment circuit diagram for realizing equation (2) when there is astigmatism correction, in which the astigmatism correction voltage φ8.・± from φ2
φ8. ±φA are created and these voltages are applied as shown in FIG. 3 with respect to the ground potential in FIG.

第3図における偏向電圧V□′〜V 、 /は次式とな
る。
The deflection voltage V□'˜V, / in FIG. 3 is expressed by the following equation.

いま、R□、 R2,R及びrが次の(8)式を満足す
るようにそれぞれの抵抗値を決めれば、(2)式を実現
することができる。
Now, if the resistance values of R□, R2, R, and r are determined so that they satisfy the following equation (8), equation (2) can be realized.

この場合、R=rとすればR2/(R1+R2)は「l
/3 となり、vX及びv、は 3/」1倍の偏向電圧
が必要となる。さらに、r=GRとすると。
In this case, if R=r, R2/(R1+R2) is “l
/3, and vX and v require a deflection voltage 3/''1 times. Furthermore, if r=GR.

R2/(R1+R2) ハロ n/13 トなり+Vx
及びvyはR=r  の場合より小さくすることができ
る。また、φ8.φアも上記と同様な関係になるので、
実装において考慮する必要がある。
R2/(R1+R2) Halo n/13 Tonari+Vx
and vy can be made smaller than when R=r. Also, φ8. Since φa also has the same relationship as above,
Must be considered in implementation.

以上述へた抵抗回路網は抵抗値を精密に選別することに
より、高精度な演算を行なうことができる。また、抵抗
を同一環境内に設置することにより+ njL度ドリド
リフト演算増幅器を用いる場合より少ないものとするこ
とができ、さらに高精度とすることができる。また、偏
向信号発生回路2で。
The resistor network described above can perform highly accurate calculations by precisely selecting resistance values. Further, by installing the resistors in the same environment, the number of resistors can be reduced compared to the case where a +njL degree drift operational amplifier is used, and higher accuracy can be achieved. Also, in the deflection signal generation circuit 2.

必要な電圧を形成してしまう構成とすれば、増幅回路4
は全く必要なくなり、H易で安価な偏向回路とすること
ができる。
If the configuration is such that the necessary voltage is formed, the amplifier circuit 4
is not required at all, making it possible to create a deflection circuit that is easy to manufacture and inexpensive.

第4図は8電極静電偏向器6’ 、6’を直列に接続し
た2段偏向方式の駆動回路とした場合である。通常、2
段目の8電極静電偏向器6′で非点収差補正を行うので
、偏向電極用電圧分割回路3″′に、第2図に示した抵
抗回路網3′と、第3図に示した抵抗回路網3″の2つ
を使用する。これにより、荷電ビーム7を近軸近似で偏
向でき。
FIG. 4 shows a case of a two-stage deflection drive circuit in which eight-electrode electrostatic deflectors 6' and 6' are connected in series. Usually 2
Since astigmatism is corrected by the 8-electrode electrostatic deflector 6' in the second stage, the voltage divider circuit 3'' for the deflection electrode is equipped with the resistor network 3' shown in Figure 2 and the resistor network 3' shown in Figure 3. Two resistor networks 3'' are used. Thereby, the charged beam 7 can be deflected in paraxial approximation.

大角偏向が可能となる。第4図には増幅回路4を記載し
ていないが、場合によっては増幅回路4の必要もあり、
その場合も、同様の効果を生じ得て。
Large angle deflection is possible. Although the amplifier circuit 4 is not shown in FIG. 4, the amplifier circuit 4 may be necessary in some cases.
In that case, a similar effect may occur.

本発明を逸脱するものではない。This does not depart from the invention.

第5図、第6図はそれぞれ、第2図の抵抗回路網に負荷
として電気容fCaが結線された場合の位相補償例を示
す回路図である。負荷にCdが接続されると、R−Cd
の時定数で応答性が低下し。
5 and 6 are circuit diagrams showing examples of phase compensation when an electric capacitor fCa is connected as a load to the resistor network shown in FIG. 2, respectively. When Cd is connected to the load, R-Cd
Responsiveness decreases with a time constant of .

高速偏向を必要とする描画装置などへの適用が困難とな
る。これを解決するため、第5図および第6図のように
1位相補償用コンデンサCct、 C,を付加し2次の
ようにCct、Cβをきめれば、全く純抵抗負荷と同じ
になり、高速偏向を容易に実現させることができる。
This makes it difficult to apply to drawing devices that require high-speed deflection. To solve this problem, if we add a single-phase compensation capacitor Cct, C, as shown in Figures 5 and 6, and determine Cct and Cβ as quadratic, it becomes exactly the same as a pure resistive load, High-speed deflection can be easily achieved.

第5図においてHV d/ V xの伝達関数gxcs
’)は、演算子Sを用いると2次式のように表わされる
In Fig. 5, the transfer function gxcs of HV d/V x
') can be expressed as a quadratic expression using the operator S.

いま9次のような関係を満たすように、C3を決定する
と、伝達関数gよ(S)は純抵抗のみとなり。
If C3 is determined so that it satisfies the 9th order relationship, the transfer function g(S) becomes only pure resistance.

位相補償が可能となる。Phase compensation becomes possible.

第6図において= V a / (V x + Vア)
の伝達関数g2(S)は(11)式で表わされ、これよ
り、  (12)式の関係を満足するCOとすれば2位
相補償が可能どなる。
In Figure 6 = V a / (V x + V a)
The transfer function g2(S) of is expressed by equation (11), and from this, two-phase compensation becomes possible if CO satisfies the relationship of equation (12).

Cβ =  −c、+               
                     (12)
以上のような位相補償を第3図にも適用することにより
、非点収差補正機能を有する抵抗回路網においても、高
速偏向をもたらすことができる。
Cβ = −c, +
(12)
By applying the phase compensation described above to FIG. 3, high-speed deflection can be achieved even in a resistor network having an astigmatism correction function.

なお、実施例では、8型棒静電偏向器の場合について述
べたが、他の多重極静電偏向器に本方式を採用して偏向
信号を形成しても同様に効果を発揮させることができる
Although the example describes the case of an 8-type rod electrostatic deflector, the same effect can be achieved even if this method is applied to other multipole electrostatic deflectors to form a deflection signal. can.

さらに2本発明に使用する抵抗は、単体のものから2組
になったモジュール抵抗形式のもの、いずれも使用する
ことができるが、安定性や精密さなどの点からモジュー
ル抵抗形式のものが望ましい。
Furthermore, the resistor used in the present invention can be either a single resistor or a module resistor consisting of two sets, but it is preferable to use a module resistor in terms of stability and precision. .

さらに、前述の実施例では、アライナ機能については説
明しなかったが、2組の偏向信号±V x r±vyに
アライナ用直流電圧を印加すれば、アライナ機能が実現
でき、これも本発明の内容を逸脱するものではない。
Furthermore, although the aligner function was not explained in the above embodiment, the aligner function can be realized by applying an aligner DC voltage to the two sets of deflection signals ±V x r±vy, which is also a feature of the present invention. This does not deviate from the content.

また、実施例では、多重極として8極の場合を例に採っ
て説明したが、8極を超える多重極9例えば12極、1
6極、20極等の場合にも、同様に構成することができ
、同様の効果を生じさせることができる。
In addition, in the embodiment, the case where the multipole is 8 poles is taken as an example and explained, but the multipole 9 exceeding 8 poles, for example,
Even in the case of 6 poles, 20 poles, etc., the same structure can be used and the same effect can be produced.

〔発明の効果〕〔Effect of the invention〕

以上説明したように2本発明によれば、4電極より多い
電極を有する偏向器への駆動信号を、2組の2軸偏向信
号±V X 、±vyを基に抵抗分割によって形成する
構成であるので、従来使用されていた高速、高精度の高
電圧用増幅器の採用が全く不要となり、多重極静電偏向
器の駆動回路が簡略化し、高速、高精度化できるという
効果がある。
As explained above, according to the present invention, a drive signal to a deflector having more than four electrodes is formed by resistance division based on two sets of biaxial deflection signals ±V x and ±vy. Therefore, there is no need to employ a high-speed, high-precision, high-voltage amplifier that has been used in the past, and the drive circuit for the multipole electrostatic deflector can be simplified, resulting in higher speed and higher precision.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例ブロック構成図、第2図は非
点収差補正がない場合の一実施例回路図。 第3図は非点収差補正がある場合の一実施例回路図、第
4図は本発明を2段偏向方式に適用する場合の実施例ブ
ロック構成図、第5図、第6図はそれぞれ高速偏向用の
位相補値回路の実施例図である。 く符号の説明〉 1・・・位盾信号発生回路 2・・・偏向信号発生回路
3.3’、3’・・・偏向電極用電圧分割回路4・・・
増幅回路     5・・・非点補正電源6.6’、6
″・・・8重極静電偏向器代理人弁理士  中 村 純
之助 ′? 2国 矛3 図 り 一■フ
FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a circuit diagram of an embodiment without astigmatism correction. Fig. 3 is a circuit diagram of an embodiment with astigmatism correction, Fig. 4 is a block diagram of an embodiment in which the present invention is applied to a two-stage deflection system, and Figs. 5 and 6 are high-speed, respectively. FIG. 3 is an example diagram of a phase complement circuit for deflection. Explanation of symbols> 1... Shield signal generation circuit 2... Deflection signal generation circuit 3. 3', 3'... Deflection electrode voltage dividing circuit 4...
Amplifier circuit 5... Stigma correction power supply 6.6', 6
″...Junnosuke Nakamura, patent attorney representing the 8-pole electrostatic deflector''?

Claims (8)

【特許請求の範囲】[Claims] (1)4重極より多い電極で荷電ビームを静電偏向する
多重極静電偏向器を駆動する偏向回路において、2軸の
位置信号v_x、v_yより両極性を有する2軸の偏向
信号V_x、−V_x、V_y、−V_yを作る偏向信
号発生回路と、上記偏向信号を抵抗分割することにより
上記多重極静電偏向器の各電極への偏向信号としての電
圧を形成する回路網とを備えたことを特徴とする偏向回
路。
(1) In a deflection circuit that drives a multipole electrostatic deflector that electrostatically deflects a charged beam with more electrodes than quadrupole, a two-axis deflection signal V_x having bipolarity from two-axis position signals v_x and v_y, -V_x, V_y, -V_y; and a circuit network that divides the deflection signal by resistance to form a voltage as a deflection signal to each electrode of the multipole electrostatic deflector. A deflection circuit characterized by:
(2)前記回路網が、前記偏向信号V_x、−V_x、
V_y、−V_yと接地間電位を抵抗分割して得る電位
と、前記各偏向信号間電位を抵抗分割して得る電位とで
上記各電極への偏向信号としての電圧を形成することを
特徴とする特許請求の範囲第1項記載の偏向回路。
(2) the circuitry is configured to transmit the deflection signals V_x, -V_x,
A voltage as a deflection signal to each of the electrodes is formed by a potential obtained by resistively dividing the potential between V_y, -V_y and the ground, and a potential obtained by resistively dividing the potential between the respective deflection signals. A deflection circuit according to claim 1.
(3)前記回路網が、荷電ビームの非点収差補正用の電
圧源を備えた回路網であることを特徴とする特許請求の
範囲第1項記載の偏向回路。
(3) The deflection circuit according to claim 1, wherein the circuit network includes a voltage source for correcting astigmatism of a charged beam.
(4)前記回路網の出力が直接に前記多重極静電偏向器
の電極と結線していることを特徴とする特許請求の範囲
第1項〜第4項のいずれかに記載の偏向回路。
(4) The deflection circuit according to any one of claims 1 to 4, wherein the output of the circuit network is directly connected to an electrode of the multipole electrostatic deflector.
(5)前記偏向信号の電圧絶対値が、常に、前記回路網
の出力電圧より小さくならないように回路網内の各抵抗
の抵抗値が選択されていることを特徴とする特許請求の
範囲第1項〜第4項のいずれかに記載の偏向回路。
(5) The resistance value of each resistor in the circuit network is selected so that the absolute voltage value of the deflection signal is always not smaller than the output voltage of the circuit network. The deflection circuit according to any one of items 1 to 4.
(6)前記回路網の負荷がコンデンサ負荷であり、前記
回路網に位相補償用のコンデンサを備えていることを特
徴とする特許請求の範囲第1項〜第4項のいずれかに記
載の偏向回路。
(6) The deflection according to any one of claims 1 to 4, wherein the load of the circuit network is a capacitor load, and the circuit network includes a capacitor for phase compensation. circuit.
(7)前記回路網の抵抗がモジュール抵抗によって構成
されていることを特徴とする特許請求の範囲第1項〜第
4項のいずれかに記載の偏向回路。
(7) The deflection circuit according to any one of claims 1 to 4, wherein the resistance of the circuit network is constituted by a module resistor.
(8)前記回路網の各抵抗が同一環境内に設置されてい
ることを特徴とする特許請求の範囲第1項〜第4項のい
ずれかに記載の偏向回路。
(8) The deflection circuit according to any one of claims 1 to 4, wherein each resistor of the circuit network is installed in the same environment.
JP60281872A 1985-12-17 1985-12-17 Deflection circuit Expired - Lifetime JP2580114B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60281872A JP2580114B2 (en) 1985-12-17 1985-12-17 Deflection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60281872A JP2580114B2 (en) 1985-12-17 1985-12-17 Deflection circuit

Publications (2)

Publication Number Publication Date
JPS62143354A true JPS62143354A (en) 1987-06-26
JP2580114B2 JP2580114B2 (en) 1997-02-12

Family

ID=17645148

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60281872A Expired - Lifetime JP2580114B2 (en) 1985-12-17 1985-12-17 Deflection circuit

Country Status (1)

Country Link
JP (1) JP2580114B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02260359A (en) * 1989-03-31 1990-10-23 Ulvac Corp Ion implantation apparatus for parallel scanning
JP2015511055A (en) * 2012-03-06 2015-04-13 ヴィゲー・シエンタ・アーベー Analytical equipment for particle spectrometer
JP2018119974A (en) * 2018-02-28 2018-08-02 シエンタ・オミクロン・アーベー Analyser for particle spectrometer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57147856A (en) * 1981-03-06 1982-09-11 Koichi Kanetani Deflecting device of automatic astigmation compensation type

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57147856A (en) * 1981-03-06 1982-09-11 Koichi Kanetani Deflecting device of automatic astigmation compensation type

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02260359A (en) * 1989-03-31 1990-10-23 Ulvac Corp Ion implantation apparatus for parallel scanning
JP2015511055A (en) * 2012-03-06 2015-04-13 ヴィゲー・シエンタ・アーベー Analytical equipment for particle spectrometer
US9437408B2 (en) 2012-03-06 2016-09-06 Scienta Omicron Ab Analyser arrangement for particle spectrometer
US9978579B2 (en) 2012-03-06 2018-05-22 Scienta Omicron Ab Analyser arrangement for particle spectrometer
JP2018119974A (en) * 2018-02-28 2018-08-02 シエンタ・オミクロン・アーベー Analyser for particle spectrometer

Also Published As

Publication number Publication date
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