JPS62143324U - - Google Patents

Info

Publication number
JPS62143324U
JPS62143324U JP3114286U JP3114286U JPS62143324U JP S62143324 U JPS62143324 U JP S62143324U JP 3114286 U JP3114286 U JP 3114286U JP 3114286 U JP3114286 U JP 3114286U JP S62143324 U JPS62143324 U JP S62143324U
Authority
JP
Japan
Prior art keywords
wavelength
output terminal
input terminal
parallel resonant
resonant circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3114286U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3114286U priority Critical patent/JPS62143324U/ja
Publication of JPS62143324U publication Critical patent/JPS62143324U/ja
Pending legal-status Critical Current

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Landscapes

  • Control Of Motors That Do Not Use Commutators (AREA)
  • Filters And Equalizers (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案の高周波低域ろ波器の一実施
例の回路図であり、第2図は、第1図の回路の実
装基板の平面図であり、第3図は、第2図の裏面
図であり、第4図は、従来の集中定数回路からな
る高周波低域ろ波器の回路図であり、第5図は、
第4図の回路の実装基板の漂面図であり、第6図
は、第5図の裏面図である。 3,4:集中インダクタンス、6,8:集中容
量、11:入力端子、12:出力端子、13,1
4,15:開放スタブ。
FIG. 1 is a circuit diagram of one embodiment of the high-frequency low-pass filter of the present invention, FIG. 2 is a plan view of a mounting board of the circuit of FIG. 1, and FIG. FIG. 4 is a circuit diagram of a high frequency low-pass filter consisting of a conventional lumped constant circuit, and FIG. 5 is a back view of the figure.
6 is a side view of a mounting board of the circuit of FIG. 4, and FIG. 6 is a back view of FIG. 5. 3, 4: lumped inductance, 6, 8: lumped capacitance, 11: input terminal, 12: output terminal, 13, 1
4,15: Open stub.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力端子と出力端子との間に、集中容量と集中
インダクタンスからなる並列共振回路を複数個直
列に介装し、これらの並列共振回路の相互の接続
点および前記入力端子と出力端子側にそれぞれマ
イクロストリツプ線路で形成した開放スタブを接
続し、これらの開放スタブの長さを通過帯域の最
高周波数の波長の1/4以下であつて阻止帯域の
特定周波数の波長の1/4としたことを特徴とす
る高周波低域ろ波器。
A plurality of parallel resonant circuits consisting of lumped capacitance and lumped inductance are interposed in series between the input terminal and the output terminal, and a microelectronic circuit is connected at the mutual connection point of these parallel resonant circuits and on the input terminal and output terminal sides, respectively. Open stubs formed by strip lines are connected, and the length of these open stubs is 1/4 or less of the wavelength of the highest frequency in the pass band and 1/4 of the wavelength of a specific frequency in the stop band. A high-frequency low-pass filter featuring:
JP3114286U 1986-03-03 1986-03-03 Pending JPS62143324U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3114286U JPS62143324U (en) 1986-03-03 1986-03-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3114286U JPS62143324U (en) 1986-03-03 1986-03-03

Publications (1)

Publication Number Publication Date
JPS62143324U true JPS62143324U (en) 1987-09-10

Family

ID=30836606

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3114286U Pending JPS62143324U (en) 1986-03-03 1986-03-03

Country Status (1)

Country Link
JP (1) JPS62143324U (en)

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