JPS62141871A - Picture recording and reproducing device - Google Patents

Abstract

PURPOSE:To prevent the mixture of a portion below the black level and a negative synchronizing signal at reproduction by clipping the portion of a video signal below the black level into the black level before the negative synchronizing signal is added in a device recording the video signal while adding the negative synchronizing signal newly. CONSTITUTION:The portion of a MUSE signal inputted below the black level is clipped into the black level by a clip circuit 1 and its output is subject to A/D conversion and the result is fed in to a memory 3 and a synchronization detection circuit 4. The circuit 4 detects a frame pulse and a positive synchronizing signal from the MUSE signal. A negative synchronizing generation circuit 7 consists of, e.g., a ROM, a digital data of the negative synchronizing signal written in advance in the ROM by a readout clock is read synchronously with the synchronizing information from the circuit 4 and the negative synchronizing signal to be inserted newly is generated. A readout output from the memory 3 and the output from the circuit 7 are switched synchronously with the said synchronizing information and the negative synchronizing signal is added newly to the MUSE signal subject to time axis compression at each 1H.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a recording and reproducing apparatus that records a video signal having a positive synchronization signal as the same amount signal after adding a new negative synchronization signal thereto.

[Conventional technology]

The video signal bandwidth of a conventional television signal (hereinafter abbreviated as TV signal), for example, an NTSC TV signal, is 4.2 MH.
It is z. On the other hand, in high-definition TV systems, which have been developed as next-generation TV systems and are entering the practical stage, the number of scanning lines per frame is 1125, about twice that of the NTSC system, and the aspect ratio of one screen is 3:5. For this reason, the video signal bandwidth is approximately 20 MHz, which is a wide band.

To transmit such a wideband signal (hereinafter referred to as a high-definition TV signal) by FM, a transmission band approximately three times the bandwidth of the high-definition TV signal is required, so the frequency band per channel is 27M. Hz satellite broadcast,
Alternatively, it cannot be transmitted using a video tape recorder (hereinafter abbreviated as VTR) or a video disc (hereinafter abbreviated as VD), etc., which have a narrow transmission bandwidth. Therefore, by subsampling the high-definition TV signal, the bandwidth can be increased to approximately 8MHz.
The so-called M U S E (Multi
pleSub-Nyquist Sampling E
ncoding> method has been developed, and this is described in, for example, NHK Giken Monthly Report, July 1982. P19～
30 etc. is already known.

The signal format of one horizontal scanning line of the TV signal (hereinafter referred to as MUSE signal) in the MUSE system is shown in Figure 4 (In).
! Shown in simple form. In the figure, C is a color signal (C signal) of the video signal, Y is a luminance signal (Y signal) of the video signal, and the C signal is line-sequentially compressed on the time axis to 1/4. Also H
D is a horizontal synchronization signal, the synchronization type is positive synchronization, and the synchronization signal is within the voltage range of the video signal.

Further, FIG. 5 shows the format of a frame pulse, which is a frame period synchronization signal in the MUSE signal.

These frame pulses are located on the 605th and 606th scanning lines of 1125 scanning lines in one frame, and are binary signals whose amplitude is 100% of the voltage range occupied by the analog video signal, as shown.

In addition, the MUSE signal includes scanning lines through which binary signals such as control signals and block control signals are transmitted. Therefore, it can be said that the MUSE signal has a signal format in which an analog signal, which is a video signal, and a digital signal, such as a block control signal, which is information regarding the video signal, are time-division multiplexed.

If the aperture correction characteristics are not appropriate in a signal source that generates this type of MUSE signal,
In the case of L, overshoot or undershoot occurs in binary signal portions such as the frame pulse and block control signal, and a signal with a level lower than the black level of the video signal may be generated. Further, when a VTR is used as a signal source of the MUSE signal, that is, when dubbing from a VTR is performed, a signal having a level lower than the black level of the video signal is also generated due to occurrence of dropout.

By the way, since the MUSE method uses subsampling as mentioned above, there are strict requirements for reducing time axis fluctuations (hereinafter referred to as jitter), and for transmission line outputs such as VTRs and VDs where jitter can occur, the time axis Fluctuation correction value W
(TBC) is required. MUS shown in Figure 4(a)
If the E signal remains as it is, there is no positive synchronization signal HDL as a signal for jitter detection, but due to its nature, the positive synchronization signal cannot be easily synchronously separated or clamped by amplitude separation like the negative synchronization signal.

Therefore, conventional techniques (for example, Hitachi Hyoron, Vol. 67).

No. 5, PP63-66), the MUSE signal is compressed on the time axis every LH (H is the horizontal scanning period) as shown in Fig. 4(b), and the resulting blanking interval during playback is clamped. The burst and negative synchronization signals necessary for jitter detection were newly added before recording.

[Problem that the invention seeks to solve]

However, in the conventional recording/playback device as described above, if the input video signal to be recorded contains a portion below the black level due to the reasons mentioned above, the portion below the black level of this input signal is There is a problem in that it becomes difficult to distinguish between the negative synchronization signal and the newly added negative synchronization signal during recording, and the detection of the negative synchronization signal or the clamping operation may be incorrect during playback.

This invention was made to solve the above problem. Even if the input video signal to be recorded contains a portion below the black level, it may be confused with the newly added negative polarity synchronization signal. It is an object of the present invention to provide a recording/playback device that does not make mistakes in 3tII detection or clamping operations during playback.

[Failure to solve the problem]

The present invention provides a recording and reproducing apparatus that newly adds a negative synchronization signal to a video signal having a positive synchronization signal and records the video signal.
A clipping circuit is provided for clipping the portion of the video signal below the black level to the black level before adding the negative synchronization signal.

[Effect]

In this invention, when a video signal having a positive synchronization signal is input, a portion of the video signal below the black level is clipped to the black level by the clipping circuit, and then a negative synchronization signal is added to this video signal. This is recorded, and as a result, during playback, the portion of the input video signal below the black level and the negative synchronization signal will not be the same.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a recording and reproducing apparatus according to an embodiment of the present invention. FIG. 1(a) is a block diagram showing a signal processing circuit during recording in the recording/reproducing apparatus. In the figure, 1 is a clip circuit that receives the input MUSE signal and clips the portion of the video signal below the black level to the black level, and 2 is the MUSE signal after passing through the clip circuit 1.
An A/D converter that converts the USE signal into a digital signal, 3 a memory used to compress the time axis of the MUSE signal every lH, and 4 an M that has been converted into a digital signal.
From USE signal to frame pulse FP, positive synchronization signal HD
5 is a frame pulse FP,
An A/D that generates a driving clock for the A/D converter 2 and a writing clock for the memory 3 in synchronization with the forward synchronization signal HD.
A clock generation circuit 6, a read clock generation circuit that generates a memory read clock for time axis compression by multiplying the A/D clock, 7 a frame pulse FP
, 17i to be newly inserted in synchronization with the positive synchronization signal HD
A negative synchronization generation circuit that generates a synchronization signal, 8 a mixing circuit that adds a negative synchronization signal generated by the negative synchronization generation circuit 7 to the blanking interval of the MtJSE signal time-base compressed for each IH, and 9 a negative synchronization circuit. This is a D/A conversion circuit that converts the MUSE signal to which the signal has been added back into an analog signal.

In addition, FIG. 1(b) is an example of a specific circuit of the clip circuit 1 shown in FIG. 1(al). In FIG. They are common. R1 is the input resistance that determines the base current of transistor Q1, Re is the emitter resistance of transistors Q1 and Q2, and Rv is used to adjust the voltage level when clipping the input signal by this clip circuit 1. The other variable resistor, Vcc, is the transistor Ql.
, the collector power supply of Q2, ■, is the transistor Ql, Q2
The emitter power supply of II m f b is the variable resistor R
This is the negative side power supply of V. Also, V, l, , are variable resistances RV
This is the reference voltage determined by the adjustment of .

Next, the operation will be explained.

In FIG. 1(a), the input MUSE signal first enters a clipping circuit 1, where the portion of the signal below the black level is clipped to the black level. The output of the clipping circuit 1 is converted into a digital signal by the A/D converter 2, and the MUSE signal converted into the digital signal is sent to the memory 3 and the synchronization detection circuit 4. same! The t11 detection circuit 4 detects the frame pulse FP and the positive synchronization signal HD from the MUSE signal, and the A/D clock generation circuit 5.1
], synchronization information of the video signal is sent as output to the local generation circuit 7 and the mixing circuit 8. Here, the same jlJl detection circuit 4
Although the format of the positive synchronization signal HD to be detected at is positive synchronization as described above, at this point it is still MUSE
Since the signal does not contain jitter, it can be said that it is easier to detect the positive synchronization signal 1-II) from the jittery reproduced MUSE signal.

Further, in the A/D clock generation path 5, a PLL that generates a clock for A/D conversion in synchronization with the frame pulse FP and the positive synchronization signal HD is configured.
The clock is sent to the A/D converter 2 as its driving clock, and is also sent to the memory 3 as its writing clock. In the read clock generation circuit 6, the A/D
A PLL that multiplies the clock is configured to generate a memory read clock such that the input MUSE signal has a predetermined compression ratio, and this is sent to the memory 3 and the negative synchronization generation circuit 7. In the memory 3, the MUSE signal digitized by the A/D clock is written,
By reading out the MUSE signal in the memory 3 using the readout clock obtained by multiplying the A and /D clock signals by a predetermined ratio, it is possible to add a negative polarity synchronization signal, etc., as shown in FIG. 4 (bl). Time axis compression is performed.

Further, the negative polarity synchronization generation circuit 7 is, for example, a read-only memory.
(ROM), this negative polarity synchronization generation circuit 7
Now, the same from synchronization detection circuit 4! In synchronization with the J1 information, digital data of a negative synchronization signal written in advance in the ROM is read out by the read clock, and a new negative synchronization signal to be inserted is generated. In the mixing circuit 8,
The readout output from the memory 3 and the output from the negative synchronization generation circuit 7 are switched at a predetermined timing in synchronization with the synchronization information from the synchronization detection circuit 4, and the MUSE signal is time-base compressed for each IH. A new negative synchronization signal is added. The output of the mixing circuit 8 is converted into an analog signal by a D/A converter 9 and sent to, for example, a recording system of a VTR, that is, an FM modulation system.

Next, the operation of the clip circuit 1 will be explained in detail with reference to FIG. 1 (bl) and FIG. 2. Here, FIG.

Transistors Q1 and Q2 are emitter-coupled, and the voltage of the input MUSE signal is applied to the base of transistor Q1 via input resistor R1, while the negative power supply VRefb and variable resistor RV are applied to the base of transistor Q2. The reference voltage V determined by 1. f is applied. Also, the voltage drop between the base and emitter (for example, 0.7V) when the transistor Q2 is in operation is (2). shall be.

Now, if the MUSE signal is larger than (V*-t Vb.), that is, if the MUSE signal input is higher than the voltage level shown by the solid line in FIG.
2 is off and transistor Q1 operates as a simple emitter follower, so the output of clip circuit 1 is equal to the input MUSE signal.

However, when the input voltage becomes smaller than (VRlt VbJ), that is, when the MUSE signal input becomes lower than the voltage level shown by the solid line in FIG. 2(a), transistor Q2 turns on and the output of clip circuit 1 becomes (■). −
Vb-), and as shown in Figure 2 (bl), the part indicated by the broken line is the voltage level indicated by the solid line (■□t Vb-).
> will be clipped. Therefore, ko0) (Vast V
The variable resistor RV is adjusted so that b-) becomes the black level of MUSE@, and the portion lower than the black level is clipped to the black level.

Further, in the above embodiment, the clipping circuit 1 is constructed of an analog circuit, but it can also be constructed of a digital circuit that inputs digital data after A/D conversion. This will be explained next. FIG. 3(a) is a block diagram showing a second embodiment of the present invention. In the same figure, the same reference numerals as in FIG. This explanation will be omitted. Third
The only difference between FIG. 1(a) and FIG.
This is the point placed after the A/D converter 2.

The detailed structure of this digital clipping circuit 10 is shown in FIG. 3 fb), in which the digital data after A/D conversion is depicted as 6 bits for convenience. In the figure, D0 to D are inputs M U that have been A/D converted to 6 bits.
S E signal digital data, L)llof is M
t, 'SE Corresponds to the digital data when the black level of the E signal is A/D converted, and here it is assumed that roloo
Suppose that ooj. Also, DCOI% is data compared with DRaf, and here it is “D5D4D3D,,DI
Doj is that. 11 is a digital comparator which uses the DR*f as reference data and the D C0I11$1 as compared data; 12 is an inverter; 13 and 15 to 18 are two-input AND gates; and 14 is a two-input OR gate; Do' to D5. ' is digital clip circuit 1
0 output data (6 bits).

Next, the operation will be explained. In the operation explanation, the first
Components denoted by the same reference numerals in FIG. 3(a) and FIG. 3(a) have the same functions, so a detailed explanation thereof will be omitted.

Therefore, the operation of the digital clip circuit 10 will be explained with reference to FIG.
The digitized input data D0 to D after D conversion are sent to the digital comparator 11 as compared data D co-
Each bit is also sent to one of the inputs of gate circuits 13-18. In the digital comparator 11, Doo, that is, rDs D4D3 D
Z DI Do J and D11@f i.e. ro 100
D c compared with 00J.

If 1≧D□, enter “1”, D C0m9 < D
In the case of Ref, "0" is output. And DC6, Ip
≧D, ll, f, and when the output of the digital comparator 11 is "1", the AND gates 13 and 15 to 18 are opened, and the inverter 12 is also connected to the OR gate 14.
Since the output "0" of D0 is sent and the gate also opens, D0
~D is the output D of the digital clip circuit 10 as it is.
O°~D5".

On the other hand, when D co++++ <D R11r and the output of the digital comparator 11 is "0", the AND gates 13 and 15 to 18 are closed and the output is "
0'', and the OR gate 14 also closes due to the output ``1'' of the inverter 12, and its output becomes ``1''.
1'', so the output r of the digital clip circuit 10
Ds'D,'D3'D2'D,'DO' is ro
It is fixed at looooJ and clipped as the black level data.

In the apparatus of this embodiment as described above, after clipping the portion of the input MUS5 signal below the black level to the black level, a negative synchronization signal is added to this and recorded, so that the input MUS5 signal to be recorded is Even if the SE signal contains a portion below the black level, this will not be confused with the negative synchronization signal, and errors in detection and clamping of the negative synchronization signal during reproduction can be prevented.

In the above two embodiments, a case was described in which the time axis of the MLISE signal input is compressed for each IH and a new negative polarity synchronization signal is added, but the time axis is not compressed for each IH and the positive polarity is When deleting the synchronization signal HD and inserting a negative synchronization signal in its place, correcting time axis fluctuations using the negative synchronization signal during playback, and deleting the negative synchronization signal to restore the positive synchronization signal HD. However, it has the same effect as the above embodiment.

Furthermore, in the above embodiment, a case has been described in which the newly added signal during recording is only the negative polarity synchronization signal. However, it is not necessary to limit the newly added signal to only the negative polarity synchronization signal. Even when a burst signal is added to improve accuracy, the same effects as in the above embodiment can be obtained.

Furthermore, if simply deleting the positive synchronization signal HD during recording does not provide enough time to add a new signal such as a negative synchronization signal or a burst signal,
In addition to deleting the positive synchronization signal HD, the time axis is compressed for each IH, a new negative synchronization signal and a burst signal are added, and these newly added signals are used during playback to correct time axis fluctuations. Moreover, even if the newly added signal is deleted to restore the positive polarity synchronization signal and the time axis is expanded for each IH to return to the original M tJ SF signal, the effect of the present invention is still the same as the above implementation. There is nothing different from the example.

〔Effect of the invention〕

As described above, according to the present invention, 9. Record with polar synchronization signal added,
In the recording/playback device for playback, we have installed a clipping circuit that clips the portion of the input video signal below the black level to the black level before adding a negative synchronization signal during recording. Even if a portion below the level is included, it is possible to prevent errors from occurring in the detection and clamping operation of the negative synchronization signal during reproduction due to the indistinguishability from the negative synchronization signal.

[Brief explanation of drawings]

FIG. 1 (al) is a block diagram showing a pre-recording signal processing circuit of a recording/playback apparatus according to the first embodiment of the present invention, and FIG. 1(b) shows a detailed configuration of the clip circuit of FIG. 1(a). The circuit diagrams shown in FIGS. 2(a) and 2(b) are waveform diagrams of the MUSE input and clipping output for explaining the operation of the clip circuit, and FIG. A block diagram showing the signal processing circuit of the playback device before recording, FIG. 3 (bl is a diagram showing the detailed configuration of the digital clip circuit in FIG. 3 (al), FIG. Fig. 4(b) is the same as Fig. 4(a).
FIG. 5 is a diagram showing the frame pulse of the MUSE signal. 1... Clip circuit, 2... A/D converter, 7...
・Negative polarity synchronization generation circuit, 8...Mixing circuit, 11...Digital clip circuit. Note that the same reference numerals in the figures indicate the same or equivalent parts. Agent Ken Hayase - Figure 1 Figure 3 (b) 1) ()o~D5 Figure 4 Figure 5 Procedural amendment (voluntary) March 12, 1988

Claims (3)

[Claims] (1) In a recording/playback device that adds a negative synchronization signal to a video signal that has a positive synchronization signal and records it, the portion of the input video signal that is below the black level is set to the black level before adding the negative synchronization signal to it during recording. A recording/playback device characterized by being provided with a clip circuit for clipping. (2) The recording and reproducing apparatus according to claim 1, wherein the clipping circuit is constituted by an analog circuit. (3) The recording and reproducing apparatus according to claim 1, wherein the clipping circuit is constituted by a digital circuit that digitally clips the input video signal after A/D converting the input video signal.