JPS62139381A - Semiconductor light emitting element - Google Patents

Semiconductor light emitting element

Info

Publication number
JPS62139381A
JPS62139381A JP28044685A JP28044685A JPS62139381A JP S62139381 A JPS62139381 A JP S62139381A JP 28044685 A JP28044685 A JP 28044685A JP 28044685 A JP28044685 A JP 28044685A JP S62139381 A JPS62139381 A JP S62139381A
Authority
JP
Japan
Prior art keywords
layer
cladding layer
type
light emitting
cladding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP28044685A
Other languages
Japanese (ja)
Inventor
Yoshio Iizuka
飯塚 佳男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP28044685A priority Critical patent/JPS62139381A/en
Publication of JPS62139381A publication Critical patent/JPS62139381A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To make a light emitting spot small by reducing the leakage current from a cutout and restraining natural light emitting components by separating a cladding layer into a cladding layer on the active layer side and a current constriction layer. CONSTITUTION:On an N-type GaAs substrate 11, an N-type buffer layer 12, an N-type first cladding layer 13, a P-type active layer 14, and a second cladding layer 15 are laminated. This cladding layer 15 is composed of a current constriction layer 16 composed of an N-type third cladding layer 16a on the side of the active layer 14 and a GaAs layer 16b. On a wafer thus formed, a masking member having a stripe vertical to a cleavage direction is formed and the constriction layer 16 is selectively etched by use of an etching solution so as to form a cutout 17. Furthermore, a P-type light guiding layer 18 and an ohmic layer 20 are grown in order to fill the cutout 17. Then, the leakage current from the cutout 17 is reduced to make a light emitting spot small.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は半導体発光素子に関し、特にGaAIAaを用
いた8 00 nm  前後の発光波長をもつレーデダ
イオードに係わる。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor light emitting device, and particularly to a Raded diode using GaAIAa and having an emission wavelength of around 800 nm.

〔発明の技術的背景〕[Technical background of the invention]

従来、M OCV D法又はM B E (Molec
ularf3eam Bpj taX)’)法をM’v
sたv−rZイ、t−)’として、例えば第2図に示す
ものが知られている。
Conventionally, MOCVD method or MBE (Molec
ularf3eam Bpj taX)') method M'v
For example, the one shown in FIG. 2 is known as stavrZi,t-)'.

図中の1は、N型のQ a A S基板である。この基
板1上には、N型のGaAs層(バッファ層)2、N型
のGat−xAlxAsJlm (第1のクラッド層)
3及びGa1−yAlyAs層(活性層)4が順次設け
られている。前記活性層4上には、P型のGa1−zA
lzAs層(第2のクラッド層)5及びN型のGaAs
層(′を流挟挿層)6が設けられている。
1 in the figure is an N-type Q a AS substrate. On this substrate 1, an N-type GaAs layer (buffer layer) 2 and an N-type GaAs layer (first cladding layer) are formed.
3 and a Ga1-yAlyAs layer (active layer) 4 are sequentially provided. On the active layer 4, P-type Ga1-zA
lzAs layer (second cladding layer) 5 and N-type GaAs
A layer 6 is provided.

この電流挟挿層6には、第2のクラッド層5の所定の深
さまで達するストライプ状の欠損部7が設けられている
。この欠損部7には、P型のGa1−vAevAs# 
(光ガイド層)8及びP型のQai−uAguAsi 
(第3のクラッド層)9が埋め込まれている。なお、こ
の埋め込みにより欠損部7の内外での実効屈折率差を形
成し、活性層に水平な方向のモード制御を行っている。
This current intercalation layer 6 is provided with a striped defect 7 that reaches a predetermined depth of the second cladding layer 5 . This defective part 7 contains P-type Ga1-vAevAs#
(Light guide layer) 8 and P type Qai-uAguAsi
(Third cladding layer) 9 is embedded. Note that this filling creates an effective refractive index difference between the inside and outside of the defective portion 7, and controls the mode in the direction horizontal to the active layer.

前記第3のクラッド層9上には、P型のGaAs層(オ
−ミック層)10が設けられている。
A P-type GaAs layer (ohmic layer) 10 is provided on the third cladding layer 9.

〔背景技術の問題点〕[Problems with background technology]

ところで、前述したレーデダイオードは、平坦な活性層
をもつ屈折率ガイド型レーデとして優れたものである。
Incidentally, the above-mentioned Radede diode is excellent as a refractive index guided type Radede having a flat active layer.

しかし、充分なモード制御を行うには、詳細な構造の制
御か必要になる。
However, sufficient mode control requires detailed structural control.

例えば、x=o、45 t y=0.12 s z=0
.45゜v=0.25 、 u=0.45の場合、各層
の厚みを第1のクラッド層3が1.5μm、活性層4が
0.08μm、第2のクラッド層5が1、Oμm%電流
狭搾層挟挿LOμrtc、光ガイド層8が0.25pm
For example, x=o, 45 t y=0.12 s z=0
.. 45° When v=0.25 and u=0.45, the thickness of each layer is 1.5 μm for the first cladding layer 3, 0.08 μm for the active layer 4, and 10 μm% for the second cladding layer 5. Current constriction layer interposed LO μrtc, light guide layer 8 is 0.25 pm
.

83のクラッド層9が1.2μm として、活性層4と
光ガイド層8の間隔d t−0,3μ馬、欠損部7の底
面の巾lを2μ罵程度に制御することが必要である。但
し、この場合でも欠損部7の直下だけでなく、側面の第
2のクラッド層5にも電流が流れるため、活性層4の比
較的広い傾城に電流が注入される。従って、発光鎖酸が
広くなり、自然発光成分が多くなるという不都合がある
It is necessary to control the cladding layer 9 of 83 to be 1.2 .mu.m, the distance dt-0 between the active layer 4 and the light guide layer 8 to be 3 .mu.m, and the width l of the bottom surface of the defective portion 7 to be approximately 2 .mu.m. However, even in this case, the current flows not only directly under the defective portion 7 but also through the second cladding layer 5 on the side surface, so that the current is injected into the relatively wide slope of the active layer 4. Therefore, there is a disadvantage that the luminescent chain acid becomes wide and the number of spontaneous luminescent components increases.

ご発明の目的〕 本発明は上記事情に鑑みてなされたもので、自然発光成
分を抑制しえる半導体発光素子を提供することを目的と
する。
Purpose of the Invention The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a semiconductor light emitting device that can suppress spontaneous luminescence components.

〔発明の概要〕[Summary of the invention]

本発明は、従来の第2のクラッド層を活性層に近い第2
のクラッド層と、電流挟挿機能をもつ少なくとも第3の
クラッド層からなる電流挟挿層とに分離した構造とする
ことによ)、電流挟挿層リストライプ状の欠損部側面か
らの電流リークを削減し、自然発光成分の抑制を図った
ことを骨子とする。
The present invention replaces the conventional second cladding layer with a second cladding layer near the active layer.
By creating a structure in which the current sandwiching layer is separated into a cladding layer and a current sandwiching layer consisting of at least a third cladding layer having a current sandwiching function), current leakage from the side surface of the defective part of the current sandwiching layer restripe can be prevented. The main idea is to reduce the amount of light emitted from natural light and suppress the natural luminescent component.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明の一実施例に係るレーデダイオードを製造
工程順に第1図(a)〜(c)を参照して説明する。
Hereinafter, a radar diode according to an embodiment of the present invention will be explained in the order of manufacturing steps with reference to FIGS. 1(a) to 1(c).

まず、N型のQaAa基板11上に厚さ1μ罵のN型の
GaAs f* (バッファ層)12、厚さ1.5μ扉
のN型のQax−xAgxA4 (第1のクラッドW1
)13、厚さ0.08μ肩のP型のQa 1−yAeY
A”層(活性層ン14、厚さ0.3μ専のP型のQa 
l−zAgzAs層(第2のクラッド層)15゜厚さ1
.2μmのN型のQi l−wAJwAs層(第3のり
2ラド層)16a及び厚さ1. Opm OGaAs 
層(If−V族化合物半導体層)16bからなる電流挟
挿層16を順次成長した(第1図(、)図示)。
First, on an N-type QaAa substrate 11, an N-type GaAs f* (buffer layer) 12 with a thickness of 1μ and an N-type Qax-xAgxA4 with a thickness of 1.5μ (first clad W1
)13, P-type Qa 1-yAeY with a shoulder thickness of 0.08μ
A” layer (active layer 14, thickness 0.3μ P type Qa
l-zAgzAs layer (second cladding layer) 15° thickness 1
.. A 2 μm N-type Qi l-wAJwAs layer (third glue 2 rad layer) 16a and a thickness of 1. Opm OGaAs
A current intercalating layer 16 consisting of a layer (If-V group compound semiconductor layer) 16b was successively grown (as shown in FIG. 1(, )).

つづいて、前記基板11上にフォトリソグラフィによシ
、クエハのへき開方向と垂直に巾3μmのストライプを
有するマスク材(図示せず)を形成した。ここで、マス
ク材はエツチング液に耐性を有する薄膜ならば良い。次
いで、硫酸系のエツチング液を用いて前記電流挟挿層1
6を選択的にエツチングし、底部で約2.5μ罵の巾を
有する欠損部17を形成した(第1図(b)図示)。
Subsequently, a mask material (not shown) having stripes with a width of 3 μm perpendicular to the cleavage direction of the wafer was formed on the substrate 11 by photolithography. Here, the mask material may be a thin film that is resistant to the etching solution. Next, the current intercalating layer 1 is etched using a sulfuric acid-based etching solution.
6 was selectively etched to form a defect 17 having a width of about 2.5 μm at the bottom (as shown in FIG. 1(b)).

更に、MOCVD法によシ、厚さ0.25μ馬のP型の
Qal−vAJvAs層(光ガイド層)18、厚さ1.
5.umOP型のGa 1−uAJuAs層(第4のク
ラッド層)19、厚さ4μ罵のP型のGaAs層(オー
ミック層)20を、夫々前記欠損部17が埋まるように
順次成長した(第1図(C)図示)。但し、x = z
 = w = u = 0.45、y = 0.12、
V = 0.35とした。
Furthermore, a P-type Qal-vAJvAs layer (light guide layer) 18 with a thickness of 0.25 μm and a thickness of 1.0 μm were formed by MOCVD.
5. A umOP-type Ga 1-uAJuAs layer (fourth cladding layer) 19 and a P-type GaAs layer (ohmic layer) 20 with a thickness of 4 μm were grown in sequence so as to fill the defect 17 (Fig. 1). (C) As shown). However, x = z
= w = u = 0.45, y = 0.12,
V = 0.35.

本発明によれば、従来の第2のクラッド層を活性層14
に近い第2のクラッド層15と、Gai−vtkl1w
As層16m及びQaAs層16bからなる電流挟挿f
91gとに分離した構造となっているため、欠損部17
の側面からの電流リークを従来より削減でき、自然発光
成分を抑制した良好なレーデを得ることができる。事実
、活性低域のうち電流注入部分はほぼ3μm以内に限定
され、小さな発光スポットを得ることが可能になった。
According to the present invention, the conventional second cladding layer is replaced with the active layer 14.
the second cladding layer 15 close to Gai-vtkl1w
Current interpolation f consisting of As layer 16m and QaAs layer 16b
Since the structure is separated into 91g and 91g, the defective part 17
It is possible to reduce current leakage from the side surface of the device compared to the conventional method, and to obtain a good radar with suppressed natural luminescence components. In fact, the current injection portion of the active low region is limited to approximately 3 μm or less, making it possible to obtain a small light emitting spot.

なお、上記実施例とし、ては、戒流挟挿層が2層の場合
について述べたが、これに限らない。
In addition, although the above-mentioned example described the case where there are two layers of intercalated currents, the present invention is not limited to this.

例えば、上記GaiS層16bを省略し、少なくとも第
3のクラッド層16aの1層であっても電流挟挿機能と
クラッド層機能を合わせもつものであればよい。但し、
実施例の如く上層にG a A S層を形成した方が、
その後の結晶7成長が直接り2ラド層上に成長するよシ
好ましい。
For example, the GaiS layer 16b may be omitted, and at least one layer of the third cladding layer 16a may be used as long as it has both the current interpolation function and the cladding layer function. however,
It is better to form a Ga AS layer on the upper layer as in the example.
It is preferable that the subsequent crystal 7 growth grows directly on the 2 rad layer.

〔発明の効果〕〔Effect of the invention〕

以上詳述した如く本発明によれば、自然発光成分を抑制
しえる半導体発光素子を提供できる。
As described in detail above, according to the present invention, it is possible to provide a semiconductor light emitting device that can suppress natural luminescent components.

【図面の簡単な説明】[Brief explanation of drawings]

第1図(a)〜(C)は本発明の一実施例に係るレーデ
ダイオードを製造工程順に示す断面図、第2図は従来の
レーデダイオードの断面図である。 1ノ・・・GaAs基板、12・・・バッファ層、13
゜15.16a、19・・・クラッド層、14・・・活
性層、16・・・電流挟挿層、16b・・・GaAS層
、17・・・欠損部、18・・・光ガイド層、20・・
・オーミック層。 出願人代理人  弁理士 鈴 江 武 彦第2図
FIGS. 1A to 1C are cross-sectional views showing a Raded diode according to an embodiment of the present invention in the order of manufacturing steps, and FIG. 2 is a cross-sectional view of a conventional Raded diode. 1 No. GaAs substrate, 12 Buffer layer 13
゜15.16a, 19... cladding layer, 14... active layer, 16... current intercalating layer, 16b... GaAS layer, 17... defective part, 18... light guide layer, 20...
・Ohmic layer. Applicant's agent Patent attorney Takehiko Suzue Figure 2

Claims (1)

【特許請求の範囲】[Claims] 第1導電型の第1のクラッド層と、このクラッド層上に
設けられた発光領域となる活性層と、この活性層上に設
けられた第2導電型の第2のクラッド層と、この第2の
クラッド層上に設けられ、ストライプ状の欠損部を有し
少なくとも第3のクラッド層を備えた第2導電型の電流
狭搾層と、前記欠損部内に設けられ第2のクラッド層よ
り屈折率の大きな光ガイド層と、同欠損部に設けられ前
記光ガイド層より屈折率の小さな第4のクラッド層とを
具備することを特徴とする半導体発光素子。
A first cladding layer of a first conductivity type, an active layer provided on this cladding layer and serving as a light emitting region, a second cladding layer of a second conductivity type provided on this active layer, and a second cladding layer of a second conductivity type provided on this active layer. a second conductivity type current constriction layer provided on the second cladding layer and having a stripe-shaped defect and at least a third cladding layer; 1. A semiconductor light emitting device comprising: a light guide layer having a large refractive index; and a fourth cladding layer provided in the defect portion and having a smaller refractive index than the light guide layer.
JP28044685A 1985-12-13 1985-12-13 Semiconductor light emitting element Pending JPS62139381A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28044685A JPS62139381A (en) 1985-12-13 1985-12-13 Semiconductor light emitting element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28044685A JPS62139381A (en) 1985-12-13 1985-12-13 Semiconductor light emitting element

Publications (1)

Publication Number Publication Date
JPS62139381A true JPS62139381A (en) 1987-06-23

Family

ID=17625166

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28044685A Pending JPS62139381A (en) 1985-12-13 1985-12-13 Semiconductor light emitting element

Country Status (1)

Country Link
JP (1) JPS62139381A (en)

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