JPS62136085U - - Google Patents
Info
- Publication number
- JPS62136085U JPS62136085U JP2406186U JP2406186U JPS62136085U JP S62136085 U JPS62136085 U JP S62136085U JP 2406186 U JP2406186 U JP 2406186U JP 2406186 U JP2406186 U JP 2406186U JP S62136085 U JPS62136085 U JP S62136085U
- Authority
- JP
- Japan
- Prior art keywords
- socket
- mounting method
- line
- metal plate
- short circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 4
Description
第１図は、この考案の第１実施例による素子実
装方式を示す斜視図、第２図は、この考案の第２
実施例による素子実装方式を示す斜視図、第３図
はシングルインラインソケツトに短絡線を搭載し
た場合の等価回路図、第４図は同等価回路の入出
力波形図、第５図は本考案の第１および第２実施
例による実装方式の等価回路図、第６図は、同実
装方式の出力波形と、第４図に示す出力波形とを
比較した波形図、第７図および第８図は各々遅延
素子および短絡線の従来の実装方式を示す斜視図
である。
１：シングルインラインソケツト、２：遅延素
子、３：短絡線、４：金属板。
FIG. 1 is a perspective view showing the device mounting method according to the first embodiment of this invention, and FIG. 2 is a perspective view showing the device mounting method according to the first embodiment of this invention.
A perspective view showing an element mounting method according to an embodiment, Fig. 3 is an equivalent circuit diagram when a shorting line is mounted on a single in-line socket, Fig. 4 is an input/output waveform diagram of the equivalent circuit, and Fig. 5 is an example of the present invention. An equivalent circuit diagram of the mounting method according to the first and second embodiments, FIG. 6 is a waveform diagram comparing the output waveform of the same mounting method with the output waveform shown in FIG. 4, and FIGS. 7 and 8. 2A and 2B are perspective views showing conventional mounting methods of delay elements and shorting lines, respectively. 1: Single in-line socket, 2: Delay element, 3: Shorting wire, 4: Metal plate.
Claims (1)
短絡線を搭載する素子実装方式において、該ソケ
ツトの片方又は両方の側面に、地電位に接続され
た金属板が近接配置されていることを特徴とする
素子実装方式。 An element mounting method in which a delay element or a short circuit line is mounted on a single in-line socket, characterized in that a metal plate connected to ground potential is disposed close to one or both sides of the socket. method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986024061U JPH0542633Y2 (en) | 1986-02-21 | 1986-02-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986024061U JPH0542633Y2 (en) | 1986-02-21 | 1986-02-21 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62136085U true JPS62136085U (en) | 1987-08-27 |
| JPH0542633Y2 JPH0542633Y2 (en) | 1993-10-27 |
Family
ID=30822945
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986024061U Expired - Lifetime JPH0542633Y2 (en) | 1986-02-21 | 1986-02-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0542633Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57157150U (en) * | 1981-03-27 | 1982-10-02 |
-
1986
- 1986-02-21 JP JP1986024061U patent/JPH0542633Y2/ja not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57157150U (en) * | 1981-03-27 | 1982-10-02 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0542633Y2 (en) | 1993-10-27 |
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