JPS62134979A - Semiconductor device - Google Patents

Abstract

PURPOSE:To enhance the performance of a diode, to raise frequency and to reduce power consumption by forming the electrode of the diode formed by a semiconductor layer in a comblike electrode, and reducing the resistance component of the electrode. CONSTITUTION:Electrodes of a diode are formed in a comblike structure. Thus, an anode electrode 120 and a cathode electrode 130 both become parallel connection equivalently in wiring series resistance to be reduced. The comblike electrode is microminiaturized to form a larger P-N junction area per unit area, i.e., to perform a larger current capacity.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device in which a semiconductor layer is formed on an insulating substrate and a diode is formed using the semiconductor layer.

[Conventional technology]

In general, VHF and UHF band receiving devices receive radio waves with an antenna, amplify the desired signal with a high frequency amplifier circuit block, and mix it with an oscillation signal from a local oscillation circuit block in a frequency conversion circuit block. and obtain a constant intermediate frequency signal. This type of receiving device has various filters and
It has a structure in which individual components such as transistors, diodes, capacitors, coils, and resistors are installed and housed in a metal casing. Furthermore, if this type of receiving device is installed in small portable information devices that are expected to have a large market in the future, such as pocket televisions or individual selective reception and calling devices called pagers, it will be possible to reduce the size of the device. There is a strong demand for thinner and higher performance devices.

FIGS. 5(a) and 5(b) are plan views showing examples of electrode patterns of diodes on insulating substrates, such as SOS structures, which have been commonly used in the past.
Both show N''-P-P''u diodes.

100 is an insulating substrate, 106 is a semiconductor layer, 102 is a metal wiring section, 104 is a contact section, 120 is an anode electrode, 160 is a cathode electrode, 140 is an N+ type semiconductor layer, 1
42 is a P-type semiconductor layer, and 144 is a Vi-type semiconductor layer. The same numbers are given to the same parts in both FIG. 5(a) and FIG. 5(b). In both cases of FIGS. 5(a) and (bl), if the current capacity is increased by increasing the PN junction surface, the area occupied by the semiconductor layer for the diode becomes extremely large.

Further, in the case of FIG. 5(a), since 160 cathode electrodes are formed around the half Aq body layer 106, the wiring resistance becomes very large.

[Problem that the invention seeks to solve]

Currently, the receiving devices installed in small portable information devices are becoming smaller, thinner, more sophisticated, and have lower power consumption. Inviting and prices tend to be bird. In addition, excessively high-density mounting on printed circuit boards hinders mass production due to the difficulty of automating mounting and post-mounting adjustments.

Furthermore, increased density of printed wiring patterns also causes electromagnetic and electrostatic induction, leading to deterioration of the electrical performance of printed circuit boards.

Therefore, in order to solve these problems, integration of receiving circuits is expected. As a process of integration,
There are I'vl OS FET integrated circuits and bipolar transistor integrated circuits on bulk silicon substrates, but both have large parasitic capacitance in the element, large capacitance between wiring and substrate, and it is necessary to overcome these parasitic capacitances. Since this requires a large bias voltage and large current, it is extremely difficult to achieve higher frequencies and lower power consumption.

Therefore, a semiconductor layer was formed on an insulating substrate with very little parasitic capacitance. For example, integrated circuits with an SOS structure are extremely advantageous in terms of speed, high frequency, and low power consumption. A diode is a component of such a high frequency integrated circuit.

In general, diodes with an SOS structure have a silicon layer with a thickness of 1 μm or less, so the P-N junction surface,
Alternatively, even if silicon is of the same type, for example, N type or P type, junction surfaces with different ion concentrations are formed only on the plane perpendicular to the substrate. That is, no bonding surface in the horizontal plane is formed. Of course, a special method of manufacturing a semiconductor device in which a bonding surface is formed in a horizontal plane is also conceivable, but that method requires many rather complicated steps, so it cannot be said that it is easy to implement.

Therefore, when a junction area having the same current capacity as a diode formed on bulk silicon is formed on an SOS structure, a much larger element area is required than that on bulk silicon.

Therefore, the area efficiency on the wafer is poor, and there is also a problem in terms of yield. Furthermore, when the area of the diode increases, the wiring capacitance of the electrode hardly increases due to the characteristics of the SO3 structure, but an increase in the wiring resistance, that is, an increase in the diode series resistance, is unavoidable. This has made it extremely difficult to reduce power consumption.An object of the present invention is to provide a semiconductor device for solving these problems.

[Means for solving problems]

In a semiconductor device comprising an insulating substrate and a semiconductor layer provided on the insulating substrate, the electrode of the diode formed using the semiconductor layer is a comb-shaped electrode to reduce the resistance component of the electrode, and the diode The goal is to achieve higher performance, higher frequency, and lower power consumption.

[Effect]

SOS structure semiconductor devices are characterized by a small capacitance between the wiring and the substrate, and even when forming a MOSFET, the capacitance between the source or drain and the substrate is small, and the MOS FET is formed on bulk silicon. It is possible to achieve faster speeds and lower power consumption compared to the conventional case. In addition, the sapphire single crystal substrate has extremely high insulating properties, its dielectric constant and mechanical strength are stable over frequency and temperature, it exhibits high galvanic constant and low dielectric loss, and it has high thermal conductivity. chemically inert and highly corrosion resistant,
These features are advantageous not only as a monolithic IC but also as a substrate for high-density hybrid ICs.

However, when diodes are formed on the same insulating substrate, for example on an SOS structure, the series resistance of the electrodes is equivalently reduced by parallel connection (a tooth-tooth structure, that is, the active area of the diode is By connecting a large number of comb-shaped electrodes that are finely divided and shorten the electrode width per unit,
The structure is connected in parallel.

〔Example〕

The details will be explained below based on the drawings.

FIG. 1 shows an embodiment of the present invention (a plan view of a diode using an annular electrode).

100.102.104.106.120.160.1
40.142.144 are the same as the same numbers in FIG. As shown in Fig. 1, by making the diode electrodes have a comb-shaped structure, the wiring series resistances of both the anode electrode 120 and the cathode electrode 130 are equivalently connected in parallel, which reduces them, that is, achieves a larger current capacity. realizable.

FIG. 2 is a sectional view taken along line A-A' in FIG.

20 is an insulating film. Other numbers are the same as those in FIG. 1.

FIG. 3 is a plan view of a diode using comb-shaped electrodes showing another embodiment of the present invention. Components that are the same as in FIG. 1 are given the same numbers. In FIG. 3, the P-N junction surface has a meandering pattern.

FIG. 4 is a graph showing the relationship between the number of comb-like electrodes of a diode and wiring resistance in an embodiment of the present invention. In FIG. 4, the horizontal axis represents the number of comb-like electrodes of the diode, and the vertical axis represents the wiring resistance of the diode electrodes. Curve A shows how the wiring resistance of the diode decreases as the number of comb-shaped electrodes increases.

Even if the present invention is applied, for example, to a case where a variable capacitance diode is formed on an SOS structure, the effect is significant.

In a tuned circuit such as a receiver, reducing the series resistance component of a variable capacitance diode has the effect of increasing the Q value and lowering the noise figure. When the present invention is applied to a switching diode, the forward high frequency resistance of the diode is reduced, resulting in the effect of reducing transmission loss.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, it is possible to achieve higher performance, higher frequency, and lower power consumption of a diode formed in a semiconductor layer on an insulating substrate.

[Brief explanation of drawings]

FIG. 1 is a plan view of a diode using comb-shaped electrodes showing an embodiment of the present invention. FIG. 2 is a sectional view taken along the line AA' in FIG. FIG. 3 is a plan view of a diode using comb-like electrodes showing another embodiment of the present invention. FIG. 4 is a graph showing the relationship between the number of comb-shaped electrodes of a diode and wiring resistance in an example of the present invention. FIGS. 5(a) and 5(b) are plan views showing electrode patterns of a diode with a conventional SOS structure. 100... Insulating substrate, 106... Semiconductor layer, 120... Anode electrode, 160... Cathode electrode.

Claims (3)

[Claims] (1) A semiconductor device comprising an insulating substrate and a semiconductor layer provided on the insulating substrate, characterized in that the semiconductor layer is used to form a diode, and the electrodes of the diode are comb-shaped electrodes. semiconductor device. (2) The semiconductor device according to claim 1, wherein the diode has an SOS structure. (3) The semiconductor device according to claim 1, wherein the diode is a variable capacitance diode, a switching diode, a constant voltage diode, or a PIN diode.