JPS62134959A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS62134959A JPS62134959A JP60275411A JP27541185A JPS62134959A JP S62134959 A JPS62134959 A JP S62134959A JP 60275411 A JP60275411 A JP 60275411A JP 27541185 A JP27541185 A JP 27541185A JP S62134959 A JPS62134959 A JP S62134959A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- substrate
- output
- voltage
- igfetmx
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 25
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 230000010355 oscillation Effects 0.000 claims description 12
- 238000001514 detection method Methods 0.000 claims description 7
- 239000003990 capacitor Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 238000009412 basement excavation Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
- H01L27/0237—Integrated injection logic structures [I2L] using vertical injector structures
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体装置に係わり、特に、半導体基板に印加
する電圧を可変にし、消費電力の減少を図った半導体装
置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly to a semiconductor device in which a voltage applied to a semiconductor substrate is made variable to reduce power consumption.
一般に、半導体基板に所定の電圧を印加した状態で使用
することは、半導体基板に形成されるpn接合の拡散容
量を減少させ、トランジスタの動作をバックゲート特性
の良い領域で行なわせることができるので、トランジス
タの高速製作を可能にする。したがって、高速動作を必
要とする半導体装置では、半導体基板に所定の電圧を印
加しており、外部電源に基づき所定電圧を発生する基板
電圧発生回路の一例を第3図に示す。図において、回路
器oscは一定周波数のパルスφを出力しており、この
パルスφはコンデンサC3を介して絶縁ゲート屋電界効
果トランジスタ(以下、IGFETという)Ml、M2
の共通ドレインaに印加されている。かかる構成の従来
の基板電圧発生回路では。In general, using a semiconductor substrate with a predetermined voltage applied to it reduces the diffusion capacitance of the pn junction formed in the semiconductor substrate, allowing the transistor to operate in a region with good back gate characteristics. , enabling high-speed fabrication of transistors. Therefore, in a semiconductor device that requires high-speed operation, a predetermined voltage is applied to the semiconductor substrate, and FIG. 3 shows an example of a substrate voltage generation circuit that generates the predetermined voltage based on an external power supply. In the figure, the circuit osc outputs a pulse φ of a constant frequency, and this pulse φ is passed through a capacitor C3 to insulated gate field effect transistors (hereinafter referred to as IGFETs) Ml, M2.
is applied to the common drain a of the two. In a conventional substrate voltage generation circuit having such a configuration.
回路の出力VBB K負電圧(典型的には一2v)が常
時発生し、該負電圧が半導体基板に印加され、上述の如
くトランジスタの高速動作に寄与している。A circuit output VBB K negative voltage (typically -2V) is constantly generated, and this negative voltage is applied to the semiconductor substrate, contributing to the high speed operation of the transistor as described above.
しかしながら、上記従来の半導体装置では、半導体基板
に常時負電圧を印加していたので、該基板に印加される
負電圧に基因する消費電力が犬きく、特に、主要(ロ)
路の消費電力の少ない0MO8で構成される半導体装置
にあっては、基板電圧に基づく消費電力の全油i9R電
力に占める割合が大きくなるという問題点があった。However, in the conventional semiconductor device described above, since a negative voltage is constantly applied to the semiconductor substrate, the power consumption due to the negative voltage applied to the substrate is high.
In a semiconductor device configured with 0MO8, which consumes less power in the circuit, there is a problem in that the power consumption based on the substrate voltage accounts for a large proportion of the total oil i9R power.
かかる問題点を解決せんとして、主要回路のアクティブ
時にのみ基板電圧発生回路を駆動させ、主要回路の停止
時には基板電圧発生回路も停止させることも考えられる
が、基板電圧発生回路の起動から所定の基板電圧の発生
までに相当時間を要し、高速動作が要求される半導体装
置では採用することができない。In order to solve this problem, it may be possible to drive the substrate voltage generation circuit only when the main circuit is active, and to stop the substrate voltage generation circuit when the main circuit is stopped. It takes a considerable amount of time to generate a voltage, so it cannot be used in semiconductor devices that require high-speed operation.
それで、本発明は、高速動作が可能で、かつ、消費電力
の低減をシ1れる基板電圧発生回路を備えた半導体装置
を提供せんとするものでちる。Therefore, it is an object of the present invention to provide a semiconductor device equipped with a substrate voltage generation circuit capable of high-speed operation and reducing power consumption.
本発明は、半導体基板の電位を検知し該電位に対応した
制御信号を出力する検知回路と、前記制御信号に基づき
発振回路から出力されるパルス信号の周波数を変更する
発振周波数変更手段とを設ることにより、基板電位を可
変にし、半導体装置の主要回路がアクティブ状態のとき
と、停止状態のときとで基板電位を切換えるようにした
ことを要旨とする。The present invention includes a detection circuit that detects the potential of a semiconductor substrate and outputs a control signal corresponding to the potential, and an oscillation frequency changing means that changes the frequency of a pulse signal output from an oscillation circuit based on the control signal. The gist of this invention is to make the substrate potential variable and to switch the substrate potential between when the main circuits of the semiconductor device are in an active state and when they are in a stopped state.
第1図は本発明の一実施例を示す回路図であシ、コンデ
ンサC1とIGFETMI、M2とで基板電圧発生回路
100を構成している。200は可変周波数発振回路(
OSC)を示してお)、可変周波数発振回路200は、
複数段のインバータを可変抵抗を介して直列に接続し、
最終段のインバータ出力を初段のインバータ入力に帰還
させると共に、インバータ間に介装された可変抵抗と並
列にコンデンサを配し該コンデンサの一方の電極を接地
することによシ構成することができる。FIG. 1 is a circuit diagram showing one embodiment of the present invention, in which a capacitor C1, IGFET MI, and M2 constitute a substrate voltage generation circuit 100. 200 is a variable frequency oscillation circuit (
OSC)), the variable frequency oscillation circuit 200 is
Connect multiple stages of inverters in series through variable resistors,
It can be configured by feeding back the final stage inverter output to the first stage inverter input, placing a capacitor in parallel with the variable resistor interposed between the inverters, and grounding one electrode of the capacitor.
一方、電源電圧VCCと接地との間には抵抗R1とIG
FETMXとが直列に接続されておシ、これらの抵抗k
LlとIGFETMXとは検知回路300を構成してい
る。この検知回路300を構成しているIGFETMX
の閾値■Tと基板電圧VBBとの関係は、第2図に示さ
れているような関係になりており、例えば、基板電圧が
VBBIのときの閾値はvxとなる。On the other hand, there is a resistor R1 and IG between the power supply voltage VCC and the ground.
FETMX are connected in series, and these resistors k
Ll and IGFETMX constitute a detection circuit 300. IGFETMX constituting this detection circuit 300
The relationship between the threshold value ■T and the substrate voltage VBB is as shown in FIG. 2. For example, when the substrate voltage is VBBI, the threshold value is vx.
したがって、IGFETMxのゲートに電圧Mxを印加
しておくと、半導体装置の主要回路がアクティブ状態と
なシ基板電圧の絶対値が低下すると、IGFETMxの
閾値が低下するのでIGFETMxはオンする。その結
果、検知回路の出力電圧vs’ropは低レベルになり
、該低レベルの出力電圧は可変周波数発振回路200の
可変抵抗の抵抗値を切換え、発掘回路200から出力さ
れる出力パルスφの周波数を増加させる(第4図(a)
)。このように、出力パルスφの周波数が増加すると、
共通ドレインaに供給される負の電力も大きくなり、基
板電圧VBHの絶対値は大きくなり、主要回路の高速動
作が可能になる。Therefore, if voltage Mx is applied to the gate of IGFET Mx, the main circuits of the semiconductor device become active, and when the absolute value of the substrate voltage decreases, the threshold of IGFET Mx decreases and IGFET Mx turns on. As a result, the output voltage vs'rop of the detection circuit becomes a low level, and the low level output voltage switches the resistance value of the variable resistor of the variable frequency oscillation circuit 200, and the frequency of the output pulse φ output from the excavation circuit 200 is (Figure 4(a)
). Thus, as the frequency of the output pulse φ increases,
The negative power supplied to the common drain a also increases, the absolute value of the substrate voltage VBH increases, and high-speed operation of the main circuit becomes possible.
ところが、主要回路が停止状態になり、基板電圧の絶対
値がVBBIを超えて増加すると、I G F ETI
’11にノ閾値が■、より犬きくなるのでIGFETM
工はyr7する。その結果、出力電圧vsTopは高レ
ベルになり、該高レベルの出力電圧が供給される可変抵
抗はその抵抗値を変更し、発振回路200の出力パルス
φの周波数を減少させる(第4図(b))。よって、共
通ドレインaに供給される負の電力も小さくなシ、消費
電力の低下(第4図(a)に比べ約1/4)が図られる
。このような主要回路の停止状態から、再びアクティブ
状態になると、検知回路300は基板電位VBBの変化
を検知し、直ちに可変抵抗の抵抗値を変更するので、高
速動作の要求されている半導体装置にも適用可能である
。However, when the main circuit is stopped and the absolute value of the substrate voltage increases beyond VBBI, I G F ETI
'11 has a threshold value of ■, which makes it more dog-like, so IGFETM
Engineering is yr7. As a result, the output voltage vsTop becomes high level, and the variable resistor to which the high level output voltage is supplied changes its resistance value, decreasing the frequency of the output pulse φ of the oscillation circuit 200 (Fig. 4(b) )). Therefore, the negative power supplied to the common drain a is also small, and power consumption is reduced (about 1/4 compared to FIG. 4(a)). When the main circuit goes from a stopped state to an active state again, the detection circuit 300 detects a change in the substrate potential VBB and immediately changes the resistance value of the variable resistor, making it suitable for semiconductor devices that require high-speed operation. is also applicable.
なお、上記実施例では、発振回路200の出力周波数を
抵抗値の切換えで行なったが、出力周波数は抵抗に0と
コンデンサの容量値(qの積に反比例するので、コンデ
ンサを可変容量型コンデンサにしても出力周波数を変更
できる。In the above embodiment, the output frequency of the oscillation circuit 200 was changed by changing the resistance value, but since the output frequency is inversely proportional to the product of the resistor's 0 and the capacitor's capacitance value (q), the capacitor should be a variable capacitor. You can also change the output frequency.
以上説明してきたように、本発明によれば、発掘回路の
出力周波数を基板の電位に対応させて変更するようにし
だので、高速動作が可能で、がっ、消費電力の小さい半
導体装置を構成できるという効果を得られる。As explained above, according to the present invention, since the output frequency of the excavation circuit is changed in accordance with the potential of the substrate, a semiconductor device that can operate at high speed and has low power consumption can be constructed. You can get the effect of being able to do it.
第1図は本発明の一実施例を示す回路図、第2図はIG
FETの閾値と基板電圧との関係を示すグラフ、第3図
は従来例の回路図、第4図は発振回路の出力パルスを示
す波形図である。
100・・・・・・基板電圧発生回路、200・・・・
・・可変周波数発振回路、300・・・・・・検知回路
。
代理人 弁理士 内 原 晋
3QOイ#ダag4路
躊1図
第2図Fig. 1 is a circuit diagram showing an embodiment of the present invention, Fig. 2 is an IG
A graph showing the relationship between the threshold value of the FET and the substrate voltage, FIG. 3 is a circuit diagram of a conventional example, and FIG. 4 is a waveform diagram showing output pulses of the oscillation circuit. 100... Substrate voltage generation circuit, 200...
...Variable frequency oscillation circuit, 300...Detection circuit. Agent Patent Attorney Susumu Uchihara 3QOi#daag4Rohi1Figure2
Claims (1)
数に対応した電圧を半導体基板に印加する基板電位発生
回路とを有する半導体装置において、前記半導体基板の
電位を検知し該電位に対応した制御信号を出力する検知
回路と、前記制御信号に基づき前記パルス信号の周波数
を変更する発振周波数変更手段とをさらに設けて成る半
導体装置。In a semiconductor device having an oscillation circuit and a substrate potential generation circuit that applies a voltage corresponding to the frequency of a pulse signal output from the oscillation circuit to a semiconductor substrate, the potential of the semiconductor substrate is detected and a control signal corresponding to the potential is provided. A semiconductor device further comprising: a detection circuit that outputs a pulse signal; and an oscillation frequency changing means that changes the frequency of the pulse signal based on the control signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60275411A JPS62134959A (en) | 1985-12-06 | 1985-12-06 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60275411A JPS62134959A (en) | 1985-12-06 | 1985-12-06 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62134959A true JPS62134959A (en) | 1987-06-18 |
Family
ID=17555123
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60275411A Pending JPS62134959A (en) | 1985-12-06 | 1985-12-06 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62134959A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013094052A (en) * | 2006-10-06 | 2013-05-16 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
-
1985
- 1985-12-06 JP JP60275411A patent/JPS62134959A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013094052A (en) * | 2006-10-06 | 2013-05-16 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
JP2014180203A (en) * | 2006-10-06 | 2014-09-25 | Semiconductor Energy Lab Co Ltd | Semiconductor device |
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