JPS62134943A - Semiconductor substrate and manufacture thereof - Google Patents
Semiconductor substrate and manufacture thereofInfo
- Publication number
- JPS62134943A JPS62134943A JP27472585A JP27472585A JPS62134943A JP S62134943 A JPS62134943 A JP S62134943A JP 27472585 A JP27472585 A JP 27472585A JP 27472585 A JP27472585 A JP 27472585A JP S62134943 A JPS62134943 A JP S62134943A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- substrate body
- manufacturing
- entire outer
- manufactured
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
Abstract
Description
【発明の詳細な説明】
「産業上の利用分野」
本発明は集積回路（ＩＣ）等に用いられる半導体基板お
よびこの半導体基板の製造方法に関づる。DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a semiconductor substrate used for integrated circuits (ICs) and the like, and a method for manufacturing this semiconductor substrate.
「従来の技術」
従来、集積回路に用いられる半導体基板は絶縁材である
ガラス入りエポキシ樹脂等で形成したちのが使用されて
いる。"Prior Art" Conventionally, semiconductor substrates used in integrated circuits have been made of an insulating material such as glass-containing epoxy resin.
このため、半導体基板を構成する材料が高価なものであ
るので、コスト高となる欠点があった。Therefore, since the material constituting the semiconductor substrate is expensive, there is a drawback that the cost is high.
また、樹脂材を用いているので、マイクロドリルを用い
て一本一本スルーホールを形成しなければならず、この
スルーホールの加工に多くの時間がかかり、生産性が悪
く、コスト高となる欠点があった。In addition, since resin material is used, through holes must be formed one by one using a micro drill, which takes a lot of time to process, resulting in poor productivity and high costs. There were drawbacks.
「本発明の目的」
本発明は以上のような従来の欠点に鑑み、スルーホール
等の加工が容易で放熱性が良く、かつ安価に製造するこ
とのできる半導体基板およびこの半導体基板の製造方法
を得るにある。``Object of the present invention'' In view of the above-mentioned conventional drawbacks, the present invention provides a semiconductor substrate that can easily process through holes, etc., has good heat dissipation, and can be manufactured at low cost, and a method for manufacturing this semiconductor substrate. There is something to be gained.
「本発明の目的を達成するための手段」本発明はアルミ
ニウムの薄板で形成した半導体基板本体と、この半導体
基板本体の全外表面を覆う絶縁被膜とからなることを特
徴としている。``Means for Achieving the Objects of the Invention'' The present invention is characterized by comprising a semiconductor substrate body made of a thin aluminum plate and an insulating coating covering the entire outer surface of the semiconductor substrate body.
また、本発明はアルミニウムの薄板で形成した半導体基
板本体と、この半導体基板本体にマトリックス状あるい
はランダム状に形成した多数個のスルーホールと、この
スルーホールの壁面および前記半導体基板本体の全外表
面を覆う絶縁被膜とからなることを特徴としている。The present invention also provides a semiconductor substrate body formed of a thin aluminum plate, a large number of through holes formed in the semiconductor substrate body in a matrix or random pattern, and a wall surface of the through holes and an entire outer surface of the semiconductor substrate body. It is characterized by consisting of an insulating coating that covers the
さらに、本発明はアルミニウムの薄板で半導体基板本体
を製造ザる半導体基板本体の製造工程と、この半導体基
板本体の製造工程ひ製造された半導体基板本体の全外表
面に絶縁被膜を形成する絶縁被膜形成工程とを含むこと
を特徴としている。Furthermore, the present invention relates to a process for manufacturing a semiconductor substrate body using a thin aluminum plate, and an insulating coating for forming an insulating coating on the entire outer surface of the manufactured semiconductor substrate body. The method is characterized in that it includes a forming step.
また、本発明はアルミニウムの薄板で半導体基板本体を
製造する半導体基板本体の製造工程と、この半導体基板
本体の製造工程で製造された半導体基板本体にマトリッ
クス状あるいはランダム状に多数個のスルーホールを形
成するスルーホール形成工程と、このスルーホール形成
工程を経た半導体基板本体の全外表面およびスルーホー
ルの壁面に絶縁被膜を形成する絶縁被膜形成工程とを含
むことを特徴としている。The present invention also includes a manufacturing process for manufacturing a semiconductor substrate body using a thin aluminum plate, and a process for forming a large number of through holes in a matrix or random pattern in the semiconductor substrate body manufactured in this semiconductor substrate manufacturing process. The present invention is characterized in that it includes a through hole forming step, and an insulating film forming step of forming an insulating film on the entire outer surface of the semiconductor substrate body that has passed through the through hole forming step and on the wall surface of the through hole.
「本発明の実施例」
以下、図面に示す実施例により、本発明の詳細な説明す
る。"Embodiments of the present invention" The present invention will be described in detail below with reference to embodiments shown in the drawings.
第１図および第２図の実施例において、１はアルミニウ
ムのフープ材を用いて形成した半導体基板本体で、この
半導体基板本体１は例えば０．０８〜数ｍの厚さのもの
が使用される。In the embodiments shown in FIGS. 1 and 2, 1 is a semiconductor substrate body formed using an aluminum hoop material, and this semiconductor substrate body 1 has a thickness of, for example, 0.08 to several meters. .
２は前記半導体基板本体１の全外表面を覆う絶縁被膜で
、この絶縁被膜２はポリイミド、フッ素樹脂、シリコン
ゴムあるいはＳｉＣ，Ａｌ３Ｎ４、Ｓｉ Ｎ 、Ａ
ｔ２０３とバインダー、ガラスバウダー、Ｙ２Ｏ３との
混合物等の絶縁材が用いられて形成されている。Reference numeral 2 denotes an insulating coating that covers the entire outer surface of the semiconductor substrate body 1, and this insulating coating 2 is made of polyimide, fluororesin, silicone rubber, SiC, Al3N4, SiN, A
It is formed using an insulating material such as a mixture of t203, binder, glass powder, and Y2O3.
上記構成の半導体基板３は、第３図に示すように半導体
基板本体１を装造する半導体基板本体の製造工程４と、
この半導体基板本体の製造工程４で￥Ｊ造された半導体
基板本体１の全外表面に絶縁被膜２を形成する絶縁被膜
形成工程５とから構成される装置
前記半導体基板本体の製造工程４は、所定の厚さ寸法で
かつ所定の大きさのアルミニウムのフープ材６を形成す
るフープ材形成工程７と、このフープ材形成工程７で形
成されたフープ材６を洗浄工程８を経た後、全外表面を
絶縁処理および接着機能の向上を図るためのアルマイト
処理（ナシ地）するアルマイト処理工程９とからなって
いる。As shown in FIG. 3, the semiconductor substrate 3 having the above structure is manufactured by a semiconductor substrate body manufacturing process 4 in which the semiconductor substrate body 1 is mounted;
The manufacturing process 4 of the semiconductor substrate body includes an insulating film forming step 5 for forming an insulating film 2 on the entire outer surface of the semiconductor substrate body 1 manufactured in the semiconductor substrate main body manufacturing process 4, After passing through a hoop material forming step 7 in which an aluminum hoop material 6 having a predetermined thickness and a predetermined size is formed, and a cleaning step 8, the hoop material 6 formed in this hoop material forming step 7 is completely removed. The process consists of an alumite treatment step 9 in which the surface is subjected to an alumite treatment (blank) in order to insulate the surface and improve the adhesive function.
また、前記絶縁被膜形成工程５はアルマイト処理工程９
を経たしのを洗浄工程１０を経た後、絶縁材を印刷や塗
布等のコート法、イオンブレーティング、スパッタリン
グ等の蒸着法あるいは溶射法のいずれかによって半導体
基板本体１の外表面に絶縁被膜２を形成する被膜形成工
程１１と、この被膜形成工程１１を経たものを乾燥させ
る乾燥工程１２と、この乾燥工程１２を経たものを必要
に応じて行なうシンター処理工程１３あるいはＨＩＰ＜
熱間等方圧力装置〉処理工程１４とからなっている。Further, the insulating film forming step 5 is an alumite treatment step 9.
After passing through the cleaning step 10, an insulating coating 2 is applied to the outer surface of the semiconductor substrate body 1 by either a coating method such as printing or coating, a vapor deposition method such as ion blasting or sputtering, or a thermal spraying method. A film forming process 11 for forming a film, a drying process 12 for drying the film that has passed through this film forming process 11, and a sintering process 13 or HIP<
hot isostatic pressure device> processing step 14.
上記方法によって製造された半導体基板３は、アルミニ
ウム材を用いてアルマイト処理工程９や絶縁被膜形成工
程５で製造できるので、製造が容易で、安価に製造する
ことができる。The semiconductor substrate 3 manufactured by the above method can be manufactured using an aluminum material in the alumite treatment step 9 or the insulating film forming step 5, and therefore can be manufactured easily and at low cost.
「本発明の異なる実施例」
次に第４図ないし第６図に示す本発明の異なる実施例に
つき説明する。なお、これらの実施例の説明に当って、
前記本発明の実施例と同一層成部分には同一符号を付し
て重複する説明を省略する。"Different Embodiments of the Present Invention" Next, different embodiments of the present invention shown in FIGS. 4 to 6 will be described. In addition, in explaining these examples,
The same reference numerals are given to the same layered parts as in the embodiment of the present invention, and redundant explanation will be omitted.
第４図および第５図の実施例において、前記第１図およ
び第２図の本発明の実施例と主に異なる点は、半導体基
板本体１に多数個のマトリックス状あるいはランダム状
の、本実施例ではマトリックス状のスルーホール１５を
形成した点で、このようにスルーホール１５を形成した
半導体基板３△は第６図に示すように半導体基板本体の
￥Ｊ造工程４で製造された半導体基板本体１にピアシン
グプレス等によってマトリックス状あるいはランダム状
の多数個のスルーホール１５を形成するスルーホール形
成工程１６を経た後にスルーホール１５の壁面および半
導体基板本体１の全外表面を絶縁被膜２で覆う絶縁被膜
形成工程５によって製造する。The main difference between the embodiments shown in FIGS. 4 and 5 from the embodiments of the present invention shown in FIGS. In the example, a matrix-like through hole 15 is formed, and the semiconductor substrate 3△ in which the through hole 15 is formed in this way is a semiconductor substrate manufactured in the J manufacturing process 4 of the semiconductor substrate body as shown in FIG. After a through hole forming step 16 in which a large number of through holes 15 in a matrix or random pattern are formed in the main body 1 by a piercing press or the like, the walls of the through holes 15 and the entire outer surface of the semiconductor substrate main body 1 are covered with an insulating coating 2. Manufactured by insulating film forming step 5.
なお、この半導体基板３Ａの製造工程ではスルーホール
形成工程１６後にアルマイト処理工程９を行ない、半導
体基板本体１の外表面およびスルーホール１５の壁面も
アルマイト処理する。In the manufacturing process of this semiconductor substrate 3A, an alumite treatment step 9 is performed after the through hole forming step 16, and the outer surface of the semiconductor substrate body 1 and the wall surface of the through hole 15 are also alumite treated.
また、スルーホール形成工程１６はピアシングプレスで
スルーホール１５を形成するとともに、このピアシング
プレスで形成されたスルーホール１５の周縁にできたパ
リを取るパリ取りホーニングを行なう。In addition, in the through-hole forming step 16, the through-hole 15 is formed using a piercing press, and at the same time, deburr honing is performed to remove the burrs formed at the periphery of the through-hole 15 formed using the piercing press.
上記のようにして製造された、半導体基板３．３Ａは表
面に従来と同様な方法によってトランジスタ、ダイオー
ド、抵抗、コンデンサ等の回路素子を写真製版技術によ
って多数盛り込み、集積回路（ＩＣ）を形成する。The semiconductor substrate 3.3A manufactured as described above has a large number of circuit elements such as transistors, diodes, resistors, and capacitors mounted on its surface by photolithography using a conventional method to form an integrated circuit (IC). .
なお、前記本発明の実施例では各製造工程を順次行なう
ものについて説明したが、本発明はこれに限らず、ロー
ル巻きにしたアルミニウムのフープ材を順送りしてスル
ーホール形成工程１６を行なった後、１個づつの半導体
基板本体１にして洗浄工程８、アルマイト処理工程９、
洗浄工程１０、絶縁被膜形成工程５、（被膜形成工程１
１、乾燥工程１２）を順次流れ作業で行なうようにして
も良い。In addition, in the embodiment of the present invention, each manufacturing process is performed sequentially, but the present invention is not limited to this, and the present invention is not limited to this. , a cleaning step 8 for each semiconductor substrate body 1, an alumite treatment step 9,
Cleaning step 10, insulation film formation step 5, (film formation step 1
1. The drying step 12) may be performed sequentially in an assembly line operation.
「本発明の効果」
以上の説明から明らかなように、本発明にあっては、次
に列挙する効果がある。"Effects of the Present Invention" As is clear from the above description, the present invention has the following effects.
（１）アルミニウム材で半導体基板本体を形成している
ので、従来の材質に比べて安い材料を使用しているので
、安価に製造することができる。(1) Since the main body of the semiconductor substrate is made of aluminum, a material that is cheaper than conventional materials is used, so it can be manufactured at low cost.
（２）半導体基板本体をアルミニウム材で形成している
ので、多数個形成するスルーホールをピアシングプレス
等を用いて形成することができる。(2) Since the semiconductor substrate body is made of aluminum material, a large number of through holes can be formed using a piercing press or the like.
したがって、スルーホール加工が容易で、生産性の向上
を図ることができる。Therefore, through-hole processing is easy and productivity can be improved.
（３）半導体基板本体の全外表面に絶縁被膜を形成して
いるので、完全に絶縁され、従来の半導体基板と同様な
絶縁性能が得られる。(3) Since an insulating film is formed on the entire outer surface of the semiconductor substrate body, it is completely insulated and has the same insulation performance as a conventional semiconductor substrate.
（４）前記（１）、（２）によって、コストの低減を図
ることができる。(4) Costs can be reduced by (1) and (2) above.
（５）半導体基板本体にアルミニウムを用いているので
、放熱性が良く、耐久性を向−Ｅさせることができる。(5) Since aluminum is used for the semiconductor substrate body, heat dissipation is good and durability can be improved.
（６）半導体基板本体にアルミニウムを用いているので
、軽量で強度を向上させることができる。(6) Since aluminum is used for the semiconductor substrate body, it is lightweight and has improved strength.
（７）半導体基板本体の外表面をアルマイト処理寸れば
、絶縁処理と絶縁被膜の１ｚ着強度を向上させることが
できるとともに、硬くすることができる。(7) If the outer surface of the semiconductor substrate body is alumite-treated, it is possible to improve the insulation treatment and the 1z adhesion strength of the insulation coating, and to make it hard.
第１図は本発明の一実施例を氏名一部破断斜視図、第２
図は第１図のへ−Ａ線に沿う断面図、第３図は本発明の
製造方法を示す工程図、第４図および第５図は第１図お
よび第２図とは異なる実施例を示を説明図、第６図は第
３図とは異なる製造方法を示す工程図である。
１：半導体基板本体、 ２：絶縁被膜、３．３Ａ：半導
体基板、
４：半導体基板本体の製造工程、
５：絶縁被膜形成工程、６：フープ材、７：フープ材形
成工程、８：洗浄工程、９：アルマイト処理工程、
１０：洗浄工程、 １１：被膜形成工程、１２；
乾燥工程、 １３；シンター処理工程、１４：Ｈ
ＩＰ処理工程、 １５ニスルーホール、１６：スルーホ
ール形成工程。
特許出願人 藤 好 克 聡
第 １ 図
第 ２ 図
第４図
第 ５ 図Fig. 1 is a partially cutaway perspective view of one embodiment of the present invention;
The figure is a sectional view taken along the line A--A of FIG. 1, FIG. 3 is a process diagram showing the manufacturing method of the present invention, and FIGS. 4 and 5 show an embodiment different from FIGS. 1 and 2. 6 is a process diagram showing a manufacturing method different from that shown in FIG. 3. 1: Semiconductor substrate body, 2: Insulating coating, 3.3A: Semiconductor substrate, 4: Manufacturing process of semiconductor substrate body, 5: Insulating coating forming process, 6: Hoop material, 7: Hoop material forming process, 8: Cleaning process , 9: Alumite treatment step, 10: Cleaning step, 11: Film forming step, 12;
Drying step, 13; Sintering step, 14: H
IP processing step, 15 varnish through hole, 16: through hole forming step. Patent Applicant: Yoshikatsu Satoshi Fuji Figure 1 Figure 2 Figure 4 Figure 5
Claims (1)
この半導体基板本体の全外表面を覆う絶縁被膜とからな
ることを特徴とする半導体基板。 ２）アルミニウムの薄板で形成した半導体基板本体と、
この半導体基板本体にマトリックス状あるいはランダム
状に形成した多数個のスルーホールと、このスルーホー
ルの壁面および前記半導体基板本体の全外表面を覆う絶
縁被膜とからなることを特徴とする半導体基板。 ３）半導体基板本体は０．０８〜数ｍｍの厚さのアルミ
ニウムのフープ材が使用されていることを特徴とする特
許請求の範囲第２項記載の半導体基板。 ４）半導体基板本体はアルマイト処理によつて表面をナ
シ地に形成されていることを特徴とする特許請求の範囲
第２項または第３項記載の半導体基板。 ５）絶縁被膜は絶縁材を用いたコート法、蒸着法あるい
は溶射法によって半導体基板本体の全外表面に形成され
ていることを特徴とする特許請求の範囲第２項ないし第
４項いずれかに記載の半導体基板。 ６）絶縁材はポリイミド、フッ素樹脂、シリコンゴムあ
るいはＳｉＣ、Ａｌ＿３Ｎ＿４、Ｓｉ＿３Ｎ＿４、Ａｌ
＿２Ｏ＿３にバインダー、ガラスパウダーあるいはＹ＿
２Ｏ＿３を加えたもの等のいずれかが用いられているこ
とを特徴とする特許請求の範囲第５項記載の半導体基板
。 ７）アルミニウムの薄板で半導体基板本体を製造する半
導体基板本体の製造工程と、この半導体基板本体の製造
工程で製造された半導体基板本体の全外表面に絶縁被膜
を形成する絶縁被膜形成工程とを含むことを特徴とする
半導体基板の製造方法。 ８）アルミニウムの薄板で半導体基板本体を製造する半
導体基板本体の製造工程と、この半導体基板本体の製造
工程で製造された半導体基板本体にマトリックス状ある
いはランダム状に多数個のスルーホールを形成するスル
ーホール形成工程と、このスルーホール形成工程を経た
半導体基板本体の全外表面およびスルーホールの壁面に
絶縁被膜を形成する絶縁被膜形成工程とを含むことを特
徴とする半導体基板の製造方法。 ９）半導体基板本体の製造工程は０．０８〜数ｍｍの厚
さのアルミニウムのフープ材を用いて製造されることを
特徴とする特許請求の範囲第８項記載の半導体基板の製
造方法。 １０）スルーホール形成工程はピアシングプレスを用い
て形成することを特徴とする特許請求の範囲第８項また
は第９項記載の半導体基板の製造方法。 １１）絶縁被膜形成工程は絶縁材を用いたコート法、蒸
着法あるいは溶射法によって半導体基板本体の全外表面
に絶縁被膜を形成することを特徴とする特許請求の範囲
第８項ないし第１０項いずれかに記載の半導体基板の製
造方法。[Claims] 1) A semiconductor substrate body formed of a thin aluminum plate;
A semiconductor substrate comprising an insulating coating covering the entire outer surface of the semiconductor substrate body. 2) A semiconductor substrate body formed of a thin aluminum plate,
A semiconductor substrate comprising a large number of through holes formed in a matrix or random pattern in the semiconductor substrate body, and an insulating coating that covers the walls of the through holes and the entire outer surface of the semiconductor substrate body. 3) The semiconductor substrate according to claim 2, wherein the semiconductor substrate body is made of an aluminum hoop material having a thickness of 0.08 to several mm. 4) The semiconductor substrate according to claim 2 or 3, wherein the semiconductor substrate body is formed with a blank surface by alumite treatment. 5) According to any one of claims 2 to 4, the insulating coating is formed on the entire outer surface of the semiconductor substrate body by a coating method, vapor deposition method, or thermal spraying method using an insulating material. The semiconductor substrate described. 6) Insulating material is polyimide, fluororesin, silicone rubber or SiC, Al_3N_4, Si_3N_4, Al
_2O_3 with binder, glass powder or Y_
6. The semiconductor substrate according to claim 5, wherein any one of the semiconductor substrates containing 2O_3 is used. 7) A semiconductor substrate body manufacturing process in which the semiconductor substrate body is manufactured from a thin aluminum plate, and an insulating coating forming process in which an insulating coating is formed on the entire outer surface of the semiconductor substrate body manufactured in this semiconductor substrate body manufacturing process. A method of manufacturing a semiconductor substrate, comprising: 8) A semiconductor substrate main body manufacturing process in which the semiconductor substrate main body is manufactured from a thin aluminum plate, and a through-hole process in which a large number of through holes are formed in a matrix or random pattern in the semiconductor substrate main body manufactured in this semiconductor substrate main body manufacturing process. A method for manufacturing a semiconductor substrate, comprising a hole forming step and an insulating film forming step of forming an insulating film on the entire outer surface of the semiconductor substrate body that has undergone the through hole forming step and on the wall surface of the through hole. 9) The method of manufacturing a semiconductor substrate according to claim 8, wherein the semiconductor substrate main body is manufactured using an aluminum hoop material having a thickness of 0.08 to several mm. 10) The method of manufacturing a semiconductor substrate according to claim 8 or 9, wherein the through hole forming step is performed using a piercing press. 11) The insulating film forming step is characterized in that the insulating film is formed on the entire outer surface of the semiconductor substrate body by a coating method using an insulating material, a vapor deposition method, or a thermal spraying method. A method for manufacturing a semiconductor substrate according to any one of the above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27472585A JPS62134943A (en) | 1985-12-06 | 1985-12-06 | Semiconductor substrate and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP27472585A JPS62134943A (en) | 1985-12-06 | 1985-12-06 | Semiconductor substrate and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62134943A true JPS62134943A (en) | 1987-06-18 |
Family
ID=17545700
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP27472585A Pending JPS62134943A (en) | 1985-12-06 | 1985-12-06 | Semiconductor substrate and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62134943A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6447053U (en) * | 1987-09-14 | 1989-03-23 | ||
| JP2002310115A (en) * | 2001-04-18 | 2002-10-23 | Matsushita Electric Ind Co Ltd | Lock mechanism |
| US9121467B2 (en) | 2006-02-10 | 2015-09-01 | Stabilus Gmbh | Lockable piston-cylinder assembly |
-
1985
- 1985-12-06 JP JP27472585A patent/JPS62134943A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6447053U (en) * | 1987-09-14 | 1989-03-23 | ||
| JP2002310115A (en) * | 2001-04-18 | 2002-10-23 | Matsushita Electric Ind Co Ltd | Lock mechanism |
| US9121467B2 (en) | 2006-02-10 | 2015-09-01 | Stabilus Gmbh | Lockable piston-cylinder assembly |
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