JPS62132375A - Semiconductor photo detector and manufacture thereof - Google Patents

Semiconductor photo detector and manufacture thereof

Info

Publication number
JPS62132375A
JPS62132375A JP60271568A JP27156885A JPS62132375A JP S62132375 A JPS62132375 A JP S62132375A JP 60271568 A JP60271568 A JP 60271568A JP 27156885 A JP27156885 A JP 27156885A JP S62132375 A JPS62132375 A JP S62132375A
Authority
JP
Japan
Prior art keywords
layer
type
inp
crystal layer
type inp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60271568A
Other languages
Japanese (ja)
Inventor
Tetsuo Sadamasa
定政 哲雄
Fumihiko Kuroda
黒田 文彦
Nobuo Suzuki
信夫 鈴木
Masaru Nakamura
優 中村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60271568A priority Critical patent/JPS62132375A/en
Priority to EP86306984A priority patent/EP0216572B1/en
Priority to DE3650287T priority patent/DE3650287T2/en
Publication of JPS62132375A publication Critical patent/JPS62132375A/en
Priority to US07/240,345 priority patent/US4949144A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a semiconductor photo detector having preferable element characteristics by limiting electron density of N-type InP crystal when introducing Mg as P-type impurity to the N-type InP crystal, thereby simultaneously forming the photo detector and a guard ring. CONSTITUTION:An N-type InP crystal layer 12 having, for example, 2X10<15>cm<-3> of electron density is formed by a liquid-phase growing method on the main surface of an N-type InP substrate crystal 11. Then, a second InP crystal layer 13 is formed by a liquid-phase growing method to bury the etch-removed portion and an X' region to become an inner photo detector. The electron density of the layer 13 is so controlled as to become, for example 6X10<15>cm<-3>. Then, SiO2 and photoresist are selectively formed on the main surface of the InP crystals, and Mg ions are implanted. As a result, the carrier density of the layer 12 is set to 1X10<16>cm-3 or more and 1X10<17>cm<-3> or less of no adverse influence on noise characteristic, a stair type P-N junction photo detector is formed, and the carrier density of the layer 13 is set to 1X10<15>-1X10<16>cm<-3> to form a guard ring.

Description

【発明の詳細な説明】 〔発明の技術分野〕 この発明は光伝送システム等に使用する半導体受光素子
に係り、特にアノくランシー効果を有する半導体受光素
子に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor light-receiving element used in an optical transmission system, and more particularly to a semiconductor light-receiving element having the Anorex Lancey effect.

〔従来技術とその問題点〕[Prior art and its problems]

p−n接合に逆バイアスを印加し、光lこよって生じた
キャリアを増倍させて用いる所菖胃ア、zaランシーホ
トダイオード(APD)には高速応答、内部増幅作用、
高量子効率等の優れた特徴がある。
The Lancey photodiode (APD), which applies a reverse bias to the p-n junction and multiplies the carriers generated by light, has a high-speed response, internal amplification action,
It has excellent features such as high quantum efficiency.

特に、InP材料を用いたAPDはInGaAs 、 
InGaAsPと組み合わせる事によって、優れた長波
長帯用受光素子となり、近年研究開発がさかんに進めら
れている。
In particular, APDs using InP materials include InGaAs,
By combining it with InGaAsP, it becomes an excellent light-receiving element for long wavelength bands, and research and development has been actively progressing in recent years.

第4図はAPDの一構造例を示す断面図であり、本発明
に最も類似した従来例を説明するものである。まず第4
図において、41はn型InP基板、42はInP基板
の主面に形成したn型のアバランシ−増倍層である。4
3はn型InP層である。以上のn型層の主表面に選択
的にZnの拡散あるいはイオン注入によってP型層44
を1回で形成したAPDである。以上の構成において、
X領域は受光部であり、X領域はガードリングとして働
く部分である。
FIG. 4 is a sectional view showing an example of the structure of an APD, and is intended to explain a conventional example most similar to the present invention. First, the fourth
In the figure, 41 is an n-type InP substrate, and 42 is an n-type avalanche multiplication layer formed on the main surface of the InP substrate. 4
3 is an n-type InP layer. A P-type layer 44 is selectively formed on the main surface of the above n-type layer by Zn diffusion or ion implantation.
This is an APD formed in one step. In the above configuration,
The X region is a light receiving part, and the X region is a part that functions as a guard ring.

このような構造における従来技術の例として特開昭56
−71985号公報及び特開昭56−83082号公報
がある。これら従来技術の特徴はX領域のp−n接合を
例えばp型Inpとn型層 nGaAsとで形成し、X
領域のp −n接合をp型InPとn型InPとで形成
した事である。この場合、X領域とX領域のブレークダ
ウン電圧は異なり、禁制帯幅の小さc、)X領域が先行
してアバランシ−降伏して受光部として働く利点はある
が、X領域のp −n接合材料に比較的禁制帯幅の小さ
いI nGaAs等をアバランシ−増倍層とする為に雑
音特性が悪くなる欠点を有していた。又、X領域ではp
−n接合の湾曲によって電界集中が起こり、X領域との
ブレークダウン電圧差を大きくとれない欠点を有してい
た。即ち、従来技術においてはp−n接合のキャリア濃
度分布がX、X領域で急峻で、所謂階段接合形となる為
に受光部とガードリング部とのブレークダウン電圧差を
安定して確実に得る事が困難であった。
An example of the prior art in such a structure is JP-A-56
There are Japanese Patent Laid-open No. 71985 and Japanese Unexamined Patent Publication No. 56-83082. The characteristics of these conventional technologies are that the p-n junction in the X region is formed of, for example, p-type Inp and n-type layer nGaAs;
The p-n junction in the region is formed of p-type InP and n-type InP. In this case, the breakdown voltages of the X region and the X region are different, and the forbidden band width is small. Since the avalanche multiplication layer is made of a material such as InGaAs, which has a relatively small forbidden band width, it has the disadvantage of poor noise characteristics. Also, in the X region, p
The curvature of the -n junction causes electric field concentration, which has the disadvantage that it is not possible to maintain a large breakdown voltage difference with the X region. That is, in the conventional technology, the carrier concentration distribution of the p-n junction is steep in the X and X regions, resulting in a so-called stepped junction type, so it is necessary to stably and reliably obtain the breakdown voltage difference between the light receiving part and the guard ring part. Things were difficult.

従って良好なAPD特性が安定して得られない欠点を基
本的問題として有していた。
Therefore, the basic problem is that good APD characteristics cannot be stably obtained.

なお、受光部とガードリング部を異なる材料あるいは、
別々の製造工程で設けるような公知例は多数あるが、本
発明との関連性は薄い為説明は省略する。
In addition, the light receiving part and the guard ring part may be made of different materials or
Although there are many known examples in which they are provided in separate manufacturing processes, their description is omitted because they have little relevance to the present invention.

〔発明の目的〕[Purpose of the invention]

この発明の目的は、前述の欠点を改善し、良好な素子特
性を有する半導体受光素子及びその製造方法を提供する
ことにある。
An object of the present invention is to improve the above-mentioned drawbacks and provide a semiconductor light-receiving device having good device characteristics and a method for manufacturing the same.

〔発明の概要〕[Summary of the invention]

この発明は、n型InP結晶にMgをp型不純物として
導入した際に、特徴的な正孔濃度分布を呈する事を利用
するもので、n型InP結晶の電子濃度を限定する事に
より、従来にはない半導体受光素子を構成したもので、
又この受光素子を得る場合にMpのイオン注入を利用し
た方法である。
This invention utilizes the fact that when Mg is introduced as a p-type impurity into an n-type InP crystal, it exhibits a characteristic hole concentration distribution. It is composed of a semiconductor photodetector that is not found in
Moreover, when obtaining this light-receiving element, the method utilizes Mp ion implantation.

〔発明の効果〕〔Effect of the invention〕

この発明によって、APDの有する高速性、高量子効率
が保持されながら以下の効果が得られる。
According to the present invention, the following effects can be obtained while maintaining the high speed and high quantum efficiency of APD.

(11比較的禁制帯幅の大きいn型InPによるアバラ
ンシ−増倍層を構成できるので低雑音である。(2)p
 −n接合を1回のイオン注入で形成できるので、簡便
な裏作工程でありながら、構造の均一性に優れている。
(11 Low noise because an avalanche multiplication layer can be constructed using n-type InP with a relatively large forbidden band width. (2) p
Since the -n junction can be formed by one ion implantation, the structure is excellent in uniformity even though it is a simple back-up process.

(31p −n @合とp−1−n型接合(iは半絶縁
性半導体)の2種類が形成できるので、受光部上ガード
リング部とのブレークダウン電圧差が充分得られる。即
ち素子特性の向上、安定化および裏作工程の簡略化によ
って半導体受光素子の低廉化が可能となるものである。
(Since two types can be formed: a 31p-n @ junction and a p-1-n type junction (i is a semi-insulating semiconductor), a sufficient breakdown voltage difference between the upper guard ring part of the light receiving part and the guard ring part can be obtained. In other words, the device characteristics The cost of semiconductor light-receiving elements can be reduced by improving and stabilizing the process and simplifying the back-up process.

〔発明の実施例〕[Embodiments of the invention]

以下本発明の実施例を第1図、第2図を参照して説明す
る。第1図は受光素子の断面図、第2図はInP結晶に
Mgを導入したときの正孔濃度を分布の1例を示すもの
である。まず、受光素子は次のように構成した。n型I
nP基板結晶11の主面上に電子濃度が例えば2X10
”□のn型IrP結晶層12を液相成長法によって形成
する。
Embodiments of the present invention will be described below with reference to FIGS. 1 and 2. FIG. 1 is a cross-sectional view of a light-receiving element, and FIG. 2 shows an example of the hole concentration distribution when Mg is introduced into an InP crystal. First, the light receiving element was constructed as follows. n-type I
The electron concentration on the main surface of the nP substrate crystal 11 is, for example, 2×10
A square n-type IrP crystal layer 12 is formed by liquid phase growth.

次にホトレジストをマスクとしてInP層12及び基板
11の一部を選択的に工9チング除去する。
Next, using the photoresist as a mask, the InP layer 12 and a portion of the substrate 11 are selectively etched away.

この工程によって円形の受光部となるX′領領域形成す
る。次に即にエツチング除去された部分及びX′領領域
埋めるごとく第2のInP結晶層13を液相成長法によ
って形成する。第2のInP層13の電子濃度は、例え
ば6X10 cmとなるように制御する。なお、InP
層13を形成する他の手段として、一旦エッチング除去
された部分をこ選択的結晶成長した後、さらに結晶成長
することによって主表面の平担性を良くする事も可能で
ある。
Through this step, an X' region that becomes a circular light receiving section is formed. Next, a second InP crystal layer 13 is immediately formed by liquid phase growth to fill the etched portion and the X' region. The electron concentration of the second InP layer 13 is controlled to be, for example, 6×10 cm. In addition, InP
As another means for forming the layer 13, it is also possible to improve the flatness of the main surface by selectively growing crystals on the portions that have been removed by etching and then growing the crystals further.

次に、これらInP結晶の主表面上にSin、及びホト
レジストを選択的に形成し、Mgをイオン注入する。M
gの注入条件は、例えば5×10α■のドーズ量で15
9keVの加速電圧で行なった。次に、Sin、及びホ
トレジストを除去した後、リン酸ガラスを主表面に形成
し、例えば750℃、20分間の熱処理を行なう事によ
ってp型InP層14及び半絶縁性InPId15を同
時に形成する。次にリン酸ガラスを除去した主表面にS
 i、N・16を形成し、電極17、および18の真空
蒸着法によって形成して受光素子を完成する。
Next, Sin and photoresist are selectively formed on the main surfaces of these InP crystals, and Mg ions are implanted. M
The implantation conditions for g are, for example, 15
This was carried out at an accelerating voltage of 9 keV. Next, after removing the Sin and photoresist, phosphoric acid glass is formed on the main surface, and a p-type InP layer 14 and a semi-insulating InPId layer 15 are simultaneously formed by performing heat treatment at, for example, 750° C. for 20 minutes. Next, apply S to the main surface from which the phosphate glass has been removed.
i, N.16 are formed, and electrodes 17 and 18 are formed by vacuum evaporation to complete the light receiving element.

以上のように構成した受光素子のp−n接合は、1回の
p −n接合形成でありなから2陣類の形態を有し、受
光素子としての特性は優れたものであった。その理由を
第2図を参照して以下説明する。
The p-n junction of the light-receiving element constructed as described above had two types of configurations since the p-n junction was formed only once, and had excellent characteristics as a light-receiving element. The reason for this will be explained below with reference to FIG.

第2図において、InP結晶中の正孔濃度は急峻変化領
域Aと緩慢変化領域Bとに大別できる。この領域Aを利
用して受光部のp−n接合を形成すれば階段型p−n接
合となり、領域Bを利用してガードリング部のp−n接
合を形成すれば極めて緩かなキャリア濃度変化をした傾
斜型p −n接合あるいは半絶縁性層を介したp −n
接合となる。そこで、n型InP層12のキャリア濃度
をlXlocJ以上で且つ雑音特性に悪影響のないlX
l0  n以下として、階段型p−n接合の受光部を形
成し、第2のInP層13のキャリア濃度を1×10〜
1×1016crIL′としてガードリング部を形成し
たものである。尚、図示していないが受光部及びガード
リング部のp−n接合はEBIC(ElectronB
eamInducd Current )特性評価、電
圧対容量変化特性評価、ブレークダウン電圧特性評価に
よって階段型あるいは半絶縁性を介したp −n接合で
ある事を確認した。
In FIG. 2, the hole concentration in the InP crystal can be roughly divided into a steep change region A and a slow change region B. If this region A is used to form a p-n junction in the light receiving part, a stepped p-n junction will be formed, and if region B is used to form a p-n junction in the guard ring part, the carrier concentration will change extremely slowly. graded p-n junction or p-n junction via a semi-insulating layer
It becomes a junction. Therefore, the carrier concentration of the n-type InP layer 12 should be set to lXlocJ or more and to have no adverse effect on the noise characteristics.
10 n or less, forming a stepped p-n junction light receiving part, and setting the carrier concentration of the second InP layer 13 to 1 x 10 ~
The guard ring portion is formed of 1×10 16 crIL'. Although not shown, the p-n junction of the light receiving section and the guard ring section is an EBIC (Electron B
It was confirmed that it was a step-type or semi-insulating p-n junction by evaluating the current (eamInducd Current) characteristics, voltage vs. capacitance change characteristics, and breakdown voltage characteristics.

このように構成した2a類のp−n接合のブレークダウ
ン電圧差は約40Vあり、受光部が先行して均一にブレ
ークダウンしていた。さらに、ガードリング部となるY
領域はp −n接合の湾曲があるにもかかわらず、電界
集中による局所ブレークダウンは起こらないので安定し
た素子特性が得られた。
The breakdown voltage difference of the p-n junction of type 2a constructed in this way was about 40 V, and the light receiving part broke down uniformly first. Furthermore, the Y that becomes the guard ring part
Despite the curvature of the p-n junction in the region, no local breakdown due to electric field concentration occurred, so stable device characteristics were obtained.

〔他の実施例〕[Other Examples]

第3図を参照して第2の実施例を以下説明する。 A second embodiment will be described below with reference to FIG.

第3図において、まずn型InP基板31上にn型In
P結晶層32、n型InGaAs結晶層33、n型In
GaAsP結晶層34、n型InP結晶層35を液相成
長方法によって順次形成した基体を準備する。
In FIG. 3, first, an n-type InP substrate 31 is coated with an n-type InP substrate 31.
P crystal layer 32, n-type InGaAs crystal layer 33, n-type In
A substrate is prepared in which a GaAsP crystal layer 34 and an n-type InP crystal layer 35 are sequentially formed by a liquid phase growth method.

各結晶層は各々はぼ等しい格子定数となるように結晶成
長する。この基体を円形の受光部ができるように、Si
、Na膜をマスクにしてメサエッチングする。次に、エ
ツチング除去された部分を坤めるようにn型InP層3
6を選択的に一旦結晶成長し、続いてSi、N、膜を除
去した後、主表面にn型InP36を追加成長する。以
上の構成においてn型InPI帝35のキャリア濃度を
5X10.CrILとし、n型InP層36のキャリア
濃度9X10 cm とする。
Each crystal layer is grown to have approximately the same lattice constant. This base was made of Si so that a circular light receiving part could be formed.
, Mesa etching is performed using the Na film as a mask. Next, the n-type InP layer 3 is etched to cover the etched portion.
After selectively growing crystals of InP 36, and subsequently removing Si, N, and films, n-type InP 36 is additionally grown on the main surface. In the above configuration, the carrier concentration of n-type InPI 35 is set to 5×10. CrIL is used, and the carrier concentration of the n-type InP layer 36 is 9×10 cm.

次に第1の実施例同様に選択的にMgを主表面にイオン
注入する。この場合の条件は200 keVの加速電圧
でlXl0 cmのドーズ量で行なった。次にリンの圧
力Fで700℃10分の熱処理を行ないp型InPH4
37を形成し、階段型p−n接合381及び半絶縁性層
382を介したp−n接合を同時に形成する。次に、絶
縁膜39.′411M391,392を形成して受光素
子を完成する。
Next, as in the first embodiment, Mg ions are selectively implanted into the main surface. The conditions in this case were an acceleration voltage of 200 keV and a dose of 1X10 cm. Next, heat treatment was performed at 700°C for 10 minutes at phosphorus pressure F to form a p-type InPH4
37, and simultaneously form a stepped p-n junction 381 and a p-n junction via a semi-insulating layer 382. Next, the insulating film 39. '411M391, 392 are formed to complete the light receiving element.

以上のように構成した受光素子は、p−n接合381が
比較的高濃度の階段接合であり、高速の光信号に対応で
きる受光素子であり、又、1.3μm。
In the light receiving element configured as described above, the p-n junction 381 is a step junction with a relatively high concentration, and is a light receiving element that can handle high-speed optical signals, and has a thickness of 1.3 μm.

1.5μmの波長の光に対応した光通信用受光素子とし
て利用できる。
It can be used as a light receiving element for optical communications that supports light with a wavelength of 1.5 μm.

なお、InP、結晶にMjl@24人したときのキャリ
ア濃度分布の1例を第2図に示したが、alf分布はM
gのイオン注入及び熱処理の条件によって檀々の形態を
示す。しかしながら、前述の急峻濃度勾配を利用して、
n型InP結晶層のキャリア濃度を設定する事で階段及
び傾斜型のp −n接合を構成する事が可能である。
Figure 2 shows an example of the carrier concentration distribution when Mjl@24 people are added to the InP crystal, but the alf distribution is
Various shapes are shown depending on the conditions of ion implantation and heat treatment. However, using the steep concentration gradient mentioned above,
By setting the carrier concentration of the n-type InP crystal layer, it is possible to configure stepped and inclined p-n junctions.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の受光素子の断面図、第2図は本発明の
詳細な説明するための濃度分布図、第3図は本発明の他
の実施例による受光素子の断面図、第4図は従来の受光
素子断面図である。 11.31.41・−InP基板結晶、12,13,3
2゜33.34,35,36,42.43・・・n型結
晶層、14゜37.44−9型InP結晶層、15,3
82・・・半絶縁性層、16.39・・・絶縁膜、17
,18,391,392・・・電極。
FIG. 1 is a sectional view of a light receiving element of the present invention, FIG. 2 is a concentration distribution diagram for explaining the present invention in detail, FIG. 3 is a sectional view of a light receiving element according to another embodiment of the present invention, and FIG. The figure is a sectional view of a conventional light receiving element. 11.31.41・-InP substrate crystal, 12,13,3
2゜33.34, 35, 36, 42.43... n-type crystal layer, 14゜37.44-9 type InP crystal layer, 15,3
82...Semi-insulating layer, 16.39...Insulating film, 17
, 18, 391, 392...electrode.

Claims (3)

【特許請求の範囲】[Claims] (1)n型InP結晶の主表面に一種類のP型不純物を
導入してp−n接合を形成してなる半導体受光素子にお
いて、p型InP層に接する第1n型InP層の不純物
濃度が1×10^1^6〜1×10^1^7atm/c
m^3であり、p型InP層に接し該第1n型InP層
の周囲に位置する第2n型InP層の不純物濃度が1×
10^1^5〜1×10^1^6atm/cm^3であ
って、前記p型不純物がMgである事を特徴とする半導
体受光素子。
(1) In a semiconductor light-receiving device formed by introducing one type of P-type impurity into the main surface of an n-type InP crystal to form a p-n junction, the impurity concentration of the first n-type InP layer in contact with the p-type InP layer is 1×10^1^6 to 1×10^1^7 atm/c
m^3, and the impurity concentration of the second n-type InP layer in contact with the p-type InP layer and located around the first n-type InP layer is 1×
10^1^5 to 1x10^1^6 atm/cm^3, and the p-type impurity is Mg.
(2)n型InP基板結晶の主表面上に第1InP結晶
層、InGaAs結晶層、InGaAsP結晶層、第2
InP結晶層、第3InP結晶層とを順次構成した基体
の第2InP結晶層と前記p型InP層が接して形成し
たp−n接合が階段接合を構成し、第3InP結晶層と
前記p型InP層とが接して形成したp−n接合が傾斜
接合もしくは半絶縁性を呈する結晶層を介した構成とし
た事を特徴とする特許請求の範囲第1項記載の半導体受
光素子。
(2) On the main surface of the n-type InP substrate crystal, a first InP crystal layer, an InGaAs crystal layer, an InGaAsP crystal layer, a second
A p-n junction formed by contacting the second InP crystal layer of the base body, which includes an InP crystal layer and a third InP crystal layer sequentially, and the p-type InP layer constitutes a step junction, and the third InP crystal layer and the p-type InP 2. The semiconductor light-receiving device according to claim 1, wherein the p-n junction formed in contact with the two layers is formed through a tilted junction or a crystal layer exhibiting semi-insulating properties.
(3)n型InP基板結晶上にIn及びPを構成元素と
して含むn型III、V族混晶層を介して設けた不純物濃
度が1×10^1^6〜1×10^1^7atm/cm
^−^3の第1n型InP結晶層と、該混晶層及び第1
n型InP結晶層の周囲に設けた不純物濃度が1×10
^1^5〜1×10^1^7atm/cm^−^3の第
2n型InP結晶層とを構成した基体の主表面にMgを
イオン注入する工程と、650℃〜75℃の温度でイオ
ン注入層を活性化することによつて、p−n接合を形成
する工程とを具備した事を特徴とする半導体受光素子の
製造方法。
(3) An impurity concentration of 1×10^1^6 to 1×10^1^7 atm provided on an n-type InP substrate crystal via an n-type III and V group mixed crystal layer containing In and P as constituent elements /cm
^-^3 first n-type InP crystal layer, the mixed crystal layer and the first
The impurity concentration provided around the n-type InP crystal layer is 1×10
A step of ion-implanting Mg into the main surface of the substrate that formed the second n-type InP crystal layer of ^1^5 to 1 x 10^1^7 atm/cm^-^3, and a step of ion-implanting Mg at a temperature of 650 °C to 75 °C. 1. A method for manufacturing a semiconductor light-receiving device, comprising the step of forming a pn junction by activating an ion implantation layer.
JP60271568A 1985-09-24 1985-12-04 Semiconductor photo detector and manufacture thereof Pending JPS62132375A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP60271568A JPS62132375A (en) 1985-12-04 1985-12-04 Semiconductor photo detector and manufacture thereof
EP86306984A EP0216572B1 (en) 1985-09-24 1986-09-10 Semiconductor photo-detector having a two-stepped impurity profile
DE3650287T DE3650287T2 (en) 1985-09-24 1986-09-10 Semiconductor photodetector with a two-stage contamination profile.
US07/240,345 US4949144A (en) 1985-09-24 1988-09-01 Semiconductor photo-detector having a two-stepped impurity profile

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60271568A JPS62132375A (en) 1985-12-04 1985-12-04 Semiconductor photo detector and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS62132375A true JPS62132375A (en) 1987-06-15

Family

ID=17501893

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60271568A Pending JPS62132375A (en) 1985-09-24 1985-12-04 Semiconductor photo detector and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS62132375A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02177570A (en) * 1988-12-28 1990-07-10 Toshiba Corp Semiconductor element and manufacture thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02177570A (en) * 1988-12-28 1990-07-10 Toshiba Corp Semiconductor element and manufacture thereof

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