JPS62132337A - Detecting method for mis structure boundary level using optical capacitance method - Google Patents

Detecting method for mis structure boundary level using optical capacitance method

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Publication number
JPS62132337A
JPS62132337A JP27401485A JP27401485A JPS62132337A JP S62132337 A JPS62132337 A JP S62132337A JP 27401485 A JP27401485 A JP 27401485A JP 27401485 A JP27401485 A JP 27401485A JP S62132337 A JPS62132337 A JP S62132337A
Authority
JP
Japan
Prior art keywords
energy
mis
interface
capacitance
diode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27401485A
Other languages
Japanese (ja)
Inventor
Jiro Shibata
柴田 治郎
Mitsuteru Kimura
光照 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIESU KK
Original Assignee
JIESU KK
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Filing date
Publication date
Application filed by JIESU KK filed Critical JIESU KK
Priority to JP27401485A priority Critical patent/JPS62132337A/en
Publication of JPS62132337A publication Critical patent/JPS62132337A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To calculate a boundary level from relation of emitting monochromatic optical energy corresponding to a variation amount by altering a voltage applied to a MIS diode to hold flat band capacity of the diode at a predetermined value. CONSTITUTION:An insulator layer 2 is formed on an N-type Si substrate 3, an MIS diode in which metal I is deposited is cooled to 77 deg.K, and a positive voltage VG is applied to the metal I side. Thus, a boundary level density NSS(E) is satisfied by electrons 6. A negative voltage GG of the metal I side is applied, and monochromatic optical energy hnu is emitted by setting to a capacity Cfb' slightly smaller than a flat band capacity Cfb. The value of VG is varied to hold Cfb' during the meantime. Relationship between variation amount VG of the applied voltage and energy hnu of the emitting monochromatic light is shown by a curve A. This curve A is differentiated by the energy hnu to calculate a boundary level density NSS(E). Thus, a boundary level substantially over the entire range of a band gap Eg can be detected.

Description

【発明の詳細な説明】 この発明は、フォトキャパシタンス法を用いてMIS構
造の界面準位の情報を得ようとする方法に関するもので
ある。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of obtaining information on interface states of an MIS structure using a photocapacitance method.

フォトキャパシタンス法は、半導体の門接合やショント
キー接合などの空乏層領域に単色光を照射して、この空
乏層領域にある深い準位の荷電状態を変化させるとき、
接合の印加電圧を保持して空乏層容量を変化させる(一
定電圧法)か、または、空乏層容量を一定に保持するよ
うに接合の印加電圧を変化させる(一定容量法)ことに
より、空乏層内、特に空乏層端の位置における深い準位
に関する情報(準位のイオン化エネルギー、密度、光イ
オン化断面積など)を得ようとするものである。準位の
イオン化エネルギーがそのまま、容量変化の生じる単色
光エネルギーに対応すること、低温での測定により、キ
ャリアの熱励起が抑えられるので、高感度の準位検出が
可能であることなどが知られている。しかし、MIS構
造の絶縁体層(1層)と半導体(S)との界面では、格
子定数の異なる材料から成る異種接合となっているため
、多くの準位がエネルギー的にほぼ連続的に存在してい
ること、界面が絶縁体層と接しているためpn接合やシ
ョットキー接合とは異なり。
In the photocapacitance method, monochromatic light is irradiated onto a depletion layer region such as a gate junction or a Shontkey junction in a semiconductor to change the charge state of a deep level in this depletion layer region.
The depletion layer can be changed by holding the voltage applied to the junction and changing the depletion layer capacitance (constant voltage method), or by changing the voltage applied to the junction so as to keep the depletion layer capacitance constant (constant capacitance method). Among these, the objective is to obtain information regarding deep levels (level ionization energy, density, photoionization cross section, etc.), especially at the position of the edge of the depletion layer. It is known that the ionization energy of a level directly corresponds to the monochromatic light energy that causes a capacitance change, and that thermal excitation of carriers is suppressed by measurement at low temperatures, making it possible to detect levels with high sensitivity. ing. However, at the interface between the insulator layer (1 layer) and the semiconductor (S) in the MIS structure, there is a heterogeneous junction made of materials with different lattice constants, so many energy levels exist almost continuously. This is different from a pn junction or a Schottky junction because the interface is in contact with an insulator layer.

キャリアの蓄積層や反転層が形成され得ること、更に、
周波数および温度依存性をもつ少数キャリア効果の8瞳
が存在することなどのため、現象が複雑で、従来のフォ
トキャパシタンス法での取扱いによるMIS接合の界面
準位の検出報告はまだない。
A carrier accumulation layer or an inversion layer may be formed, and further,
The phenomenon is complicated due to the presence of 8 pupils of minority carrier effects with frequency and temperature dependence, and there have been no reports yet of detection of interface states in MIS junctions using conventional photocapacitance methods.

従来、MIS構造の界面準位の検出、特に界面準位密度
NssのエネルギーEの分布N5s(E)の検出方法と
して、種々の温度TでMISダイオードの静電容量(以
下、容量という)Cと印加電圧V(との関係であるc−
v6特性を測定し、フラットバンド電圧Vraの変化と
フェルミレベルEfの温度変化の関係を利用していた。
Conventionally, as a method for detecting the interface state of an MIS structure, particularly for detecting the distribution N5s(E) of the energy E of the interface state density Nss, the electrostatic capacitance (hereinafter referred to as capacitance) C of the MIS diode at various temperatures T and The relationship between the applied voltage V (c-
The v6 characteristic was measured and the relationship between the change in flat band voltage Vra and the temperature change in Fermi level Ef was utilized.

これは、温度Tを増大させると半導体中のフェルミ準位
EF(T)は、低温におけるバンド端(伝導イ17端ま
たは価電子帯端)からバンドギャップEgの中央近くに
移動すること、およびフェルミ準位EJ(T)以下に存
在する界面準位は、電子で満されることを利用し、温度
Tを変化させることにより、界面準位の荷電状態を変化
させ1種々の温度のC−v−特性における■FBの変化
から界面準位密度のエネルギー分布N5s(E)を求め
るものである。
This means that as the temperature T increases, the Fermi level EF (T) in the semiconductor moves from the band edge at low temperature (conduction band edge or valence band edge) to near the center of the band gap Eg. Taking advantage of the fact that the interface states existing below the level EJ(T) are filled with electrons, by changing the temperature T, the charge state of the interface states can be changed. - The energy distribution N5s(E) of the interface state density is determined from the change in FB in the characteristics.

このとき、被測定準位のエネルギーEはフェルミ準位町
(T)の位置に対応させているために。
At this time, the energy E of the level to be measured is made to correspond to the position of the Fermi level (T).

エネルギーEの算出が間接的であること、温度Tの微細
な制御が要求されること、半導体のバンド端の近傍に存
在している界面準位しか測定し難く、深い界面準位の測
定には300に以上の温度が必要とされることもあり半
導体材料の種類によっては変質する場合もあること、更
に同一の伝導形(n形またはp形)の試料では木質的に
どちらかのバンド端からエネルギーギャップEgの半分
までのエネルギー内に存在する界面準位しか検出できな
いこと、などの欠点がある。
Calculation of energy E is indirect, fine control of temperature T is required, it is difficult to measure only interface states that exist near the band edge of a semiconductor, and it is difficult to measure deep interface states. Temperatures exceeding 300°C may be required, and depending on the type of semiconductor material, it may change in quality.Furthermore, in samples of the same conductivity type (n-type or p-type), the wood quality may vary from either band edge. There are drawbacks such as the fact that only interface levels existing within an energy range of up to half of the energy gap Eg can be detected.

本発明によるMISダイオードの界面準位の検出方法は
、低温(たとえば7?″K)でのフォトキャパシタンス
法を利用しているため、界面準位からの熱励起を抑えな
がら測定でき、単色光エネルギー1νと被測定準位のエ
ネルギーEとの直接的対応関係が得られ、かつ、単色光
エネルギー’nvの選枳により木質的に深い界面準位ま
で検出可能であることなど、従来の温度変化による界面
準位検出方法の欠点を解消できるものである。
The method for detecting the interface state of an MIS diode according to the present invention uses a photocapacitance method at low temperatures (for example, 7?''K), so it can be measured while suppressing thermal excitation from the interface state, and monochromatic light energy can be measured. 1ν and the energy E of the level to be measured can be obtained, and by selecting the monochromatic light energy 'nv, it is possible to detect even the deep interface level in terms of wood quality. This eliminates the drawbacks of interface level detection methods.

本発明は、前述のようなフォトキャパシタンス法の特長
を生かしながら、MISダイオードに種々のエネルギー
の単色光を照射したときに、MISダイオードのフラッ
トバンド容量C(bまたは、フラットバンド容量Cfb
の近傍の容量Cabを保持するように、MISダイオー
ドへの印加電圧宥を変化させ、この印加電圧の変化量Δ
V&と照射単色光のエネルギーhνとの関係から界面準
位密度N5s(E)に関する情報を得ようとするもので
ある。
The present invention makes use of the features of the photocapacitance method as described above, and when the MIS diode is irradiated with monochromatic light of various energies, the flat band capacitance C (b or flat band capacitance Cfb) of the MIS diode is
The voltage applied to the MIS diode is changed so as to maintain the capacitance Cab in the vicinity of Δ
The purpose is to obtain information regarding the interface state density N5s(E) from the relationship between V& and the energy hv of the irradiated monochromatic light.

本発明では、MISダイオードの容Hcをフラットバン
ド容量C5bまたは、その近傍の容量C4bに固定する
ように、印加電圧VQを変化させるので、半導体側に広
がる一t95層11!rlが憶刃〒まス程度に小さいと
近似できる。このため、半導体側は多数キャリアで満さ
れていると考えられ、絶縁体層(1層)と半導体(S)
との界面にある準位、いわゆる界面準位のみが単色光照
射により、その荷電状態が変化すると考えることができ
る。
In the present invention, since the applied voltage VQ is changed so that the capacitance Hc of the MIS diode is fixed at the flat band capacitance C5b or the capacitance C4b in the vicinity thereof, the t95 layer 11! It can be approximated that rl is as small as a memory knife. Therefore, it is thought that the semiconductor side is filled with majority carriers, and the insulator layer (1 layer) and semiconductor (S)
It can be considered that only the so-called interface level, which is the level at the interface with the molecule, changes its charge state by monochromatic light irradiation.

このとき絶縁体層(1層)中に存在する準位も、この単
色光照射により荷電状態が変化することが考えられるが
、この場合は等価的な界面準位として検出した界面準位
の中に含ませて考えるものとする。
At this time, the charge state of the level existing in the insulator layer (layer 1) may also change due to this monochromatic light irradiation, but in this case, the level of the interface level detected as an equivalent interface level may change. It shall be considered as including

また、MISダイオードの界面に変成層が形成され、こ
の変成層が半導体のバンドギャップEgより大きい場合
など、MISダイオードをフラットバンド状態にしても
、半導体の多数キャリアにより界面準位が容易に満され
ない場合を除き、半導体側に微少の空乏層を形成させ、
フラットバンド容量 C5bより少し小さめの容fit
cfb’に保持するようにした方がよい。
In addition, in cases where a metamorphic layer is formed at the interface of the MIS diode and this metamorphic layer is larger than the bandgap Eg of the semiconductor, the interface state is not easily filled by the majority carriers of the semiconductor even if the MIS diode is brought into a flat band state. Except in some cases, a minute depletion layer is formed on the semiconductor side,
Flat band capacity Slightly smaller capacity fit than C5b
It is better to keep it in cfb'.

以下、図面を参照しながら詳細に説明する。A detailed description will be given below with reference to the drawings.

第1図は、本発明によるMIS構造の界面準位4を検出
する方法を説明するためのMISa造のエネルギーバン
ド概略図であり、基板半導体として、n形、Si半導体
3を使用し、フラットバンド電圧V「巳より、その絶対
値が少し大きい電圧VC,(IVFBIくし/hl)を
印加したときの状態である。また、エネルギーしなる単
色光を照射し、界面準位N5s(E)に捕獲されている
電子を半導体の伝導帯に励起している状態をも示しであ
る。第2図はMISダイオードの容量Cと印加電圧兎と
の関係(C−h特性)であり曲線α、β、γはそれぞれ
暗状態、 )11/l光照射時、し?光照射時のC−V
+、特性を示し、フラットバンド容量Cfbより少し小
さい容量Cfb′に対応するそれぞれの印加電圧VGO
,Vb+、Vc、zおよびVbOとVry+、VCl2
との差aVel、aVGzも同時に示しである。
FIG. 1 is a schematic energy band diagram of the MISa structure for explaining the method of detecting the interface level 4 of the MIS structure according to the present invention. This is the state when applying a voltage VC, (IVFBI comb/hl) whose absolute value is a little larger than the voltage V. In addition, monochromatic light with high energy is irradiated and captured in the interface level N5s (E). It also shows the state in which electrons are excited to the conduction band of the semiconductor. Figure 2 shows the relationship between the capacitance C of the MIS diode and the applied voltage (C-h characteristic), and the curves α, β, γ is the dark state, )11/l light irradiation, and cold light irradiation C-V
+, the respective applied voltage VGO corresponding to the capacitance Cfb′ which is slightly smaller than the flat band capacitance Cfb.
, Vb+, Vc, z and VbO and Vry+, VCl2
The differences aVel and aVGz are also shown at the same time.

界面準位の検出方法の実施例として、キャリア密度nが
約2 X 10cmのn形Si基板3に、絶縁体層2と
して5i02熱酸化膜約800人を形成し、金属Iとし
てAQを蒸着形成したMISダイオードについて以下に
示す。
As an example of the interface state detection method, a 5i02 thermal oxide film of about 800 layers was formed as the insulator layer 2 on an n-type Si substrate 3 with a carrier density n of about 2 x 10 cm, and AQ was vapor-deposited as the metal I. The MIS diode is shown below.

先ず、77°KにMISダイオードを冷却し、その後、
MISダイオード界面に充分蓄積層が形成されるように
、金III側に正の印加電圧V&=+37を暗状態で印
加し、1分間保持する。この操作により界面準位密度N
5s(E)は、半導体の多数キャリアである電子6によ
り満される。
First, cool the MIS diode to 77°K, then
In order to form a sufficient accumulation layer at the interface of the MIS diode, a positive applied voltage V&=+37 is applied to the gold III side in a dark state and maintained for 1 minute. By this operation, the interface state density N
5s(E) is filled with electrons 6, which are the majority carriers of the semiconductor.

次に暗状態のまま、金属I側に負の電圧vq=−3,2
929を印加し、フラットバンド容量C4b=22pF
より少し小さな容@ C4b=  20.00pFにセ
ットする。その後、分光器を通して、単色光エネルギー
1、、=0.38.0.38.0.40−−−11.1
8.1,20evの如く、それぞれ3分間ずつ光照射を
行い、その間中、C5b’= 20.0OpFを保持す
るようにvqの値を変化させる。このような状態でのバ
ンド図が第1図に示したものである。
Next, while maintaining the dark state, apply a negative voltage vq=-3,2 to the metal I side.
929 is applied, flat band capacitance C4b=22pF
Set a slightly smaller capacitance @ C4b = 20.00pF. Then, through a spectroscope, the monochromatic light energy 1,,=0.38.0.38.0.40---11.1
8. Light irradiation is performed for 3 minutes at 1 and 20 ev, respectively, and the value of vq is changed so as to maintain C5b'=20.0 OpF throughout the period. A band diagram in such a state is shown in FIG.

それぞれの印加電圧V+、(hし)の変化を、暗状態の
容量C+b゛に対応する印加電圧V、oti−基準とし
、ΔVIlf(hし) = Vc+ (kし)−Vc、
oとして表示し、かつ計測する。このaVe (−ν)
と照射単色光のエネルギーし=Eとの関係をグラフ化し
た場合の特性曲線例を第3図に示す。
The change in each applied voltage V+ (h) is taken as the applied voltage V, oti- corresponding to the capacitance C+b in the dark state, and ΔVIlf (h) = Vc+ (k) - Vc,
Display and measure as o. This aVe (-ν)
FIG. 3 shows an example of a characteristic curve when the relationship between E and the energy of irradiated monochromatic light = E is graphed.

尚、照射光の光強度を大きくしであるので、各エネルギ
ーhしの単色光の3分間照射で、印加電圧Veの変化が
、充分飽和状態となり、 AQ金属電極Iのすぐ裏にあ
る界面準位は、半導体内での散乱光や裏面からの反射光
で充分励起できるようである。
In addition, since the light intensity of the irradiated light is increased, the change in the applied voltage Ve becomes sufficiently saturated after 3 minutes of irradiation with monochromatic light of each energy h, and the interface state immediately behind the AQ metal electrode I is It appears that the radiation can be sufficiently excited by scattered light within the semiconductor or reflected light from the back surface.

界面準位密度N5s(E)は N5s(E)= Cot 、 cl Vratky) 
= Coy 、 川mすeA   dE    eA 
 dE =班・1主−一一一一−(1) ・eA   dE として算出できるので、第3図の曲線をエネルギーE 
(=hし)で微分して式(1)を利用し、界面準位密度
N 5s(E)を算出する。ここでCatは酸化膜容量
、Aは接合面積、eは電荷素置である。
The interface state density N5s(E) is N5s(E) = Cot, cl Vratky)
= Coy, river msueA dE eA
Since it can be calculated as dE = group・1main−1111−(1) ・eA dE, the curve in Figure 3 can be calculated as energy E
(=h) and use equation (1) to calculate the interface state density N5s(E). Here, Cat is the oxide film capacitance, A is the junction area, and e is the charge element.

以上のようにして算出した界面準位密度N5s(E)の
結果の概略図を第4図に示す。
FIG. 4 shows a schematic diagram of the result of the interface state density N5s(E) calculated as described above.

第4図におけるエネルギーEは、試料がn形半導体を用
いたものであるので、伝導帯下端Ecから、バンドギャ
ップEgの中で1価電子帯端Evに向って測ったエネル
ギーを表わしている。
Since the sample uses an n-type semiconductor, the energy E in FIG. 4 represents the energy measured from the conduction band lower end Ec toward the single valence band end Ev within the band gap Eg.

尚、照射単色光のエネルギーhvがバンドギャップEg
の半分より大きい場合(5,2¥)には、価電子帯から
励起した電子を更に伝導帯に励起するので、電子、正札
の光学的放出割合をそれぞれe、。、eP′とすると典
を補正係数として式(1)の右辺に掛けた値が界面準位
密度N5s(E)を表わす、’  e、、’ =e、O
の場合はその補正係数は展となる。
Note that the energy hv of the irradiated monochromatic light is the band gap Eg
(5,2 yen), the electrons excited from the valence band are further excited to the conduction band, so the optical emission ratios of electrons and regular bills are e, respectively. , eP', the value multiplied by the right side of equation (1) using the correction coefficient represents the interface state density N5s(E), 'e,,' = e, O
In the case of , the correction coefficient becomes the expansion.

以上はn形半導体を基板としたMISダイオードの例で
あるがp形半導体を使用したMISダイオードについて
も略同様である。この場合は、第4図に対応するエネル
ギーEは、価電子帯端1=vから測った界面準位のエネ
ルギー値を示すことになる。
The above is an example of a MIS diode using an n-type semiconductor as a substrate, but the same applies to a MIS diode using a p-type semiconductor. In this case, the energy E corresponding to FIG. 4 indicates the energy value of the interface level measured from the valence band edge 1=v.

MIS構造の界面準位の検出方法についてのみ記述した
が、絶縁体層(I層)2をバンドギャップの広い半導体
装置き替えても同様の結果が得られるので、本発明は、
バンドギャップの異なる二つの半導体の異種接合界面準
位の検出にも適用することができる。
Although only the method for detecting the interface state of the MIS structure has been described, the same result can be obtained even if the insulating layer (I layer) 2 is replaced with a semiconductor device with a wide band gap.
It can also be applied to the detection of heterojunction interface states between two semiconductors with different bandgaps.

以上の説明から明らかなように、本発明の方法を用いれ
ば、界面準位からの電子や正孔の熱励起が、抑えられる
程度の低温にすればよく、厳密な温度制御が必要でない
こと、フォトキャパシタンス法を用いているので、界面
準位のエネルギーが、直接単色光のエネルギーに対応で
きること、更に半導体の浅い不純物準位のみが、かろう
じて熱的に活性となる程度の極低温にすれば、半導体の
伝導形によらずバンドギャップEgのほぼ全域にわたる
界面準位を検出できるなどの利点がある。
As is clear from the above explanation, if the method of the present invention is used, the temperature only needs to be kept low enough to suppress the thermal excitation of electrons and holes from the interface states, and strict temperature control is not necessary. Since the photocapacitance method is used, the energy of the interface state can directly correspond to the energy of monochromatic light, and furthermore, if the temperature is so low that only the shallow impurity level of the semiconductor is barely thermally active, This method has advantages such as being able to detect interface levels over almost the entire band gap Eg regardless of the conductivity type of the semiconductor.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、n形半導体3を用いたMISダイオードにお
いてフラットバンド電圧VFRより、その絶対値が少し
だけ大きな電圧V、を印加し、かつエネルギーiνの単
色光を照射している状態でのエネルギーバンドの概略図
、第2図はMISダイオードの容量Cと印加電圧Vct
との関係の特性曲線(C−V5特性曲線)で飴状8(曲
線α)、エネルギーの異なる二つの単色光1qv+(曲
線β)とhν2(曲線γ)をそれぞれ照射した状B C
Vlvt> k1/+)  でのC−VrJ4¥性曲線
の概略図、第3図は種々のエネルギーのC1i色光を1
1((射した状態で、フラットバンド容ii) Cb近
傍の容μシ神′を保持するような電圧VG、を印加した
とき、暗状態での印加電圧VGoからの変化昂−Δ■6
と照射単色光エネルキーhノとの関係をグラフ化したも
ので、第4図は第3図の特性曲線をエネルギーバンド込
ν)で微分し、式(1)を利用して算出した界面準位密
度N5s(E)を示したものである。 l中 金属、2→SiO絶縁体層、3mH形半導体(S
i)、4m界面準位、5#単色光照射により正に帯電し
た界面準位、6呻伝導帯の電子、7=6浅いドナ、  
EC,EV#それぞれ半導体の伝導帯端、価電子帯端、
  E)m、EHs−それぞれ全屈、半導体のフェルミ
準位、  cozm絶縁体層の容量、  d−半導体の
空乏層幅
Figure 1 shows the energy of a MIS diode using an n-type semiconductor 3 when a voltage V whose absolute value is slightly larger than the flat band voltage VFR is applied and monochromatic light of energy iν is irradiated. A schematic diagram of the band, Figure 2 shows the capacitance C of the MIS diode and the applied voltage Vct.
The characteristic curve (C-V5 characteristic curve) of the relationship between candy-like 8 (curve α) and the state in which two monochromatic lights with different energies 1qv+ (curve β) and hν2 (curve γ) are irradiated, respectively, are B C
A schematic diagram of the C-VrJ4 characteristic curve at Vlvt > k1/+).
1 ((in the illuminated state, flat band capacitance ii) When a voltage VG that maintains the capacitance near Cb is applied, the change from the applied voltage VGo in the dark state -Δ■6
Figure 4 is a graph showing the relationship between the energy key h of the irradiated monochromatic light and the interface level calculated using equation (1) by differentiating the characteristic curve in Figure 3 with respect to the energy band ν). It shows the density N5s(E). Metal, 2→SiO insulator layer, 3mH type semiconductor (S
i), 4m interface state, 5# positively charged interface state due to monochromatic light irradiation, 6 electrons in the conduction band, 7 = 6 shallow donors,
EC, EV# conduction band edge, valence band edge of semiconductor, respectively
E) m, EHs - total bending, Fermi level of semiconductor, capacitance of cozm insulator layer, d - width of depletion layer of semiconductor

Claims (1)

【特許請求の範囲】[Claims] フォトキャパシタンス法を用いた半導体準位の検出方法
であって、種々のエネルギーの単色光をMIS構造のダ
イオード(以下、MISダイオードという)に照射し、
該MISダイオードの界面準位の荷電状態を変化させる
ようにしたとき、該MISダイオードのフラットバンド
容量C_fbを保持するか、または、半導体側の空乏層
容量が無視できる程度のフラットバンド近傍の容量C_
fb′を保持するようにして、MISダイオードの印加
電圧の変化量ΔV_Gを計測し、該印加電圧の変化量Δ
V_Gとこれに対応する照射単色光エネルギーhvとの
関係から界面準位を算出するようにしたことを特徴とす
るMIS構造界面準位の検出方法。
This is a semiconductor level detection method using the photocapacitance method, in which monochromatic light of various energies is irradiated onto a diode with an MIS structure (hereinafter referred to as an MIS diode).
When the charge state of the interface state of the MIS diode is changed, the flat band capacitance C_fb of the MIS diode is maintained, or the capacitance C_ near the flat band where the depletion layer capacitance on the semiconductor side can be ignored.
fb' is maintained, the amount of change ΔV_G in the applied voltage of the MIS diode is measured, and the amount of change ΔV_G in the applied voltage is calculated.
A method for detecting an interface state in an MIS structure, characterized in that the interface state is calculated from the relationship between V_G and the corresponding irradiated monochromatic light energy hv.
JP27401485A 1985-12-04 1985-12-04 Detecting method for mis structure boundary level using optical capacitance method Pending JPS62132337A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27401485A JPS62132337A (en) 1985-12-04 1985-12-04 Detecting method for mis structure boundary level using optical capacitance method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27401485A JPS62132337A (en) 1985-12-04 1985-12-04 Detecting method for mis structure boundary level using optical capacitance method

Publications (1)

Publication Number Publication Date
JPS62132337A true JPS62132337A (en) 1987-06-15

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JP27401485A Pending JPS62132337A (en) 1985-12-04 1985-12-04 Detecting method for mis structure boundary level using optical capacitance method

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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020031171A (en) * 2018-08-24 2020-02-27 国立研究開発法人物質・材料研究機構 Method for measuring interface characteristic between semiconductor layer and insulator layer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020031171A (en) * 2018-08-24 2020-02-27 国立研究開発法人物質・材料研究機構 Method for measuring interface characteristic between semiconductor layer and insulator layer

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