JPS621318A - Signal changeover device - Google Patents

Signal changeover device

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Publication number
JPS621318A
JPS621318A JP13895285A JP13895285A JPS621318A JP S621318 A JPS621318 A JP S621318A JP 13895285 A JP13895285 A JP 13895285A JP 13895285 A JP13895285 A JP 13895285A JP S621318 A JPS621318 A JP S621318A
Authority
JP
Japan
Prior art keywords
signal
circuit
input
output
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13895285A
Other languages
Japanese (ja)
Other versions
JP2557825B2 (en
Inventor
Yutaka Saito
裕 斉藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP60138952A priority Critical patent/JP2557825B2/en
Publication of JPS621318A publication Critical patent/JPS621318A/en
Application granted granted Critical
Publication of JP2557825B2 publication Critical patent/JP2557825B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To obtain an output with arranged frequency characteristic in selective changeover by forming a profile emphasis correction from the 1st signal with an inferior frequency characteristic and superimposing the correction signal onto the 1st signal so as to generate the 3rd signal. CONSTITUTION:A signal whose characteristic is deteriorated is inputted to the 1st input terminal 12. A differentiated waveform (c) is an output of the 2nd order differentiation circuit 14 and introduced to the 3rd input terminal 15. A signal entering the terminal 15 is amplified by an amplifier 20 to form a somewhat sharp 2nd order differentiation pulse (d), which is inputted to an inverting circuit 21. The circuit 21 inverts the polarity of the signal from the amplifier 20 to form a signal (e). The signal (e) is synthesized with the signal from the 1st input circuit 16 at the synthesis circuit 17. A signal (f) having a waveform applied with pre-shoot and overshoot is outputted respectively to the leading and trailing parts of the signal I from the circuit 17. Since the signal (f) has a major component being the output signal of the circuit 16, the level is almost coincident with the level of the signal from the 2nd input circuit 18.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は、複数の入力信号のいずれか一つを切換選択出
力する信号切換@ RK関し、各入力信号のζつ周波数
特性が異っていても出力としては周波数特性的にもレベ
ル的にも略同等の信号が得られるようKしたものである
[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to signal switching@RK that switches and outputs one of a plurality of input signals. Both outputs are tuned so that substantially the same signals are obtained in terms of frequency characteristics and levels.

〔発明の技術的背景〕[Technical background of the invention]

第3図12この1信号切換装置のブロック図を示し、2
つの信号を選択する構成を模式化して表わしたものでお
る。同図において、符号1,2は同装置を集積化した場
合の外付はピンに相当する第1、第2入力端子、3は選
択された信号が導出される出力端子であり、これら各端
子は、点線枠にて示す切換回路部4の各第1.第2入力
端4a 、 4bおよび出力端4Cに接続され、第1入
力端4aから出力端4Cへの信号路および、第2入力端
4bから出力端4cへの信号路#−i、それぞれコント
ロール端5からの切換信号によりいずれか一方が信号を
通過するように切換設定される。
Fig. 3 shows a block diagram of this 1 signal switching device, and 2
This is a schematic representation of the configuration for selecting two signals. In the figure, numerals 1 and 2 are external first and second input terminals corresponding to pins when the device is integrated, and numeral 3 is an output terminal from which a selected signal is derived. are each of the first . A control terminal connected to the second input terminals 4a, 4b and the output terminal 4C, and a signal path #-i from the first input terminal 4a to the output terminal 4C and a signal path #-i from the second input terminal 4b to the output terminal 4c, respectively. A switching signal from 5 is used to set the switching so that one of the signals passes through the signal.

〔背景技術の問題点〕[Problems with background technology]

第3図のような装置において、第1.第2入力端子1.
2に導入される信号は、必らずしも周波数特性の一致し
た信号であるとは限らず、@4図(I)、(n)に示す
ように高域の劣化した信号(I)と。
In the apparatus as shown in FIG. Second input terminal 1.
The signal introduced into 2 is not necessarily a signal with matching frequency characteristics, but may be a signal (I) with degraded high frequency as shown in @4 Figures (I) and (n). .

劣化していない信号(n)が導入される場合がある。An undegraded signal (n) may be introduced.

情報処理装置からのR,G、B信号が考えられる。R, G, and B signals from an information processing device can be considered.

上記のように各入力端子1,2に導入される信号の周波
数特性が異っていると、当然周波数特性の異る信号が出
力されることになり、上記テレビジョン受像機に使用し
た場合には、放送信号を表示するときは画質が劣り、R
,G、B信号を表示するときは画質が良好となる。この
ため、入力を選択切換えするたびに画質調整が必要でお
った。
If the frequency characteristics of the signals introduced into each input terminal 1 and 2 are different as described above, signals with different frequency characteristics will naturally be output, and when used in the above television receiver, The image quality is poor when displaying broadcast signals, and R
, G, and B signals, the image quality is good. Therefore, it was necessary to adjust the image quality each time the input was selected.

そこで、このような画質調整の煩雑さをなくすために、
第5図わるいii第6図に示すような周波数特性の補正
手段を設けることが提唱された。
Therefore, in order to eliminate the complexity of image quality adjustment,
It has been proposed to provide a frequency characteristic correction means as shown in FIG.

第5図は、集積回路(IC)の外部に上記周波数特性(
以下f特という)の補正手段6を設けたもの(X) であり、第1人刃傷号(1)を第2人刃傷号、のf特に
合わせるために、端子1側に補正手段6が設けられてい
る。第6図は、上記補正手段6をICC内部投設たもの
である。ところが、第5図のような手法では、ICK入
力される前の段階で、プリシュートおよびオーバーシュ
ートが付加されキ寺るため、第2人刃傷号との レベル合せが難しくなる。iた、第6図の場合には、エ
ミッタピーキングによる補正手段が採用されるため、十
分なf特の改善を望めず、付随して発振を起こしたり、
クロストーク性能が劣化するといった問題が生じること
があった。
Figure 5 shows the above frequency characteristics (
(X), which is provided with a correction means 6 (hereinafter referred to as "f special"), and a correction means 6 is provided on the terminal 1 side in order to specifically match the first human knife wound number (1) with the second human knife wound number (f). It is being FIG. 6 shows the correction means 6 installed inside the ICC. However, in the method shown in FIG. 5, preshoot and overshoot are added before the ICK is input, making it difficult to match the level with the second knife mark. In addition, in the case of Fig. 6, since a correction means using emitter peaking is adopted, sufficient improvement of f characteristics cannot be expected, and oscillation may occur as a result.
Problems such as deterioration of crosstalk performance sometimes occurred.

〔発明の目的〕[Purpose of the invention]

本発明は上述した点に鑑みてなされたもので、f特の異
る入力信号を選択切換する場合でも、f特の揃った出力
を得ることができる手段を提供することを目的とする。
The present invention has been made in view of the above-mentioned points, and it is an object of the present invention to provide means that can obtain outputs with uniform f-characteristics even when input signals with different f-characteristics are selected and switched.

〔発明の概要〕[Summary of the invention]

上記目的を達成するため本発明は、f特の劣る第1の信
号から輪郭強調用の補正信号を得、この信号と第1の信
号とを重畳して第3の信号を生成する手段とともに、第
1および第2の信号をレベル的に略等しく設定する第1
および第2入力回路と、前記第3の信号と第2入力回路
からの信号のいずれか一方を選択切換する切換回路とか
ら構成したものである。
In order to achieve the above object, the present invention provides a means for obtaining a correction signal for edge enhancement from a first signal with poor f-characteristics, and generating a third signal by superimposing this signal and the first signal. A first signal that sets the first and second signals to be substantially equal in level.
and a second input circuit, and a switching circuit that selectively switches between the third signal and the signal from the second input circuit.

〔発明の実施例〕[Embodiments of the invention]

以下、本発明を図示の実方例について説明する。 Hereinafter, the present invention will be explained with reference to the illustrated example.

第1図は本発明にかかる信号切換装置の一実施例を示す
ブロック図であり、第2図は本発明によるf特補正手段
の一例を説明する説明図である。
FIG. 1 is a block diagram showing an embodiment of a signal switching device according to the present invention, and FIG. 2 is an explanatory diagram illustrating an example of f-characteristic correction means according to the present invention.

第1図において、ブロック11はIC本体を示し、この
IC本体11は、第1および第2入力端子12.13に
それぞれ第1の信号Iと第2の信号■が導入されるとと
もに、第1の信号■を2次微分して第3の信号を生成す
る2次微分回路14からの信号が第3入力端子15に導
入される。前記第1入力端子12に導びかれた信号は、
第1入力回路16を介して合成回路17の一方入力端に
導入され、瀉2入力端子13に導びかれた信号は。
In FIG. 1, a block 11 indicates an IC main body, and a first signal I and a second signal ■ are introduced into first and second input terminals 12 and 13, respectively, and a first signal A signal from a second-order differentiating circuit 14 that performs second-order differentiation on the signal 2 to generate a third signal is introduced to the third input terminal 15. The signal led to the first input terminal 12 is
The signal is introduced into one input terminal of the synthesis circuit 17 via the first input circuit 16 and led to the second input terminal 13.

第2入力回路18を介して切換回路19の第1入力端1
9aに導入され、これら第1.第2入力回路18ば、各
入力信号を略同−のレベルで次段回路にそれぞれ導出す
るように増幅度の調整がなされている。−万、第3入力
端子15に導かれた信号は、増幅器20を介して反転回
路21に入力され。
The first input 1 of the switching circuit 19 via the second input circuit 18
9a, these first. The amplification degree of the second input circuit 18 is adjusted so that each input signal is output to the next stage circuit at approximately the same level. - 10,000, the signal led to the third input terminal 15 is input to the inverting circuit 21 via the amplifier 20.

同反転回路21はその出力を前記合g、回路17の他方
の入力端に導入している。そして、この合成回路17の
出力は、切換回路19の第2入力端19bに導入されて
いる。切換回′pr19は1図示しない制御信号供給手
段により、第1入力端19aと出力端19C問および第
2入力端19bと出力m1Qc間が切換導通制御され、
これにより出力端19cに現われる信号をIC本体11
の出力端子22に導出している。
The inverting circuit 21 inputs its output to the other input terminal of the circuit 17. The output of this combining circuit 17 is introduced into the second input terminal 19b of the switching circuit 19. In the switching circuit 'pr19, switching conduction is controlled between the first input terminal 19a and the output terminal 19C and between the second input terminal 19b and the output m1Qc by a control signal supply means (not shown).
As a result, the signal appearing at the output terminal 19c is transmitted to the IC main body 11.
It is led out to the output terminal 22 of.

本発明は以上のように構成され、次に上記構成に基づく
動作全第4図および第2図を参照して説明する。
The present invention is configured as described above, and next, the entire operation based on the above configuration will be explained with reference to FIGS. 4 and 2.

今、第1入力端子1217C第4図(I) K示すよう
な特性の劣化した信号が入力され、第2入力端子13に
第4図(n) K示すような信号が入力されるものとす
ると、第1.第2入力回路16.18F′i、これらの
信号を略同−レベルでそれぞれ出力する。
Now, suppose that a signal with degraded characteristics as shown in FIG. 4(I) K is input to the first input terminal 1217C, and a signal as shown in FIG. 4(n) K is input to the second input terminal 13. , 1st. The second input circuits 16 and 18F'i output these signals at approximately the same level.

一方、第1の信号Iけ、2次微分回路14により第2図
に示すように波形変換されてIC本体11の第3入力端
子15に入る。すなわち、第2図は2次微分回路14で
行なわれる波形&換動作を示し、(a)は信号Iに相当
し、この信号を1次微分すると(b)に示すように信号
Iの立上りおよび立下りに対応して正極性および負極性
の微小パルスを示す1次微分波形が得られ、これをさら
に微分すると(c)に示すような2次微分波形が得られ
る。この微分波形(c)が、2次微分回路14の出力と
なり、第3入力端子15に導入される。この端子15に
入った信号は、増幅器20で増幅されて(d)に示すよ
うに若干鋭い2次微分パルスになって反転回路21に入
力され1反転回路21は、増@器2oからの信号の極性
を反転して第2図(61の信号のようにし、この信号(
e)が合成回路17で第1人力回路16からの信号と合
成されることで1合成回路17からは第2図(f)に示
すように、信号Iの立上り部および立下り部のそれぞれ
にプリシニートシよびオーバーシェードがかかった  
 “ 太鼓形の信号が出力されるのである。この信号は、主成
分が第1入力回路16の出力信号であるため。
On the other hand, the first signal I is converted into a waveform by the second-order differentiator circuit 14 as shown in FIG. That is, FIG. 2 shows the waveform & conversion operation performed in the second-order differentiating circuit 14, where (a) corresponds to the signal I, and when this signal is first-order differentiated, the rise and the rise of the signal I are shown in (b). A first-order differential waveform showing minute pulses of positive and negative polarity in response to the falling edge is obtained, and when this is further differentiated, a second-order differential waveform as shown in (c) is obtained. This differential waveform (c) becomes the output of the second-order differentiator circuit 14 and is introduced into the third input terminal 15. The signal input to this terminal 15 is amplified by the amplifier 20, becomes a slightly sharp second-order differential pulse as shown in (d), and is input to the inverting circuit 21. The polarity of is reversed to make it look like the signal in Figure 2 (61), and this signal (
e) is combined with the signal from the first human-powered circuit 16 in the combining circuit 17, and the first combining circuit 17 outputs signals to each of the rising and falling parts of the signal I, as shown in FIG. 2(f). Priscini and overshaded
“A drum-shaped signal is output. This signal has a main component that is the output signal of the first input circuit 16.

そのレベルは、第2入力回路18がらの信号のレベルと
殆んど一致していることが推東される。しかも、上記の
ように特性補正されているため、f特上第2の信号と同
等であり、次段の切換回路19からは、第1.第2のい
ずれの信号を選択した場合にも略f時の揃った出力信号
が得られるものである。
It is assumed that the level almost matches the level of the signal from the second input circuit 18. Moreover, since the characteristics have been corrected as described above, the f-special signal is equivalent to the second signal, and from the next stage switching circuit 19, the first signal. Regardless of which of the second signals is selected, uniform output signals at approximately f time can be obtained.

こうして本発明は、選択切換される信号同士の1%の差
をなくすことができ、例j=F′i外部入カ機能を有し
九テレビジ璽ン受偉機において、信号切換時に画質調整
をする必要がなくなるという利点がある。
In this way, the present invention can eliminate a 1% difference between signals to be selectively switched, and for example, in a nine television receiver having an external input function j=F'i, the picture quality can be adjusted at the time of signal switching. The advantage is that there is no need to do so.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、f特賞化信号を、
ICに入力する前に特性補正したり、IC内部でトラン
ジスタによるエミッタピーキングの手法で特性補正する
手段を採用しないので、他の入力とのレベル合せが容易
であるとともに、不必要な発振やクコストークを起こす
ことなく、f特の揃った出力が選択切換出力されるとい
う効果がある。
As explained above, according to the present invention, the f special prize signal is
Since there is no need to correct the characteristics before inputting to the IC or correct the characteristics using the emitter peaking method using transistors inside the IC, level matching with other inputs is easy, and unnecessary oscillation and cocoon talk are eliminated. There is an effect that outputs with uniform f characteristics can be selectively outputted without causing any problems.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明にかかる信号切換装置の一実施例を示す
ブロック図、第2図は本発明による特性補正手段の一例
を説明する説明図、第3図は本発明に関する信号切換装
置の基本構成を示すブロック図、第4図は選択される信
号の例を示す波形図、第5図は従来の信号切換装置の一
例を示すブロック図、第6図は別の従来装置を示すブロ
ック図である。 11・−・IC本体、  12・・・第1入力端子、1
3・−・第2入力端子、  14・−・2次微分回路、
15−第3入力端子、 16.18−・入力回路、17
−合成回路、   19・・・切換回路、20・・・増
幅器、    21−反転回路。 代理人 弁理士  則 近 憲 佑 (ほか1名〕第1
図 第4図   第3図 第5図
FIG. 1 is a block diagram showing an embodiment of the signal switching device according to the present invention, FIG. 2 is an explanatory diagram explaining an example of the characteristic correction means according to the present invention, and FIG. 3 is the basics of the signal switching device according to the present invention. FIG. 4 is a block diagram showing the configuration, FIG. 4 is a waveform diagram showing an example of a signal to be selected, FIG. 5 is a block diagram showing an example of a conventional signal switching device, and FIG. 6 is a block diagram showing another conventional device. be. 11... IC body, 12... 1st input terminal, 1
3.--Second input terminal, 14.--Second order differential circuit,
15-Third input terminal, 16.18--Input circuit, 17
- synthesis circuit, 19 - switching circuit, 20 - amplifier, 21 - inverting circuit. Agent: Patent Attorney Kensuke Chika (and 1 other person) 1st
Figure 4 Figure 3 Figure 5

Claims (1)

【特許請求の範囲】 第1の信号が入力される第1の入力端子および第2の信
号が入力される第2の入力端子と、上記第1の入力端子
および第2の入力端子に供給された信号をそれぞれほぼ
等レベルに調整して出力せしめる第1、第2の入力回路
と、 前記第1の入力端子に供給される第1の信号から輪郭強
調用の補正信号を得るための補正信号発生手段と、 前記第1の入力回路からの出力信号に前記補正信号を重
畳し、輪郭の強調された第3の信号を出力せしめる信号
合成手段と、 前記第2の入力回路からの出力信号と、上記第3の信号
とがそれぞれ供給され、この供給された信号のいずれか
一方を選択的に取出して出力するようにした切換手段と
を具備し、 前記第1、第2の入力回路、信号合成手段および切換手
段とが同一の半導体集積回路上に構成された信号切換装
置。
[Claims] A first input terminal to which the first signal is input, a second input terminal to which the second signal is input, and a signal supplied to the first input terminal and the second input terminal. first and second input circuits that adjust the respective signals to substantially the same level and output them; and a correction signal for obtaining a correction signal for contour enhancement from the first signal supplied to the first input terminal. generating means; signal synthesizing means for superimposing the correction signal on the output signal from the first input circuit and outputting a third signal with enhanced contours; and an output signal from the second input circuit. , the third signal, and a switching means configured to selectively take out and output one of the supplied signals, the first and second input circuits, the signal A signal switching device in which a combining means and a switching means are constructed on the same semiconductor integrated circuit.
JP60138952A 1985-06-27 1985-06-27 Signal switching device Expired - Lifetime JP2557825B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60138952A JP2557825B2 (en) 1985-06-27 1985-06-27 Signal switching device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60138952A JP2557825B2 (en) 1985-06-27 1985-06-27 Signal switching device

Publications (2)

Publication Number Publication Date
JPS621318A true JPS621318A (en) 1987-01-07
JP2557825B2 JP2557825B2 (en) 1996-11-27

Family

ID=15233993

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60138952A Expired - Lifetime JP2557825B2 (en) 1985-06-27 1985-06-27 Signal switching device

Country Status (1)

Country Link
JP (1) JP2557825B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0181381U (en) * 1987-11-20 1989-05-31

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49127522A (en) * 1973-04-05 1974-12-06
JPS5572315U (en) * 1978-11-08 1980-05-19

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49127522A (en) * 1973-04-05 1974-12-06
JPS5572315U (en) * 1978-11-08 1980-05-19

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0181381U (en) * 1987-11-20 1989-05-31

Also Published As

Publication number Publication date
JP2557825B2 (en) 1996-11-27

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