JPS62131593A - Formation of resin molded electric circuit - Google Patents

Formation of resin molded electric circuit

Info

Publication number
JPS62131593A
JPS62131593A JP27300485A JP27300485A JPS62131593A JP S62131593 A JPS62131593 A JP S62131593A JP 27300485 A JP27300485 A JP 27300485A JP 27300485 A JP27300485 A JP 27300485A JP S62131593 A JPS62131593 A JP S62131593A
Authority
JP
Japan
Prior art keywords
resin molded
circuit
electric circuit
groove
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27300485A
Other languages
Japanese (ja)
Inventor
敏明 山下
清 佐々木
弘之 中村
猛 小島
雅一 後藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokai Rika Co Ltd
Original Assignee
Tokai Rika Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokai Rika Co Ltd filed Critical Tokai Rika Co Ltd
Priority to JP27300485A priority Critical patent/JPS62131593A/en
Publication of JPS62131593A publication Critical patent/JPS62131593A/en
Pending legal-status Critical Current

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  • Manufacturing Of Printed Wiring (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 布猪 μ小迫1m心「■ 本発明は、樹脂成形品あるいは樹脂成形基板に電気回路
を形成する方法に関するしのである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for forming an electric circuit on a resin molded product or a resin molded substrate.

従来の技術 絶縁性を有する樹脂成形品あるいは樹脂成形基板に電気
回路を形成する場合、通常、第4図に示す如く、絶縁体
1の平坦面からなる表面に銅張積層板を貼着し、あるい
は電解メッキにより導電路2を形成している。上記従来
の方法で電流回路を形成して大電流を流す場合、銅張積
層板で導電路2を形成する時には、銅張積層板のダみT
は18μm135μm170μmに限定されているため
、導電路2の「11Wを大きくしなければならず、基板
全体が必然的に大きくなる欠点があった。また、電解メ
ッキの場合、その厚みTを大きくするために加工時間が
長くなり、製造コストが高くなると共に、厚さが大きく
なって大型化する欠点があった。
Conventional Technology When forming an electric circuit on a resin molded product or a resin molded substrate having insulation properties, normally, as shown in FIG. Alternatively, the conductive path 2 is formed by electrolytic plating. When forming a current circuit and passing a large current using the conventional method described above, when forming the conductive path 2 using a copper-clad laminate, the stub T of the copper-clad laminate must be
is limited to 18 μm, 135 μm, and 170 μm, so the “11W” of the conductive path 2 must be increased, which has the disadvantage that the entire board inevitably becomes larger.Also, in the case of electrolytic plating, in order to increase the thickness T, However, there are disadvantages in that the processing time becomes longer, the manufacturing cost becomes higher, and the thickness becomes larger and the size becomes larger.

また、大電流と小電流とを混在して流す場合、上記いず
れの方法でも加工がtUtとなって、時間がかかる等の
欠点があった。
In addition, when a large current and a small current are applied together, each of the above-mentioned methods has disadvantages such as the processing time being tUt and time consuming.

発明の目的 本発明は、上記した欠点に鑑みてなされたものであり、
上記銅張積層板の如く回路中を大きくすることなく、か
つ上記電解メッキの如く導電路の厚みを増加させること
なく、大電流回路の形成を可能とし、また、簡単な方法
で、短時間で形成でき、しかも、大電流と小電流とが混
在する場合にも容易に形成することが出来るようにする
ものである。
Purpose of the Invention The present invention has been made in view of the above-mentioned drawbacks.
It is possible to form a large current circuit in a simple manner and in a short period of time without increasing the size of the circuit as in the case of the above-mentioned copper-clad laminate, and without increasing the thickness of the conductive path as in the case of the above-mentioned electrolytic plating. Moreover, it is possible to easily form it even when a large current and a small current are mixed.

発明の構成 本発明は上記した目的を達成するためになされたもので
、樹脂成形品らしくは樹脂成形基板の成形時に、その表
面に溝を設け、その内側に、無電解メッキ若くは電解メ
ッキ或いはその組み合わせにより導電路を形成すること
を特徴とするものである。さらに本発明は、大電流を流
す場合には、上記d4の中にリブを設けて回路断面積を
大きくし、また、大電流および小電流を混在して流す場
合には、各電流値に比例して上記溝の回路断面積形状を
変化させることを特徴とするものである。
Structure of the Invention The present invention has been made to achieve the above-mentioned object.When molding a resin-molded substrate, a groove is provided on the surface of the resin-molded substrate, and the inside of the groove is coated with electroless plating, electrolytic plating, or A feature is that a conductive path is formed by the combination thereof. Furthermore, the present invention provides ribs in the above d4 to increase the circuit cross-sectional area when a large current is flowing, and when a mixture of large current and small current is flowing, it is proportional to each current value. The present invention is characterized in that the cross-sectional shape of the circuit of the groove is changed by changing the cross-sectional shape of the groove.

及星鯉 以下、本発明を第1図から第3図を参照して説明すると
、射出成形あるいは圧縮成形により、絶縁体となる樹脂
成形品もしくは樹脂成形基板3を成形する時に、その表
面より所要中Wの凹状の溝4を一体に成形する。該樹脂
成形後、上記溝4の内側(左右側面4a、4bおよび底
面4c)に銅、ニッケル等の導電性を何する金属を、無
電解メッキあるいは電解メッキらしくはその組み合わせ
により付着して、1薄4の表面に一様な厚みの導体路5
を形成している。
Hereinafter, the present invention will be explained with reference to FIGS. 1 to 3. When molding a resin molded product or resin molded substrate 3 to serve as an insulator by injection molding or compression molding, the required amount is removed from its surface. A medium W concave groove 4 is integrally molded. After the resin molding, a conductive metal such as copper or nickel is adhered to the inside of the groove 4 (left and right side surfaces 4a, 4b and bottom surface 4c) by electroless plating or a combination of electrolytic plating. Conductor track 5 with uniform thickness on the surface of thin film 4
is formed.

上記方法により導体路5を形成した場合、前記第4図に
示す導体路2と同じ巾Wで、溝4の側面4a、4bに6
導体路5が形成されるため、より大きな回路断面積が確
保でき、大きな電流を流すことが可能になる。
When the conductor path 5 is formed by the above method, it has the same width W as the conductor path 2 shown in FIG.
Since the conductor path 5 is formed, a larger circuit cross-sectional area can be secured and a larger current can flow.

また、大電流を流す場合には、第2図に示す如(、樹脂
成形時に、上記凹状の溝4゛の中央に底面4’cよりリ
ブ6を突設させて成形し、該溝4゛の底面4°Cおよび
左右側面4°a、 4°bおよびリブ6の左右側面6a
、6bおよび上面6Cの表面に、」二足と同様に、メッ
キにより導体路5゛を形成している。
In addition, when a large current is to flow, as shown in FIG. bottom surface 4°C, left and right sides 4°a, 4°b, and left and right sides 6a of rib 6
, 6b and the top surface 6C, conductor paths 5' are formed by plating, similar to the two legs.

上記の如く、溝4°内にリブ6を設け、FfI#4の内
側およびリブ6の表面に導体路5゛を形成すると、上記
第1図および第4図と同一の回路中Wで、より大きな回
路断面積を確保でき、より大きな電流を流すことが出来
る。尚、上記リブ6は電流量に対応して複数本設けられ
るしとは言うまでもない。
As described above, if the rib 6 is provided within the groove 4° and the conductor path 5' is formed inside the FfI #4 and on the surface of the rib 6, the W in the same circuit as in FIGS. A large circuit cross-sectional area can be secured, allowing a larger current to flow. It goes without saying that a plurality of the ribs 6 are provided depending on the amount of current.

第3図は、大電流と小電流とを混在して流す場合を示し
、溝4゛の巾Wl、4”°゛の巾W、を各電流値に比例
した回路断面積となる変化させて、成形し、これら17
44”、4°°°の内側にメッキにより導体路5゛°を
形成している。この場合、成形する複数の溝の巾を適宜
に設定するだけで、大電流回路と小電流回路とが混在し
た回路基板を簡単に形成することが出来る。
Figure 3 shows the case where a large current and a small current are passed together, and the width Wl of the groove 4゛ and the width W of 4''° are changed so that the circuit cross-sectional area is proportional to each current value. , mold these 17
A conductor path 5° is formed by plating on the inside of the 44", 4°°. In this case, a large current circuit and a small current circuit can be formed by simply setting the width of the plurality of molded grooves appropriately. A mixed circuit board can be easily formed.

隻数 電気回路形成法によれば、絶縁板を樹脂成形する際に、
凹状の溝を一体に成形し、該溝の底面、左右側面からな
る内側表面全体にメッキにより導体路を形成しているた
め、従来と同−回路中で大きな電流を流すことが出来る
。よって、大電流を流す場合に回路基板全体の大きさを
小さくすることができる。かつ、該大電流回路を無電解
メッキ、電解メッキあるいはその組み合わせにより形成
するに際して、導体の厚みで対応する必要がないため、
加工時間を短縮でき、製造コストを低下させることが出
来る。さらに、大電流回路と小電流回路とが混在する回
路基板では、各電流値に合わせて断面中を変えた溝を成
形するだけでよく、かつ、非常に大きな電流回路の場合
は溝内にリブを設けるだけで良く、電流値に対応した回
路を極めて簡単に形成することができる利点を存するも
のである。
According to the number-of-ships electric circuit formation method, when resin molding an insulating plate,
Since the concave groove is integrally molded and a conductor path is formed by plating on the entire inner surface of the groove, including the bottom and left and right sides, a large current can flow in the same circuit as in the conventional case. Therefore, the size of the entire circuit board can be reduced when a large current flows. In addition, when forming the large current circuit by electroless plating, electrolytic plating, or a combination thereof, there is no need to adjust the thickness of the conductor.
Processing time can be shortened and manufacturing costs can be reduced. Furthermore, for circuit boards with a mixture of large current circuits and small current circuits, it is only necessary to form grooves with different cross-sections according to each current value, and in the case of very large current circuits, there is a rib inside the groove. This has the advantage that a circuit corresponding to the current value can be formed extremely easily.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図、第3図は本発明方法で形成した回路基
板の断面図、第4図は従来方法で形成した回路基板の断
面図である。
1, 2, and 3 are cross-sectional views of a circuit board formed by the method of the present invention, and FIG. 4 is a cross-sectional view of a circuit board formed by a conventional method.

Claims (3)

【特許請求の範囲】[Claims] (1)樹脂成形品もしくは樹脂成形基板の成形時に、そ
の表面に溝を設け、その内側に、無電解メッキ若くは電
解メッキ或いはその組み合わせにより導電路を形成する
ことを特徴とする樹脂成形品の電気回路形成法。
(1) When molding a resin molded product or resin molded substrate, grooves are formed on the surface of the molded product, and a conductive path is formed inside the groove by electroless plating, electrolytic plating, or a combination thereof. Electric circuit formation method.
(2)特許請求の範囲(1)記載の電気回路形成法にお
いて、大電流を流すために、上記溝の中にリブを設けて
回路断面積を大きくすることを特徴とする樹脂成形品の
電気回路形成法。
(2) In the method for forming an electric circuit according to claim (1), an electric circuit of a resin molded product is characterized in that a rib is provided in the groove to increase the cross-sectional area of the circuit in order to flow a large current. Circuit formation method.
(3)特許請求の範囲(1)記載の電気回路形成法にお
いて、大電流および小電流を混在して流すために、各電
流値に比例して上記溝の回路断面積形状を変化させるこ
とを特徴とする樹脂成形品の電気回路形成法。
(3) In the electric circuit forming method described in claim (1), in order to flow a mixture of large current and small current, the circuit cross-sectional shape of the groove may be changed in proportion to each current value. Characteristic electrical circuit formation method for resin molded products.
JP27300485A 1985-12-03 1985-12-03 Formation of resin molded electric circuit Pending JPS62131593A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27300485A JPS62131593A (en) 1985-12-03 1985-12-03 Formation of resin molded electric circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27300485A JPS62131593A (en) 1985-12-03 1985-12-03 Formation of resin molded electric circuit

Publications (1)

Publication Number Publication Date
JPS62131593A true JPS62131593A (en) 1987-06-13

Family

ID=17521807

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27300485A Pending JPS62131593A (en) 1985-12-03 1985-12-03 Formation of resin molded electric circuit

Country Status (1)

Country Link
JP (1) JPS62131593A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997050280A1 (en) * 1996-06-27 1997-12-31 Asahi Kasei Kogyo Kabushiki Kaisha Thick-film conductor circuit and production method therefor
JPH1065313A (en) * 1996-08-13 1998-03-06 Shinwa:Kk Printed wiring board
JP2017162895A (en) * 2016-03-08 2017-09-14 株式会社ジェイデバイス Wiring structure, printed board, semiconductor device, and method of manufacturing wiring structure

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997050280A1 (en) * 1996-06-27 1997-12-31 Asahi Kasei Kogyo Kabushiki Kaisha Thick-film conductor circuit and production method therefor
JPH1065313A (en) * 1996-08-13 1998-03-06 Shinwa:Kk Printed wiring board
JP2017162895A (en) * 2016-03-08 2017-09-14 株式会社ジェイデバイス Wiring structure, printed board, semiconductor device, and method of manufacturing wiring structure
CN107172828A (en) * 2016-03-08 2017-09-15 株式会社吉帝伟士 Wire structures, printed base plate, the manufacture method of semiconductor device and wire structures

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