JPS62131354A - Method for controlling information write on ic card - Google Patents

Abstract

PURPOSE:To reduce the processing burden of an external device by dividing the storage area of a rewritable nonvolatile memory into plural blocks and controlling them. CONSTITUTION:An IC card 1 is provided with a microprocessor 11 for data processing and a ROM (EPROM) 12 for data storage which can be erased by ultraviolet rays. The storage area of the EPROM 12 for data storage is divided into plural blocks and is controlled. In the processing of write error, logical '0' is written in all bits of the block where this error occurs, and desired data is written in the following block. In case of the read processing, the microprocessor 11 in the IC card compares all byte data values in the block; and if any character of (00)16 is found, this data block is judged to be ineffective to read out the following block for the purpose of obtaining desired data.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention is directed to an IC card having a built-in microprocessor (1) that executes information processing, and a rewritable non-volatile black memory that stores information. The present invention relates to an information writing control method.

<Prior art> Conventionally, when an error occurs when writing information to the memory, the microprocessor in the IC card
By notifying an external device (such as a reader/writer) of the occurrence of an error, the external device avoids that area, determines an appropriate substitute area, and writes desired information there.

<Problems to be Solved by the Invention> As a result, this method has the drawback of increasing the processing load on the external device. The entire purpose of the present invention is to solve the above problems.

<Means to solve the problem> Manage the memory storage area by dividing it into multiple blocks,
When an error occurs while writing information to the memory, a specific code is written to the entire storage area of the block where the error occurred, and then information writing is executed again to the next block.

<Example> Hereinafter, the present invention will be described in detail based on Examples.

FIG. 3 is a professional computer diagram showing the state when the IC card 1 and the reader/writer 2 are combined. IC car 1-”
1 (f'i) has a microprocessor 11 and an erasable ROM (EPROM) 12.

Further, 13 and 21 are terminal portions of the IC card 1 and the reader/writer 2, respectively. To explain further, CI (110) is an input/output terminal for serially transferring data, C2 (CLK) is an input terminal of an operating clock, and C3 is an input terminal for serially transferring data.
(R5T) is reset No. 3 input terminal, C4 (Vcc) is power input terminal, C3 (GND) is ground terminal, C6
(Vpp) is a power input terminal for writing to the EPROM. In other words, the DBId data path, the ABu address path, and the CB are the control paths.

44th is a storage area configuration diagram of the EPROM 12,
The storage area consists of multiple blocks 121, 122,...
・, 12, and 12k. Each block has the same number of bytes.

Figure @1 shows the control ROM (
A writing processing program stored in (not shown)? FIG. Further, FIG. 2 is a flowchart showing a read processing program stored in the control ROM in the micro 10 setzall. In both figures, A is the addressing counter and B is the A
B' is the data written to the address specified by A, C is the data written to the address specified by A, and C is the data written to the address specified by A.
byte number counter, C' is the desired number of data bytes, N
indicates a block number counter, and addr indicates the start address of block N, respectively.

On the Kinomi style side, both write processing and read processing are performed in units of Glocks.

First, write processing will be explained.

When information writing is instructed, the start address of block N, that is, the start address addr of the block into which information is to be written next, is set in address designation counter A. Also, a desired number of data bytes C' (number of bytes per block, a unique value for each card) is input to a data byte number counter C. Next, the first data write is performed. Subsequently, reading of the written data is executed, and it is determined whether B=B' or not.
That is, it is checked whether data writing has been performed correctly. If writing was performed correctly, that is, if no error occurred, the addressing counter A counts up and the data byte number counter C counts down, and C~
If it is 0, the next data is written, and similar processing is performed thereafter. Then, if C=0 is detected, the write process ends.

During this write process, if an error occurs, that is, if it is detected that the written data is different from the data that should be written by Kiri, the first address addr of the bronc where the error occurred is set to the address designation counter A again. The desired number of data bytes C
' is reset in the data byte number counter C. Then, by executing the subsequent processing, byte data "(00)+s" is written in the entire area of the block. The data handled in the IC card is ASCII data, and the byte data value "(00)+6' is never used as data. After that, for the next block (N+1), the above-mentioned A similar write operation is performed. If there is also 1 byte in block N,
If (00)+a' cannot be written, processing is performed to invalidate the card.

Next, read processing will be explained.

When reading, all read byte data “(00
)+a”, and if they match, the microprocessor stores the next block (N+1
) start address? Set and read the desired data.

As mentioned above, Micro 10 for data processing
UV erasable RO for storing data and data
In an IC card with a built-in M (EPROM), the storage area of the data storage EPROM is divided into multiple blocks and managed, and as a process for writing errors,
Logic "0" is written to all bits of the block in which the error occurred, and desired data is written again to the next block. The data handled in the IC card is ASCII data, and the byte data value "(0
0)+6" is never used as data. During the read process, the microprocessor in the IC card
All data in the block is converted to byte data value “(00
) +a'', and if even one character is found, it is determined that the data block is invalid, and the next block is read to obtain the desired data.

In the above embodiment, an EPROM is used as the data storage memory in the IC card, but an EEPROM may be used instead of the EPROM. In the case of an EP ROM, the value "1" of via 1- can be set to "0°", but the value "60" cannot be set to "1". On the other hand, in the case of EEPROM, both are possible. Therefore, the byte data used to judge a block as invalid is limited to "(00)+s" in the case of an EPROM, but in the case of an EEPROM, it is a data value that is not used in ASCII data. You may also use

<Effects of the Invention> As explained in detail above, the present invention can reduce the processing load on external devices and ensure the reliability of data in block units. be.

[Brief explanation of drawings]

FIG. 1 is a flowchart showing a write processing program in one embodiment of the present invention, FIG. 2 is a flowchart showing a readout processing program in the same embodiment, and FIG. 3 is a flowchart showing a readout processing program in the same embodiment. FIG. 4, a block diagram showing the state when the reader/writer is combined, shows the formation of storage area grooves in the data storage EPROM in the same embodiment. Code explanation 1: IC card, 2: Reader/Writer, 11:
Microprocessor, 12: EFROM. 13.21: Terminal part, 128. ..., Ni block on 12th.

Claims (1)

[Claims] 1. An I/O device that includes a microprocessor that executes information processing and a rewritable nonvolatile memory that stores information.
In the C card, the storage area of the memory mentioned above is managed by dividing it into multiple blocks, and when an error occurs while writing information to the memory, a specific code is written to the entire storage area of the block where the error occurred. 1. A method for controlling information writing in an IC card, which comprises writing information to the next block again.