JPS62131233A - Liquid crystal display - Google Patents
Liquid crystal displayInfo
- Publication number
- JPS62131233A JPS62131233A JP27142885A JP27142885A JPS62131233A JP S62131233 A JPS62131233 A JP S62131233A JP 27142885 A JP27142885 A JP 27142885A JP 27142885 A JP27142885 A JP 27142885A JP S62131233 A JPS62131233 A JP S62131233A
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- luminance
- crystal panel
- brightness
- display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Links
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は液晶表示装置に係り、特に各画素間に存在する
駆動′電圧特性のばらつき(VtAのばらつき)を補償
するための手段に閃する。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a liquid crystal display device, and particularly relates to means for compensating for variations in driving voltage characteristics (variations in VtA) existing between pixels.
薄膜トランジスタ(T )’ T )を用いたアクティ
ブマトリクス方式液晶表示装置で、中間調を正しく表示
するためには、液晶パネル内のトランジスタ駆動′魁圧
特性にばらつきが少ないことが必要である。しかし、実
際には、例えば電子通信学会技術研究報告 VoI 8
2 A 215(7)C882−93rα−81尊膜ト
ランジスタによるアクティブマトリックス0HLODの
試作」の中で述べられているように、T F Tアレイ
には少なくないばらつきがあシ、キャラクタディスプレ
イなどの(0,1)表示の補合には問題の10を鮭減さ
れても、テレビ画像のように甲間副表示が必安な場合に
は、そのばらつきが再生画像の画質劣化の大きな要因の
一つとなる。In order to display halftones correctly in an active matrix type liquid crystal display device using thin film transistors (T)'T), it is necessary that there be little variation in the transistor drive pressure characteristics within the liquid crystal panel. However, in reality, for example, the Institute of Electronics and Communication Engineers Technical Research Report VoI 8
2 A 215 (7) Trial production of active matrix 0HLOD using C882-93rα-81 film transistors, there is considerable variation in TFT arrays, and , 1) Even if the problem is reduced by 10% for display complementation, in cases where sub-display between the two is essential, such as in TV images, the variation is one of the major factors in deteriorating the image quality of the reproduced image. Become.
TET基板の面積、すなわち液晶パネルの画面サイズが
大きくなるに従って、このばらつきも大きくなるため、
良好な画質を大形の液晶パネルに再生することは、よ#
)難しくなる・このi’ F T特性のばらつきを吸収
するための手段については、プロセス段階では褌々検討
されているようであるが、液晶パネルとして完成された
後に残存する各画素間ばらつきを吸収する手段について
は報告されていない。As the area of the TET substrate, that is, the screen size of the liquid crystal panel, increases, this variation also increases.
It is good to reproduce good image quality on a large LCD panel.
)It becomes difficult to absorb the variations in i' F T characteristics.It seems that many studies are being done at the process stage, but it is difficult to absorb the variations between each pixel that remain after the liquid crystal panel is completed. There are no reports on the means to do so.
本発明の目的は、前述の液晶パネルとして完成された後
に残存するトランジスタ特性のばらつきに起因する画素
間の中間調表示輝度のばらつきを吸収するための手段を
提供することにあるO
〔発明の概要〕
本発明は一般の半畳体ウェハ内でのばらつきと同じ<、
TF’T基板内でも隣り合う画素トランジスタ間のばら
つきが比較的小さく、ウェハ全体として大きな傾きのば
らつき特性を示すことに着目し、画面上の所定箇所をX
、Y方向各々に複数個の表示輝度サンプリング領域とし
て設定し、該サンプリング領域の中間調表示輝度データ
を読取り、該領域の表示輝度が所定輝度となるように液
晶印加−圧をt4jlJ@すると共に、該制御量をフレ
ームメモリに岩込み、記憶させ、かつ、前記サンプリン
グされる領域と領域との間では、近傍のサンプリング領
域でのmlj@ trを、例えば直線近似等の手段によ
って袖間演具して必要制御量を求め、T F”1’基板
内のトランジスタ特性ばらつきに起因する中間LL%表
示輝度のばらつきを吸収することを特徴とするものであ
る。An object of the present invention is to provide a means for absorbing variations in halftone display brightness between pixels caused by variations in transistor characteristics that remain after the above-mentioned liquid crystal panel is completed. ] The present invention is the same as the variation within a general semi-convoluted wafer.
We focused on the fact that even within the TF'T substrate, the variation between adjacent pixel transistors is relatively small, and the wafer as a whole exhibits a large slope variation characteristic.
, a plurality of display brightness sampling areas are set in each of the Y directions, the halftone display brightness data of the sampling areas is read, and the liquid crystal applied pressure is t4jlJ@ so that the display brightness of the area becomes a predetermined brightness, The control amount is stored and stored in a frame memory, and between the sampled areas, mlj@tr in the neighboring sampling area is calculated by means of linear approximation, etc. This method is characterized in that the necessary control amount is determined by using the TF''1' substrate, and variations in the intermediate LL% display brightness caused by variations in transistor characteristics within the T F''1' substrate are absorbed.
第1図に本発明の実施例を示し、詳しく説明する。第1
図において1は映像信号入力端子。An embodiment of the present invention is shown in FIG. 1 and will be described in detail. 1st
In the figure, 1 is a video signal input terminal.
2は直流電圧レベルシフト回路、3は谷ブロックの動作
タイミングをとるための映像1g号から水平・垂直同期
信号を検出する回路、4(ま液晶パネル5に画像を表示
するだめの信号処理および走査回路(液晶パネル出勤1
1路)、6は例えはテレビカメラなどの輝度測定装置で
、後に詳しく説明するように液晶パネル上の輝度を測定
する。7はフレームメモリ、8は補間演算回路である。2 is a DC voltage level shift circuit, 3 is a circuit for detecting horizontal and vertical synchronizing signals from video 1g to determine the operation timing of the valley block, and 4 is a signal processing and scanning circuit for displaying images on the liquid crystal panel 5. Circuit (LCD panel attendance 1
1), 6 is a brightness measuring device such as a television camera, which measures the brightness on the liquid crystal panel as will be explained in detail later. 7 is a frame memory, and 8 is an interpolation calculation circuit.
前述のように、液晶パネル5をTFTアクティブマトリ
クスで構成した場合には、TFTのウェハ内において、
一般の半纏体の場合と同様にトランジスタ特性にばらつ
きが生じ、これを完全になくすることは極めて難しい、
このばらつきは一般に隣接した画素間での特性差は小さ
いが、ウェハ全体としてゆるやかな周期の特性傾斜を示
す、このトランジスタ特性のばらつきは、液晶パネルと
しての輝度、コントラスト等の画質劣化要因となるが、
特に画素トランジスタのスレシホルド電圧(0N10F
Fの切替え電圧)がばらつくと、中間調表示時の画面輝
度のばらつきに大きく影響し、画質劣化がはなはだしく
なる。As mentioned above, when the liquid crystal panel 5 is composed of a TFT active matrix, within the TFT wafer,
As in the case of general semi-integrated bodies, variations in transistor characteristics occur, and it is extremely difficult to completely eliminate this.
Generally speaking, the difference in characteristics between adjacent pixels is small, but the characteristics of the wafer as a whole exhibit a gradual periodic slope.This variation in transistor characteristics is a factor in deteriorating image quality such as brightness and contrast as a liquid crystal panel. ,
In particular, the threshold voltage of the pixel transistor (0N10F
Variations in the switching voltage (F switching voltage) greatly affect variations in screen brightness during halftone display, resulting in significant image quality deterioration.
また、TFTのばらつきを小さくしても、例えば、液晶
配向膜の配向性能のばらつざ、液晶封入ギャップ間隔の
ばらつきなど、表示輝度に影響を与える要因が存在する
。Furthermore, even if variations in TFTs are reduced, there are factors that affect display brightness, such as variations in alignment performance of liquid crystal alignment films and variations in liquid crystal filling gap spacing.
第1図では上記、液晶パネル5を一定の駆動′1圧で駆
動した場合のパネル表示輝度をカメラ等の輝度測定装置
t6で測定し、その輝度むらの情報をフレームメモリ7
に貯える。このとき、液晶パネル内の全ての画素に対応
して輝度を測定、メモリすることは、測定時間およびメ
モリ容量の点から困難であるため、第2図に示すように
画面上を複数の区画に分割し、その区画の代表点(pH
,PI3・・・・・・)の表示輝度を測定する。In FIG. 1, the panel display brightness when the liquid crystal panel 5 is driven at a constant driving pressure is measured by a brightness measuring device t6 such as a camera, and information on the brightness unevenness is stored in the frame memory 7.
Store in. At this time, it is difficult to measure and store the brightness corresponding to all pixels in the liquid crystal panel in terms of measurement time and memory capacity, so the screen is divided into multiple sections as shown in Figure 2. Divide the area into representative points (pH
, PI3...).
輝度計6の性能として測定すべき区画または代表点以外
の表示輝度の影響を受けないように、微小面積の輝度が
測定できる場合は、液晶パネル5の全面に中間調臼を表
示し、輝度計の位置あるいは角度をメモリ7の曹込み時
アドレス設定用クロック信号を利用して各測定すべきポ
イントに合わせて制御し、測定結果をメモリ7に貯えれ
ば良い、また1、1ii1度計6の被測定範囲が広く、
隣接区画または隣接代表点の輝度の影嘗が分離できない
場合には、映像信号入力端子1に印加する信号を工夫す
れば良い、すなわち、し1jえば所定時間ごとにpH,
Pt2. Pt3 、 ・・・・・・P45というよう
に、中間調白に相当する液晶パネル上の輝点位置をずら
せるような映像信号を発生させれば良い、このような映
像信号の発生方法は通常の技術レベルにより容易に実現
することができる。ただし、この場合、映像情報が変化
するだけであり、同期信号には何らの変化も生じないの
で、どの測定ポイントが光っているかを判別するために
、フレームメモリ7へのデータ書込時のアドレス設定情
報として、映像信号発生装置9からフレームメモリ7に
信号を供給する必要がある。この場合の実施例を第3図
に示す。If the brightness of a minute area can be measured, a half-tone scale is displayed on the entire surface of the liquid crystal panel 5 so that the brightness meter 6 is not affected by the display brightness of areas other than the sections or representative points to be measured. The position or angle of 1, 1ii and 1 degree meter 6 can be controlled according to each point to be measured using the clock signal for setting the address at the time of grading in memory 7, and the measurement results can be stored in memory 7. The measurement range is wide,
If the influence of the brightness of adjacent sections or adjacent representative points cannot be separated, the signal applied to the video signal input terminal 1 may be devised.
Pt2. It is sufficient to generate a video signal that shifts the position of a bright spot on the liquid crystal panel corresponding to halftone white, such as Pt3, ...P45.The method of generating such a video signal is usually This can be easily realized due to the technological level of However, in this case, only the video information changes and no change occurs in the synchronization signal, so in order to determine which measurement point is lit, the address at the time of data writing to the frame memory 7 is As setting information, it is necessary to supply a signal from the video signal generator 9 to the frame memory 7. An example in this case is shown in FIG.
以上の操作により、TFT、配向膜、液晶層ギャップな
どのばらつき性能を総合した輝度むら情報が、アドレス
情報と共にフレームメモリに記憶できる。Through the above operations, brightness unevenness information that integrates the dispersion performance of TFTs, alignment films, liquid crystal layer gaps, etc. can be stored in the frame memory together with address information.
次に、メモリに記憶された情報を利用する場合には、第
1図において、メモリ7に水平垂直同期信号を印加し、
それらから胱出しアドレスを設定するだめの胱出し用ク
ロ、り信号を形成して、画面上各部への表示用映像信号
と同期して、メモリされた輝度むら情報を絖み出す。Next, when using the information stored in the memory, in FIG. 1, apply a horizontal and vertical synchronizing signal to the memory 7,
From these, a black signal for bladder evacuation for setting a bladder ejection address is formed, and the memorized luminance unevenness information is generated in synchronization with the video signal for display to each part on the screen.
このとき、第2図に示したpH,P+2・・・・・・な
どの代表点以外については、近傍のデータを用いて補間
演算し、輝度むらを補正する。At this time, for points other than the representative points such as pH, P+2, . . . shown in FIG. 2, interpolation calculations are performed using nearby data to correct brightness unevenness.
上記補間演算の方法として、例えば、1縁補間(第4図
(α))ローパスフィルタを用いたなめらかな補間(第
4図中))などの他、4つのデータを用いて3次曲線を
演算して補間する手段(第4図(C))などの方法があ
る。これを第4図に示す、3次曲線を求めて補間する方
法は例えば、第4図(C)のPt2−Pt3区間の補正
はpH,Pt2゜Pt3.Pt4の各データを通る6次
曲線を求め、その曲線に従ってPt2− Pt3区間を
補間し、Pt3−Pt4区間の補正はP+ 2. PI
3. PI3. PI3の各データを通る3次曲庫を求
め、その曲解に従ってB3−Pt4区間を補間する、と
いう方法であり、演算のための回路構成は複雑になるが
、なめらかな補間が可能であり、かつ、第4図(b)の
ローパスフィルタを用いた補間に比べて、時間遅れなく
正しく補間することができる。The above interpolation calculation methods include, for example, one-edge interpolation (Figure 4 (α)), smooth interpolation using a low-pass filter (Figure 4), and calculation of a cubic curve using four data. There are methods such as interpolation (FIG. 4(C)). This is shown in FIG. 4, and the method of finding a cubic curve and interpolating it is, for example, the correction of the Pt2-Pt3 section in FIG. A 6th order curve passing through each data of Pt4 is obtained, and the Pt2-Pt3 interval is interpolated according to the curve, and the Pt3-Pt4 interval is corrected by P+2. P.I.
3. PI3. This method involves finding a cubic curve passing through each piece of PI3 data and interpolating the B3-Pt4 section according to that curve. Although the circuit configuration for calculation is complicated, it allows for smooth interpolation, and , it is possible to perform correct interpolation without time delay compared to the interpolation using the low-pass filter shown in FIG. 4(b).
上記補間演算は、補間演算回路8で付なわれる。補間演
算しだ結呆は直流電圧で映像信号の’Ki’、 * v
L圧Lし ベルをftjlJ Offすることのできる
レベルシフト回路2に直流電圧情報として供給され、液
晶パネル5に印加すべき映像信号の@流旭圧レベルをl
Ir1J御し、液晶パネル上に正しい輝度レベルで映像
を表示する。The above interpolation calculation is performed by an interpolation calculation circuit 8. The result of interpolation calculation is DC voltage, 'Ki' of video signal, *v
It is supplied as DC voltage information to the level shift circuit 2, which can turn off the L voltage and turn off the signal, and adjusts the @flow pressure level of the video signal to be applied to the liquid crystal panel 5.
Ir1J control to display images at the correct brightness level on the LCD panel.
なお、以上の説明では、液晶パネルに一定レベルの映像
(7T号を印加し、液晶パネル上の1llfむらを測定
して、測定データをメモリに貯えたが、液晶パネルに中
間調白を表示し、メモリ7の書込み、読出しを同時に(
時分割で)行なって、液晶パネル上の輝度むらが補正で
きる状態のデータをメモリ7に貯える方法を用いた方が
より正しく補正することができる。In the above explanation, a constant level of video (7T) was applied to the liquid crystal panel, 1llf unevenness on the liquid crystal panel was measured, and the measured data was stored in memory. , write and read memory 7 simultaneously (
It is possible to correct the correction more accurately by using a method in which the data is stored in the memory 7 in a state in which the brightness unevenness on the liquid crystal panel can be corrected.
また、以上の説明では白色の輝度補正の手段について述
べたが、例えばカメラの前面に、赤、緑、宵の波長選択
フィルタを順次設置し、それらのデータから、白バラン
ス補正を行なうようにしても良く、また白色の色温度を
直接測定し、所定の白色が得られるように白バランス補
正を行なわせることも可能である。Also, in the above explanation, we have described the means for white luminance correction, but for example, red, green, and evening wavelength selection filters can be installed in sequence on the front of the camera, and white balance correction can be performed from those data. It is also possible to directly measure the color temperature of white and perform white balance correction to obtain a predetermined white color.
第1図、第2図等に示した液晶パネルの輝度むら補正の
為に必要なフレームメモリの容量は、画面上の輝度測定
ポイント数および、どの程度の精度で輝度補正を行なう
かに依存するが、例えば画面上の16X16ポイントで
測定し、各ポイント、ib itの匍」碑が必要である
とすれば、最小、1024bitのメモリで実現できる
。The frame memory capacity required to correct uneven brightness of the LCD panel shown in Figures 1 and 2 depends on the number of brightness measurement points on the screen and the accuracy with which brightness correction is to be performed. However, for example, if measurements are made at 16x16 points on the screen, and each point requires an "ibit" monument, it can be realized with a minimum of 1024 bits of memory.
輝度測定装置6は液晶表示装置の製造調整時にだけ必要
であるため、その画側が高いことは、はとんど障害には
ならない。Since the brightness measuring device 6 is needed only during manufacturing adjustment of the liquid crystal display device, the fact that the screen side thereof is high is hardly a problem.
以上説明したように本発明によれば、TFTのばらつき
、配向膜のばらつき、液晶ギャップのばらつきなどに起
因して生じる液晶パネルの中間調表示輝度のばらつきを
解決することができ、良好な画質で表示することができ
る。As explained above, according to the present invention, it is possible to solve the variations in halftone display brightness of the liquid crystal panel caused by variations in TFTs, alignment films, liquid crystal gaps, etc., and to maintain good image quality. can be displayed.
第1図は本発明による第1の実施例のブロック図、第2
図は液晶パネル上の輝度測定ポイントの例を示す説明図
、第3図は本発明による第2の実施例のブロック図、第
4図は補間演算状態の例を示す説明図である。
1・・・・・・映像信号入力端子
2・・・・・・可変増幅器
3・・・・・・同期信号検出回路
4・・・・・・液晶パネル駆動回路
5・・・・・・液晶パネル、
6・・・・・・輝度測定装置
7・・・・・・フレームメモリ
8・・・・・・補間演算回路
9・・・・・・映像信号発生装置
地 / 凹
感2閃FIG. 1 is a block diagram of a first embodiment according to the present invention;
FIG. 3 is a block diagram of a second embodiment of the present invention, and FIG. 4 is an explanatory diagram showing an example of an interpolation calculation state. 1...Video signal input terminal 2...Variable amplifier 3...Synchronization signal detection circuit 4...Liquid crystal panel drive circuit 5...Liquid crystal Panel, 6...Brightness measurement device 7...Frame memory 8...Interpolation calculation circuit 9...Video signal generation device / Concave 2 flashes
Claims (1)
動回路とから成るTFTアクティブマトリクス方式液晶
表示装置において、前記液晶パネルに中間調白を表示す
る手段と、画面上を複数の区画に区分し、各区画の輝度
または各区画の代表点の輝度を測定する輝度測定手段、
各区画の代表点の画面上位置を示すアドレス情報に従っ
て前記輝度測定手段から得た輝度情報を貯えるメモリ手
段、映像信号受信時に複数の区画、または区画の代表点
の前記貯えられた輝度情報を読出し、かつ画面上の走査
位置に対応するクロック信号の状態に応じて前記読出し
た複数の輝度情報を補間演算する手段、前記補間演算手
段の出力信号により入力映像信号の直流電圧を制御する
手段を有し、該制御後の映像信号を液晶パネルに印加す
ることを特徴とした液晶表示装置。1. In a TFT active matrix liquid crystal display device consisting of a video signal input terminal, a liquid crystal panel, and a liquid crystal panel drive circuit, means for displaying halftone white on the liquid crystal panel, and dividing the screen into a plurality of sections. , a brightness measuring means for measuring the brightness of each section or the brightness of a representative point of each section;
A memory means for storing the luminance information obtained from the luminance measuring means according to address information indicating the position on the screen of the representative point of each division, and reading out the stored luminance information of the plurality of divisions or the representative point of the division when receiving the video signal. and means for performing interpolation calculations on the plurality of read luminance information according to the state of a clock signal corresponding to a scanning position on the screen, and means for controlling the DC voltage of the input video signal by the output signal of the interpolation calculation means. and applying the controlled video signal to a liquid crystal panel.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60271428A JPH0638187B2 (en) | 1985-12-04 | 1985-12-04 | Liquid crystal display |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60271428A JPH0638187B2 (en) | 1985-12-04 | 1985-12-04 | Liquid crystal display |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS62131233A true JPS62131233A (en) | 1987-06-13 |
JPH0638187B2 JPH0638187B2 (en) | 1994-05-18 |
Family
ID=17499895
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60271428A Expired - Lifetime JPH0638187B2 (en) | 1985-12-04 | 1985-12-04 | Liquid crystal display |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0638187B2 (en) |
Cited By (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02135420A (en) * | 1988-11-17 | 1990-05-24 | Matsushita Electric Ind Co Ltd | Liquid crystal display device |
JPH05173523A (en) * | 1991-05-24 | 1993-07-13 | Hitachi Ltd | Multiscreen display |
JPH06138849A (en) * | 1992-10-30 | 1994-05-20 | Sharp Corp | Liquid crystal video display device |
JPH07255059A (en) * | 1994-03-15 | 1995-10-03 | Sony Corp | Registration adjustment device and method therefor |
JPH09146496A (en) * | 1995-11-17 | 1997-06-06 | Nec Corp | Projector with color irregularity and luminance unevenness correcting circuit |
JPH09318929A (en) * | 1996-05-29 | 1997-12-12 | Toshiba Corp | Liquid crystal display device and method for correcting display unevenness |
WO1998033166A1 (en) * | 1997-01-29 | 1998-07-30 | Seiko Epson Corporation | Method for inspecting active matrix board, active matrix board, liquid crystal device and electronic equipment |
JPH11113019A (en) * | 1997-09-30 | 1999-04-23 | Sony Corp | Image display device |
US6380917B2 (en) | 1997-04-18 | 2002-04-30 | Seiko Epson Corporation | Driving circuit of electro-optical device, driving method for electro-optical device, and electro-optical device and electronic equipment employing the electro-optical device |
JP2002182622A (en) * | 2000-10-04 | 2002-06-26 | Seiko Epson Corp | Correction circuit for video signal, correcting method therefor, liquid crystal display device, and electronic equipment |
US6669822B1 (en) | 1998-10-28 | 2003-12-30 | Ebara Corporation | Method for carbonizing wastes |
JP2004054226A (en) * | 2002-05-18 | 2004-02-19 | Lg Phillips Lcd Co Ltd | Method and system to analyze picture quality of display device |
JP2004062187A (en) * | 2000-12-01 | 2004-02-26 | Seiko Epson Corp | Liquid crystal display device, picture data correcting circuit, and electronic equipment |
JP2004133177A (en) * | 2002-10-10 | 2004-04-30 | Seiko Epson Corp | Image persistence suppression circuit, image persistence suppression method, liquid crystal display device, and projector |
US7142185B2 (en) | 2000-12-01 | 2006-11-28 | Seiko Epson Corporation | Liquid crystal display, image data compensation circuit, image data compensation method, and electronic apparatus |
WO2010005112A1 (en) * | 2008-07-09 | 2010-01-14 | Sharp Kabushiki Kaisha | Methods and systems for display correction |
Citations (1)
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JPS5994735A (en) * | 1982-11-22 | 1984-05-31 | Mitsubishi Electric Corp | Liquid crystal display device |
-
1985
- 1985-12-04 JP JP60271428A patent/JPH0638187B2/en not_active Expired - Lifetime
Patent Citations (1)
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JPS5994735A (en) * | 1982-11-22 | 1984-05-31 | Mitsubishi Electric Corp | Liquid crystal display device |
Cited By (22)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH02135420A (en) * | 1988-11-17 | 1990-05-24 | Matsushita Electric Ind Co Ltd | Liquid crystal display device |
JPH05173523A (en) * | 1991-05-24 | 1993-07-13 | Hitachi Ltd | Multiscreen display |
JPH06138849A (en) * | 1992-10-30 | 1994-05-20 | Sharp Corp | Liquid crystal video display device |
JPH07255059A (en) * | 1994-03-15 | 1995-10-03 | Sony Corp | Registration adjustment device and method therefor |
JPH09146496A (en) * | 1995-11-17 | 1997-06-06 | Nec Corp | Projector with color irregularity and luminance unevenness correcting circuit |
JPH09318929A (en) * | 1996-05-29 | 1997-12-12 | Toshiba Corp | Liquid crystal display device and method for correcting display unevenness |
WO1998033166A1 (en) * | 1997-01-29 | 1998-07-30 | Seiko Epson Corporation | Method for inspecting active matrix board, active matrix board, liquid crystal device and electronic equipment |
US6281700B1 (en) | 1997-01-29 | 2001-08-28 | Seiko Epson Corporation | Active matrix substrate inspecting method, active matrix substrate, liquid crystal device, and electronic apparatus |
US6794892B2 (en) | 1997-01-29 | 2004-09-21 | Seiko Epson Corporation | Active matrix substrate inspecting method, active matrix substrate, liquid crystal device, and electronic apparatus |
US6525556B2 (en) | 1997-01-29 | 2003-02-25 | Seiko Epson Corporation | Active matrix substrate inspecting method, active matrix substrate, liquid crystal device, and electronic apparatus |
US6380917B2 (en) | 1997-04-18 | 2002-04-30 | Seiko Epson Corporation | Driving circuit of electro-optical device, driving method for electro-optical device, and electro-optical device and electronic equipment employing the electro-optical device |
US6674420B2 (en) | 1997-04-18 | 2004-01-06 | Seiko Epson Corporation | Driving circuit of electro-optical device, driving method for electro-optical device, and electro-optical device and electronic equipment employing the electro-optical device |
JPH11113019A (en) * | 1997-09-30 | 1999-04-23 | Sony Corp | Image display device |
US6669822B1 (en) | 1998-10-28 | 2003-12-30 | Ebara Corporation | Method for carbonizing wastes |
JP2002182622A (en) * | 2000-10-04 | 2002-06-26 | Seiko Epson Corp | Correction circuit for video signal, correcting method therefor, liquid crystal display device, and electronic equipment |
US6778157B2 (en) | 2000-10-04 | 2004-08-17 | Seiko Epson Corporation | Image signal compensation circuit for liquid crystal display, compensation method therefor, liquid crystal display, and electronic apparatus |
JP2004062187A (en) * | 2000-12-01 | 2004-02-26 | Seiko Epson Corp | Liquid crystal display device, picture data correcting circuit, and electronic equipment |
US7142185B2 (en) | 2000-12-01 | 2006-11-28 | Seiko Epson Corporation | Liquid crystal display, image data compensation circuit, image data compensation method, and electronic apparatus |
JP2004054226A (en) * | 2002-05-18 | 2004-02-19 | Lg Phillips Lcd Co Ltd | Method and system to analyze picture quality of display device |
JP2004133177A (en) * | 2002-10-10 | 2004-04-30 | Seiko Epson Corp | Image persistence suppression circuit, image persistence suppression method, liquid crystal display device, and projector |
WO2010005112A1 (en) * | 2008-07-09 | 2010-01-14 | Sharp Kabushiki Kaisha | Methods and systems for display correction |
US9837013B2 (en) | 2008-07-09 | 2017-12-05 | Sharp Laboratories Of America, Inc. | Methods and systems for display correction |
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JPH0638187B2 (en) | 1994-05-18 |
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