JPS62130034A - Dsi system - Google Patents

Abstract

PURPOSE:To improve the sound quality by applying bit-steal to a voice data, sending various control signals and allowing the reception side to recompose the voice signal into the original frame and extracting separately the control signal so as to lower a lockout generating rate. CONSTITUTION:A transmission DSI means 101 separates only a channel where a voice in a multiplex digital signal exists, sends a frame decreased with the channel number and sends a DSI control signal representing the relation of correspondence with a time slot voice channel in the frame. A bit steal means 103 applies bit steal by using a part or all of various control signals including the DSI control signal to each channel signal of the frame. A reception DSI means 102 uses the DSI control signal to recompose the voice signal into a multiplex signal of the same channel number as the transmission side. A separation means 104 separates the signal inserted in the reception signal by but steal.

Description

[Detailed Description of the Invention] [Table of Contents] Overview Industrial Application Fields Prior Art Problems to be Solved by the Invention Means for Solving the Problems (Fig. 1) Working Examples First Embodiment (Fig. 2, 3) Second embodiment (Figs. 4 to 7) Effects of the invention [Summary] Only channels in which audio exists in a multiplexed digital audio signal are framed and transmitted, and the A DSI control signal indicating the correspondence between time slots and audio channels is transmitted, and when the receiving side uses the DSI control signal to reorganize the audio signal into the same number of multiplexed signals as the transmitting side, each channel in the transmission frame is By bit-stealing the signal and inserting various control signals, these are separated and extracted on the receiving side, which reduces the incidence of freeze-outs (where the voice signal cannot be accommodated) when the call volume increases. can be used to improve voice quality.

[Industrial application field]

The present invention relates to a digital call insertion (DSI) device, and more particularly to a DSI method for transmitting signaling signals, DSI control signals, super frame synchronization patterns, game alarm signals, etc. in a DSI device.

The DSI device takes advantage of the fact that there are many gaps (silence states) between the voices transmitted in telephone signals, and digitizes and transmits the signal only on the channel where the voice is detected by the voice detector. Information indicating which channel's signal was transmitted in which time slot,
It is transmitted as control information (DS1 control information), and the receiving side uses this control information to reconstruct the audio signal corresponding to the transmitted audio and sends it to each corresponding channel. Since the number of channels to be transmitted can be reduced, it is effective when using a transmission line with high line cost.

In addition to voice signals, in this SI device, it is necessary to send a signaling signal (dial pulse), the aforementioned DSI control signal, a synchronization pattern to synchronize the super frame, and a warning signal to the opposing team. It is desired to be able to transmit these signals efficiently and without degrading the quality of the transmitted voice.

[Conventional technology]

In the conventional DSI system, signaling signals and DS
I control signals, super frame synchronization patterns, and game alerts are
Part or all of the audio signal is transmitted using a time slot different from that of the audio signal.

[Problem that the invention seeks to solve]

In the conventional DSI system, signals other than these audio signals were transmitted using separate time slots, so the number of audio channels that can be transmitted simultaneously is reduced by the number of time slots used for this, and therefore the number of audio channels that can be transmitted simultaneously is reduced. This increases the probability that the number of channels will be exceeded, and audio signals that cannot be transmitted are blocked, resulting in a problem that the audio quality deteriorates accordingly.

[Failure to solve the problem]

Ru.

Reference numeral 101 is a transmission DSI means, which separates only the channel in which voice exists in the multiplexed digital signal and transmits a frame in which the number of channels is reduced, and at the same time transmits a DSI indicating the correspondence relationship with the time slot voice channel in this frame. Send control signals.

Reference numeral 103 denotes a bit stealing means, which performs bit stealing using part or all of various control signals including the DSI control signal in the signal of each channel of the frame in which the number of channels is reduced.

Reference numeral 102 is a receiving DSI means, which reorganizes the audio signal into a multiplexed signal having the same number of channels as that on the transmitting side according to the DSI control signal I'H.

Reference numeral 104 denotes a separation means that separates the signal inserted into the received signal by bit stealing.

[Effect]

In a DSI device, bit stealing is performed on DSS output signal audio data to transmit various control signals, and on the receiving side, the audio signal is reorganized into the original frame, and all the various control signals inserted by bit stealing are Since the control signals are separated and extracted, the time slots of the audio signals are not occupied for the transmission of these control signals, and therefore, when the call volume increases in the DSI device, the so-called freeze-out (freeze-out) occurs in which the audio signals cannot be transmitted. rate and improve voice quality.

〔Example〕

FIG. 2 is a block diagram showing an embodiment of the present invention,
(a) shows a transmitting section, in which lines A and B'i containing the audio signals of the additional channels are input, and outputted from the DSI line C1 containing the audio signals of 30 channels.

Further, (b) shows a receiving section, which receives DSI lines containing audio signals of 30 channels and outputs channels iE and pi containing audio signals of additional channels, respectively. Figure 2 (al
, (h), 1 is an interface section, 2 is a signaling separation section, 3 is a DSI circuit, 4 is a buffer memory (BM), 5 is a timing generation section, 6 is a selector, 7
is a DSI circuit, 8 is a flip-flop (FF), 9 is a timing generator, 10 is a buffer memory (BM), 11
1 is a signaling multiplexing section, and 12 is an ink face section.

Figure 3 shows the frame format of each line signal in Figure 2, (a) is the frame format of the signals on lines A, B, E, and F, and (b) is the frame format of the signals on lines C and D. Therefore, each time slot T
SO to TS31 are each 8-bit frame color p.
, 32 frames form one multiframe.

In the transmitting section, the signals of lines A and B are input to the signaling separation section 2 via the interface section 1i, and the audio signals CH of the glossy channels assigned to the respective time slots TSI to TS31 (however, TS16 is empty) are inputted to the signaling separation section 2 through the interface section 1i.
I to CH30 and the signaling signal assigned to the time slot TSO are separated. As shown in Figure 3(a), the signaling signals are inserted into the TSO for 5 channels (+1 frame to 6 frame time slots), and the signaling signals of all channels are transmitted every 8 multiframes. It looks like this. The separated audio signals are detected for each channel in the DSI circuit 3 for the presence or absence of audio, and only the signals of the channels in which audio is present are sequentially assigned to the time slots of the signals of the nod channel forming the line C and sent to the selector 6. is input. On the other hand, the separated signaling signals are temporarily held in the buffer memory 4, and then sequentially read out in the order of channel numbers according to the timing signal from the timing generator 5 and applied to the selector 6. The selector 6 selects DSI@[ according to the timing signal from the timing generator 5.
The least significant pit (LSB) 'i of the 30 channels of audio signals inputted from buffer memory 4 is sequentially replaced by the signaling signal of each channel read from buffer memory 4. In FIG. 3(b), time slot TSI~
The shaded LSB in the data of TS31 indicates the signaling signal inserted by bit stealing in this way. It is necessary to transmit the signaling signal regardless of the presence or absence of voice, and therefore, in the signal of the line C outputted by the selector 6, pit stealing is performed twice in every 8 multi-frames. It goes without saying that if no signaling is occurring in each channel, the LSB of that channel will not be bit stolen.

times? In the first time slot in the IMC signal,
times? The signal of each channel in /MA,H is 1 #C
DS indicating which time slot it was inserted in
I control signals and other signals are transmitted.

The signal on line C is sent to the transmission line via a transmission line interface section (not shown).

In the receiving section, the IWD signal received from the transmission path via the transmission path interface section and having the frame format shown in FIG. , the audio signals of each channel of the line are arranged in accordance with the frame format of the lines iE and F. For frames that are bit-stealed, the LSB of the valley channel of the line.
are rewritten in the flip-flop 8 in accordance with the timing signal generated by the timing generator 9, and then held in the buffer memory 10 in the order of time slots.

The signaling multiplexer 11 reorganizes the time slots of the signals of the two lines E, F, each with 30 channels of audio signals, reorganized by the DSI circuit 7, into the TSO,
The signaling signals held in the buffer memory 10 are sequentially inserted in the same order as shown in FIG.
Make it go around in multiple frames.

The signals of the lines created in this way are outputted as lines E and F via the interface section 12.

In this case, the LSB of the channel whose bit was stolen in the line is 0'' or ” in the DS engineering circuit 7.
A bit of 1" is optionally inserted.

In the above embodiment, only the signaling signal is transmitted by bit stealing, and the DSI control signal, super frame synchronization pattern, and game alert are transmitted through the lines c,
(timeslot D) is transmitted in outslot format by TSOK.

FIG. 4 is a block diagram showing another embodiment of the present invention, in which (a) shows a transmitter, and all L5 Mbps PCM lines A and B, each containing 24 channels of audio signals, are input and 23 channels of audio are input. 1.5Mbps DSI including signal
Line line C power output. In addition, (b) shows the receiving section, which is a 1.5 Mbps DSI circuit D containing 23 channels of audio signals.
1.5 Mbps PCM lines E and F each containing 24 channels of audio signals are output. Fourth
In Figures (a) and (b), the same parts as in Figure 2 are indicated by the same numbers, 21 is a PCM interface section, 22 is a multiplex section, 23 and 24 are PCM interface sections, 25 is a separation section, and 26 is the bit steel part, 2
7 is a PCM interface section.

Also, FIG. 5 shows the frame format of the valley-turn signal in FIG. 4, where (a) is the frame format of the signals on lines A, B, E, and F, and (b) is the frame format of the signals on lines C and D. It is shown that 24 time slots of 8 bits each form one frame.

Further, Fig. 6 shows the frame format '6 of the super frame of lines C and D, illustrating the case where the super frame is assembled with a voice detection period of 6 m5 = 48 frames,
, E, and F are bit-stealed by signaling signals once every 6 frames, whereas (b) shows the frame format of line C0D, where bits are stolen once every 12 frames. It has been shown that bits are stolen by synchronization patterns, DSI control signals, and game alerts.

FIG. 7 shows an example of the arrangement of data transmitted by bit stealing on lines C and D.

In the transmitting section, the PCM-converted signals of lines A and B are
Signaling separation unit 2 via CM interface unit 21i
The signal is input into the audio data and is separated into the signaling signal inserted into the LSI 3 of each channel by bit stealing. The audio data of the separated 48 channels is detected by the DSI circuit 3 as to whether or not there is audio, and is sequentially allocated to the time slots of the 23 channel signals that make up the line C based only on the signals of the channels where audio is present, and sent to the selector 6. is man-powered. Further, the separated signaling signals are manually inputted to the multiplexing section 22.

On the other hand, the game alarm G separated from the input PCM signal by the PCM interface section 21 and the super frame pattern created by the PCM interface section are held in the buffer memory 4. Further, the DSI control signal (2) created by the DSI circuit 3 is also held in the buffer memory 4. The timing generation circuit 5 generates a timing signal according to the synchronization signal separated from the PCM interface section 21 and applies it to the buffer memory 4 and the selector 6. As a result, the selector 6 selects the time slots TS1 to TS1 inputted from the D81 circuit 3.
LSBi of 23 channels of audio signals in TS23,
1, that is, the super frame synchronization pattern, DSIJ, is applied to the bit stealing signal read from the buffer memory 4.
These signals are inserted by bit stealing by sequentially replacing them with II control signals and game alerts. The output of the selector 6 is added to the multiplexer 22,
The signaling signal separated by the signaling separation unit 2 is inserted into the TS 24 (time slot). The signals are multiplexed in this manner to produce a signal on line C shown in FIG. 5, which is further sent out to the transmission line via the PCM interface section 23. In FIG. 5, the bit-stealed signals of each line are all shown with diagonal lines, and F is a synchronization signal.

In this case, bit stealing on line C is performed once every 12 frames as shown in Figure 6, so
If there is one super frame consisting of a frame, ■,■,
As shown by ■ and ■, frame 12° frame 24. Frame 36. bit-stealed at frame 48;
As shown in Fig. 7, the super synchronization pattern F for each frame is
1 to F4, and DSI control signals 01 to C12, CI3 to C
24, C25 to C36, C37 to C48, and game alerts are transmitted. In FIG. 6, the total number of pits in which bit stealing is performed between more than one frame is 23 x 4 = 92 bits in 4 frames. This 9
The contents of the 2 bits are 5x4 in the super frame synchronization pattern.
= 24 bits, 12 x 4 = 48 bits (1 pit per channel) for the DSI control signal, 2 x 4 = 8 bits for the game alarm, and 3 x 4 = 12 free bits.

In the receiving section, the line signal is input through the PCM interface section 24, and the separating section 25 separates the signaling signal transmitted to the out slot and inputs it to the bit steal section 26, and the separated audio signal t - Input to DSI circuit 7. On the other hand, LS of each channel
The DSI control signal and game alarm transmitted by H are recast in the flip 70 tube 8 to produce a bit-steal transmitted signal Lt-, which is held in the buffer memory IO. The superframe pattern is input to a timing generator and used for superframe synchronization. The timing generating section 9 supplies necessary timing signals to all the sections at this time.

In the DSI circuit 7, the DSI control signal read from the backup memory 10 is used to rearrange the audio signals of each time slot of the lines according to the frame format of the lines E and F. The bit steal section 26 replaces the LSB of the audio signal of each channel inputted from the DSI circuit 7 with the signaling signal separated by the separation section, thereby creating the signal shown in FIG. 5 that is bit stolen with the signaling signal. . The PCM interface section adds the game warning read from the buffer memory IJ 10 to the output signal of the bit steal section 26 to create and output signals for lines g and F.

In the embodiment shown in FIG. 4, the signaling signals are transmitted through lines C,
In D, out-slot transmission is performed, but the number of bit-stealed frames is increased in lines C and D, and the signaling signal is also transmitted by bit-stealing as in the embodiment shown in FIG. Needless to say, you can do it this way.

In this way, the signaling signal 'i in the digitized signal transmitting all out slots can be transmitted by bit stealing through the DSI device. In this case, even if bits are stolen for one frame of the DSI output signal, based on the ratio of the audio channels that are actually transmitted to all audio channels, only half of the channels are actually bit-stealed. Even if bit stealing is performed on 2 frames during 8 multiframes as shown in the figure, if you look at each channel, it is probable that bit stealing was performed on 1 frame during 8 multiframes. are equivalent, and there is relatively little deterioration in sound quality.

In other words, when comparing the voice quality deterioration due to bit stealing and the voice quality improvement due to an increase in the number of transmittable voice channels, the latter effect is greater when the volume of calls is large, and therefore the effectiveness of the method of the present invention is is considered high.

〔Effect of the invention〕

As explained above, according to the method of the present invention, there is no need to transmit part or all of various control signals such as signaling, DSI control signals, super frame synchronization patterns, game warnings, etc. in out-slots. This can be reduced to improve audio quality if the frequency of freeze-outs is high.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the entire principle configuration of the present invention, Fig. 2 is a diagram showing an embodiment of the present invention, Fig. 3 is a diagram showing the frame format of each line signal, and Fig. 4 is a diagram showing the present invention. Figure 5 is a diagram showing the frame format of each line signal, Figure 6 is a diagram showing the frame format of the super frame of lines C and D, and Figure 7 is a diagram showing the frame format of the super frame of lines C and D. FIG. 3 is a diagram showing an example of the arrangement of data. 1... Interface section 2... Signaling separation section 3... DSI circuit 4... Buffer memory (BM) 5... Timing generation section 6... Selector 7... DSI circuit 8° flip-flop (FF) 9... Timing generation section 10... Buffer memory (BM) 11... Signaling multiplexing section 12... Interface section 21... PCM interface section 22... Multiplexing section 23, 24...・PCM interface section 25...
Separation part 26...Bit steel part 27...PCMC Fintaface Applicant Fujitsu Limited Representative Patent Attorney Hisashi Tamamushi Gobu (1 other person) IMF of the present invention, showing the embedded structure 2 Part 1 Figure 2 shows an embodiment of the present invention and the whistle shown in Figure 2) The frame former of each line signal.
figure

Claims (1)

[Claims] A frame in which the number of channels is compressed is constructed only by signals of channels in which voice is detected in a multiplexed digital voice signal, and the correspondence between time slots and voice channels in the frame is determined. The transmitting side is equipped with a transmitting DSI means (101) for creating and transmitting a DSI control signal shown in FIG. In a DSI device having a DSI means (102) on the receiving side, bit stealing means (102) performs bit stealing on a signal of each channel in a frame in which the number of channels is compressed.
103) on the transmitting side, and a separating means (104) for separating the signal inserted by bit stealing from the received signal, and separating the DSI control signal by the bit stolen. The DSI method is characterized by transmitting various control signals including: