JPS6212703B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a wireless tone signal detection circuit such as a paging receiver, and more particularly to a frequency variable tone signal detection circuit having an N-way filter. Conventionally, this type of tone signal detection circuit (patent application,
51-141861) as a frequency selector, an N-way filter that sequentially passes multiple paging tone signal frequencies and a low-pass filter that removes harmonic signals included in the output of the N-way filter. , a comparator that shapes the waveform of the output of this low-pass filter, a digital detector that detects whether the comparator output satisfies a set wave number within a certain period of time to determine that it has the target tone signal frequency, and this in response to the output of the detector;
It consists of means for changing the center frequency of the N-way filter, and display means that responds only when the last signal of the paging tone signal is detected. However, due to its characteristics, the tone signal detector using this N-path filter passes the target tone signal frequency and a frequency A times that frequency (A is an integer of 2 or more), so it is not ready for a target tone signal. When a tone signal frequency that is A times as high as that of the tone signal arrives at the detector in the current state, the detector erroneously detects this tone signal as the target tone signal. SUMMARY OF THE INVENTION An object of the present invention is to provide a tone signal detection circuit using an N-way filter that eliminates the above-mentioned drawbacks. According to the present invention, in a frequency-switchable tone signal detection circuit that sequentially receives and passes a plurality of tone signals, N times the frequency of the plurality of tone signals (N is an integer of 2 or more). a clock signal generation circuit that selects and outputs one of a plurality of clock signals having a frequency of , using a first control signal; a resistor that receives the tone signal at one end; and the other end of the resistor. an N-way filter for selecting the tone signal, comprising N capacitors connected to the N capacitors and a switch connected in series to each of the N capacitors and sequentially opened and closed cyclically in response to the clock signal; a low-pass filter that is connected to the output of the N-way filter and removes harmonics of the tone signal by changing the cutoff frequency according to a second control signal; A detector that generates a detection signal in response to each tone signal; and a circuit that is connected to the detector and generates the first and second control signals in response to the detection signal. A tone signal detection circuit is obtained. Further, in a frequency-switchable tone signal detection circuit that sequentially receives and passes a plurality of tone signals, one of the plurality of clock signals having a frequency N times the frequency of the plurality of tone signals (N is an integer of 2 or more) is selected. a clock signal generating circuit that selects and outputs one clock signal based on a first control signal; a resistor that receives the tone signal at one end; and N capacitors connected to the other end of the resistor; an N-way filter connected to each of the N capacitors in series and cyclically opened and closed sequentially by the clock signal to select the tone signal; a switch connected to the output of the N-way filter; a low-pass filter that removes harmonics of the tone signal by changing its cut-off frequency according to a control signal; A detector that generates a signal; a circuit that is connected to the detector and generates the first and second control signals in response to the detection signal; and a circuit that closes the switches all at once in response to the detection signal. A tone signal detection circuit is obtained. Hereinafter, the present invention will be explained in detail with reference to the drawings. FIG. 1 is a block diagram of a selective signaling receiver using the tone signal detection circuit of the present invention. FIG. 2 shows a tone signal sequence used in the tone signal detection circuit of the present invention. FIG. 3 is a diagram showing an example of signal attenuation characteristics in an N-way filter. FIG. 4 is a more specific circuit example of the N-way filter and low frequency filter shown in FIG. 1. FIG. 5 is an example of a more specific block diagram of the control circuit shown in FIG. 1. FIG. 6 is an example of a specific circuit of the tone designation circuit shown in FIG. 1. In FIG. 1, a carrier wave modulated with a predetermined tone signal is received by an antenna 10, and a receiver 11
join to. The receiver 11 is a double superheterodyne receiver and includes a discriminator. The signal demodulated by the receiver 11 saturates the output of the discriminator, and passes through the limiter 12, which functions to remove the AM component of noise and the influence of the drift of the discriminator, to N.
13 (N=5, for example). Here, the N-way filter 13 passes a frequency of 1/N of the clock frequency 26 and a frequency of A/N (A is an integer), as is known. A low pass filter 1 is connected to the output of the N-way filter 13.
4 is inserted to convert the staircase wave to a waveform close to a sine wave. By the way, the tone signal frequency to be used can be made to correspond to the calling number as shown in the following table.

[Table] In this table, R is a repeat tone signal,
For example, when the calling number is 11256X, a tone signal sequence of 1R256X is sent. X is a tone signal for dual call identification, for example, the calling number is given to the subscriber.
When 11256X is assigned, the subscriber essentially has two calling numbers, depending on whether or not he receives tone number 6, X. The frequency allocation as shown in the table shows that the cutoff frequency of the first low-pass filter 14 is to pass 2010Hz and 459Hz.
It is designed to block a clock frequency of 459 x N = 459 x 5 = 2295 Hz. The output of the first low-pass filter 14 is supplied with a frequency A/N other than 1/N of the clock frequency 26 by a tone signal.
is an integer). In other words, when the N-way filter 13 is waiting for a desired tone signal, when a tone signal near an integral multiple of the tone signal frequency arrives, this tone signal passes through the N-way filter 13 as the desired tone signal. However, it is erroneously detected by the subsequent tone detector 17. Therefore, in order to attenuate the harmonic levels other than this desired frequency, the first low-pass filter 1 is used.
A second low-pass filter 15 is provided at the output of 4.
The second low-pass filter 15 is designed to change the passband for each tone signal in response to a control signal 27 from a tone specifying circuit 20, which will be described later. Cutoff frequency fcut of this low-pass filter 15
is set to a frequency less than twice the desired tone signal frequency. In the tone signal allocation as shown in the table above, the cutoff frequencies are changed by the control signal 27 for three sets of tone frequencies for the calling numbers "R", "0, 1" and "2, 3". Specifically, when the calling number is "R", this cutoff frequency is
Lower than twice 459Hz, for example, 720Hz, when the calling number is "0, 1", it is similarly set to 1050Hz, and when the calling number is "2, 3", it is set to 1600Hz. In addition,
As for the calling numbers "4~X", as is clear from the table above, the frequency corresponding to these numbers is 1164Hz.
Since tone signal frequencies close to integer multiples of ~2010 Hz are not used as calling numbers, there is no need to set a cutoff frequency, so the filter 15 is of an all-pass band type. Therefore, for example, if the tone signal series specified in advance as shown in FIG.
Alternatively, it is composed of the first to sixth tones, and the calling number is, for example, 01245 or 01245X. Here a, b and c are, for example, 33mS, 45mS and
It is assumed to be 210mS. For such a signal sequence,
The N-way filter 13 and the detector 17 are in a standby state at a clock (600×N=600×5=3000Hz) 26 corresponding to the first tone signal call number "0" frequency of 600Hz. In this standby state, the N-way filter 13 passes the tone signal frequency of 600 Hz and 600×A (A is an integer) Hz, so as shown in Figure 3, the tone signal near the untargeted 600×A Hz is also attenuated. It will pass. For example, considering a tone frequency of 600Hz (calling number "0") as shown in the figure, N-way filter 1
3 passes a tone frequency of 600Hz x A (A is an integer). Therefore, the corresponding tone frequency around 600×2=1200Hz is 1164Hz, (calling number “4”), 1305Hz
(Calling number "5"), these undesired frequencies pass through the N-way filter 13 and are detected by the subsequent detector 17, as if the desired 600Hz (calling number "0") had been detected. It works like this. Tone frequency 1728Hz around 600×3=1800Hz
(Calling number "8") 1869Hz (Calling number "9") The same thing is reported. As described above, depending on the tone signal frequency allocation, as described above, the N-way filter suffers from the disadvantages of the N-way filter. Therefore, in order to fundamentally improve such drawbacks, a second low-pass filter 15 is provided, and its cutoff frequency is set to 1050 Hz as described above by means of a control signal 27.
to pass the desired tone signal frequency of 600 Hz and remove undesired tone signals. Such a filter 15 allows only the desired 600 Hz tone signal to pass through. Note that the first and second low-pass filters may be combined into one low-pass filter. By the way, the output of the second low-pass filter 15 is passed through a waveform shaping circuit 16 (for example, composed of a window comparator with a level detection function) that has the function of converting a tone signal close to a sine wave into a rectangular wave, and then sent to a detector 17. is supplied to For example, if the detector 17 counts a predetermined clock 26 within a predetermined time and determines that the input tone signal is a desired tone signal, it supplies the signal to the control circuit 18 and the N-way filter 13. do. Of these, signal 3 supplied to N-way filter 13
2 is a signal that changes the bandwidth of the N-way filter and speeds up the fall time. Note that if the transmission time of one tone signal (for example, a and b in FIG. 2) is long, or if the tone signal level is high, this signal 32 may not be used. Control circuit 18 controls frequency designation circuit 19 according to the output of detector 17. Frequency specification circuit 1
9 is, for example, a transistor matrix type
PROM (Programmable Read-only-Memory)
Consists of. By turning on and off a diode connected to the base of this transistor, the line of the base of the transistor is connected to the line 24 for specifying the tone frequency of the control circuit 18 as a program. When this line 24 is set to a high potential, the contents of the transistors in that column are read out in parallel and this signal is output in binary code. Further, the tone designation circuit 20 inputs the binary output 25 of the frequency designation circuit 19 to the second low-pass filter 1.
This circuit includes means for converting the control signal 27 into a control signal 27 for determining the cutoff frequency of the tone signal 5, and means for processing the individual tone signal designation signal and supplying an output signal 29 to the variable frequency divider circuit 21. Details will be explained with reference to FIG. This variable frequency dividing circuit 21 is a tone specifying circuit 20.
The output signal 29 generates a signal 26 that sets the next tone signal frequency. Furthermore, when the time interval between the output of the detector 17 and the next output exceeds a predetermined time (for example, 45 mS), the control circuit 18 controls the setting of the tone signal frequency of the N-way filter 13 using a predetermined tone signal sequence. By setting the tone to the first tone and dividing the frequency of the timing output signal 28 of the variable frequency divider circuit 21,
This circuit has both the function of creating a desired periodic pulse and the function of supplying a sound and a signal 34 to the buffer circuit 23 when all predetermined tone signal sequences are received, and the details are explained in FIG. 5. do. The detection pulse from the detector 17 sent to the control circuit 18 increments an internal counter by one and switches the signal 24 to read out the code corresponding to the next predetermined tone signal frequency to be received.
Then, the contents of the frequency designation circuit 19 are read out.
controlling the tone specifying circuit 20 by the decimal code 25;
The output signal 29 sets the frequency division number of the variable frequency divider circuit 21. With this frequency division number, the crystal oscillator 2
Divide the frequency of 2 to obtain the desired clock frequency of 26
make. A timing output signal 28 is generated by dividing the frequency of the crystal oscillator 22 using a fixed frequency division ratio. The variable frequency divider circuit 21 and the crystal oscillator 22 constitute a clock signal generation circuit. The second low-pass filter 15 passes the second tone signal frequency of 741 Hz (calling number 1) to be received next, and changes the cutoff frequency by a control signal 27 so as to attenuate A times the component. Set the tone signal frequency to 1050Hz in the same way as the tone signal frequency of 600Hz in step 1. In addition, a clock corresponding to the desired tone frequency (741Hz) is created by the variable frequency divider circuit 21, and this clock is
The signal is sent to a filter 13 and a detector 17. Furthermore, the second low-pass filter 15 filters the third
The cutoff frequency is set to 1600 Hz by the control signal 27 so that the tone signal frequency of 882 Hz (calling number "2") is passed and the component A times that frequency is attenuated. In this way, when all of the predetermined signal sequences are detected, the output signal 34 of the control circuit 18 drives the speaker 30 through the buffer circuit (for example, composed of a transistor and a resistor) 23 having an amplification function. do. 33 is a battery. Next, FIG. 4 will be explained. FIG. 4 is a diagram showing the circuits 13, 14, 15 and 16 of FIG. 1 in detail. First, the N-way filter 13 shown in FIG. 4 is composed of a resistor 101, capacitors 102-106, switches 107-111, NOR gates 112-123, and flip-flops 124-126. Furthermore, gates 122 and 123 and flip-flops 124 to 126 constitute a quinary counter. One of the gates 117-121 controlling the output of the quinary counter by the clock frequency 26 goes high. Then gate 112
-116 to close any of the switches 107-111. This causes only one of the capacitors 102-106 connected to that switch to form a low pass filter with resistor 101. In this way, each capacitor forms a low-pass filter with the resistor 101 as the quinary counter changes. This N-way filter 13 selectively passes the output signal 50 of the limiter 12. This figure shows an N-way filter when N=5.
Frank etal's "An Alternative Approach to
the Realization of Network Transfer
"Function: The Npath Filter" BSTJ, September 1960, pp. 1321-1350 and William R. Harden
“Digital Filters with IC′s boost Q
“without inductors” Electronics, July 24, 1967
Published on pages 91-100. The center frequency fo of this bandpass filter is given by the clock fcp26, and the filter components (particularly resistor 101 and capacitors 102 to 106)
does not depend on That is, it is given by fo=fcp/N. Therefore, once the value of N is determined, the center frequency fo of the filter can be freely changed by changing fcp. However, since the N-way filter has predetermined rise and fall characteristics, when passing a plurality of tone signal sequences having different frequencies, it cannot normally pass a continuous rapid tone signal sequence in particular. To solve this problem, signal 32 is applied to gates 112 to 116 to detect a tone and forcibly open switches 107 to 111 to change the bandwidth and make the falling characteristic steeper. Tone signal sequences can be detected without any problem. Next, the first low-pass filter 14 has a resistor 1
27 and 128, capacitors 129 and 130, and an operational amplifier 131, forming an active filter. The second low-pass filter 15 is a resistor 13
2. Capacitors 133 to 135 and switch 13
It is composed of numbers 6 to 138. Among the control signals 27, the line corresponding to the desired standby tone becomes high level, and any of the switches 136 to 138 connected to that high level opens, and the capacitors 133 to 135 and the resistor 132 connected to that switch are opened. A low-pass filter 15 is formed by the above, and desired filter characteristics are obtained. More specifically, the calling numbers “R”, “0, 1” and “2,
3”, switch 13.
6, 137 and 138 are controlled to open, respectively, and the cut-off frequency is set to 720 as described above.
Hz, 1050Hz and 1600Hz, the values of capacitors 133 to 135 and 132 are set. If you are waiting for a call number "4~X", open all switches 136~138 and turn on filter 1.
5 is controlled so that it covers the entire passband. The waveform shaping circuit 16 includes resistors 139 to 141 and an operational amplifier 142 forming a window comparator. Note that an ordinary voltage comparator can also be used for the circuit 16. The tone detector 17 is a "tone signal detector" filed by the present inventors on November 26, 1975.
(Japanese patent application 51-141860) or US
P3670242 (Inventor MacGawey / Applicant Iear
Slegler, Inc.) tone detection circuit 32 or the like. The control circuit 18 in FIG.
3. It is composed of a counter 144 and a gate circuit 146, and receives the signal 28 from the variable frequency dividing circuit 21.
is supplied to the timing circuit 143. The output 147 of the tone detector 17 is connected to the control circuit 18
When input to , the counter 144 is advanced by one,
The first signal of the preset signal series is switched to the second signal, and at the same time, the timing circuit 143 is reset to obtain the above-mentioned 45 mS timing. In this way, the counter 144 is sequentially advanced together with the output signal 147, and when all predetermined tones are detected, this is transmitted to the gate circuit 146, and the signal 149 from the timing circuit 143 is used to create, for example, a sound cycle. The signal is supplied to the buffer circuit 23 through a signal line 34.
However, if the counter 144 waits for a certain period of time (for example, 45 m
S), and if there is no next input, the counter 144 is reset through the OR gate 145 at the output 150 of the timing circuit 143, and the standby tone is set to the state of the first tone signal. . Next, the tone designation circuit 20 shown in FIG. 6 will be explained. From the output signal 25 of the frequency specifying circuit 19 and the output signals of the inverters 152 to 155, the above-mentioned call numbers "R", "0", "1", ...... “9”,
Obtain the output corresponding to “X”. Based on the output corresponding to each tone, a control signal 27 for the second low-pass filter 15 can be generated, for example, as shown in the figure. That is, the filter 15 is controlled by dividing into four groups: calling number R, calling numbers 0 and 1, calling numbers 2 and 3, and calling numbers 4 to 9 and X. Similarly, the control signal 35 of the tone detector 17 also has five
It can be made with NAND gates 170-174. Further, the control signal 29 of the variable frequency divider circuit 21 is transmitted to nine NAND gates 175 (equal to the number of stages of flips and flops constituting the variable frequency divider circuit) based on the 12 operation lines corresponding to each tone signal. ~18
It can be made with 3 configurations. As is clear from the above description, the tone signal detection circuit of the present invention has the following advantages. In other words, since an N-way filter is used, the center frequency of the filter does not depend on the values of the resistors and capacitors that make up the N-way filter, so it is possible to achieve high precision without using expensive resistance capacitors. good. Further, by using the second low-pass filter in combination, noise other than the desired tone signal can be removed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a selective signaling receiver using the tone signal detection circuit of the present invention, FIG. 2 is a tone signal sequence used in the tone signal detection circuit of the present invention, and FIG. 3 is signal attenuation in an N-way filter. A diagram showing an example of characteristics, FIG. 4 is a more specific circuit example of the N-way filter and low frequency filter in FIG. 1, and FIG. 5 is a more specific block diagram example of the control circuit in FIG. 1. FIG. 6 shows a specific circuit example of the tone specifying circuit shown in FIG. In the figure, 10...Antenna, 11...Receiver, 12...Limiter, 13...N-way filter,
14, 15...Low pass filter, 16...Waveform shaping circuit, 17...Detector, 18...Control circuit,
19... Frequency specification circuit, 20... Tone specification circuit, 21... Variable frequency division circuit, 22... Crystal oscillator, 23... Buffer circuit, 30... Speaker,
33...I'm exhausted.

Claims (1)

[Claims] 1. In a frequency-switchable tone signal detection circuit that sequentially receives and passes a plurality of tone signals, a plurality of tone signals having a frequency N times the frequency of the plurality of tone signals (N is an integer of 2 or more) is provided. a clock signal generating circuit that selects and outputs one of the clock signals according to a first control signal; a resistor that receives the tone signal at one end; and an N circuit connected to the other end of the resistor; an N-way filter for selecting the tone signal, comprising: N capacitors; and a switch connected in series to each of the N capacitors and sequentially opened and closed cyclically in response to the clock signal;
a low-pass filter that is connected to the output of the N-way filter and removes harmonics of the tone signal by changing the cutoff frequency according to a second control signal; A detector that generates a detection signal in response to each of the signals; and a circuit that is connected to the detector and generates the first and second control signals in response to the detection signal. Tone signal detection circuit. 2. The clock signal generation circuit includes a signal generator and a variable frequency divider circuit that variably divides the output of the signal generator according to the first control signal to generate the clock signal. A tone signal detection circuit according to claim 1, characterized in that: 3. The low-pass filter includes a resistor having one end supplied with the output of the N-way filter, a plurality of capacitors connected to the other end of the resistor, and a second resistor connected to each of the plurality of capacitors. 2. The tone signal detection circuit according to claim 1, further comprising a switch selectively opened and closed by a control signal. 4. In a frequency-switchable tone signal detection circuit that sequentially receives and passes a plurality of tone signals, one of the plurality of clock signals having a frequency N times the frequency of the plurality of tone signals (N is an integer of 2 or more). a clock signal generating circuit that selects and outputs one of the tone signals according to a first control signal; a resistor that receives the tone signal at one end; N capacitors connected to the other end of the resistor; an N-way filter for selecting the tone signal, comprising a switch connected in series to each of the N capacitors and cyclically opened and closed sequentially by the clock signal;
a low-pass filter that is connected to the output of the N-way filter and removes harmonics of the tone signal by changing the cutoff frequency according to a second control signal; a detector that generates a detection signal in response to each of the signals; a circuit connected to the detector that generates the first and second control signals in response to the detection signal; 1. A tone signal detection circuit comprising: 5. The clock signal generation circuit includes a signal generator and a variable frequency divider circuit that variably divides the output of the signal generator according to the first control signal to generate the clock signal. The tone signal detection circuit according to claim 4, characterized by: 6. The low-pass filter includes a resistor having one end supplied with the output of the N-way filter, a plurality of capacitors connected to the other end of the resistor, and a second resistor connected to each of the plurality of capacitors. 5. The tone signal detection circuit according to claim 4, further comprising a switch selectively opened and closed by a control signal.