JPS62126444A - Failure diagnosing system - Google Patents

Failure diagnosing system

Info

Publication number
JPS62126444A
JPS62126444A JP60265049A JP26504985A JPS62126444A JP S62126444 A JPS62126444 A JP S62126444A JP 60265049 A JP60265049 A JP 60265049A JP 26504985 A JP26504985 A JP 26504985A JP S62126444 A JPS62126444 A JP S62126444A
Authority
JP
Japan
Prior art keywords
failure
circuit
fault
fault diagnosis
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60265049A
Other languages
Japanese (ja)
Inventor
Koshu Narihara
成原 弘修
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP60265049A priority Critical patent/JPS62126444A/en
Publication of JPS62126444A publication Critical patent/JPS62126444A/en
Pending legal-status Critical Current

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  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To check and evaluate the operation, processing, etc., of a failure diagnosing means by outputting a failure signal intensionally under an optional condition even during the operation of an object to be diagnosed. CONSTITUTION:When a switching signal is inputted under control by an external hardware or a microprogram, a switching circuit 5 is driven and an output signal from a simulative failure generating circuit 4 is inputted to a failure diagnosing circuit 1 in stead of the output of the object 2 to be diagnosed to diagnose the intentionally generated failure signal in the failure diagnosing circuit 1. Namely, an output signal 3 deciding the generation of a failure as the result of diagnosis is outputted, that the operation or processing of a failure diagnosing circuit 1 is normal can be decided. In such a case, a simulative failure generating circuit 4 capable of the simulation of various failures is prepared in addition to he factors of all failures to be generated in the object 2 to be diagnosed and respective failure signals are selected and inputted to he circuit 1, so that the normality or abnormality of the failure of the circuit 1 to respective failure signals can be highly accurately decided.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は故障診断対象を故障診断する故障診断システ
ムに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a fault diagnosis system for diagnosing a fault diagnosis target.

〔従来の技術〕[Conventional technology]

第2図は従来の故障診断システムのブロック接続図であ
り、図において、1は故障診断手段としての故障診断回
路、2はこの故障診断手段1により故障診断を受ける故
障診断対象であり、これがソフトウェアあるいはハード
ウェアとして構成されている。また、上記故障診断対象
は例えば各種制御機械等のディジタル制御回路として構
成され、あらゆるディジタル制御装置内に設けられて用
いられる。
FIG. 2 is a block connection diagram of a conventional fault diagnosis system. In the figure, 1 is a fault diagnosis circuit as a fault diagnosis means, 2 is a fault diagnosis target to be diagnosed by this fault diagnosis means 1, and this is a software Or it is configured as hardware. Further, the above-mentioned failure diagnosis target is configured as a digital control circuit of various control machines, for example, and is installed and used in any digital control device.

次に動作について説明する。Next, the operation will be explained.

上記故障診断システムでは、故障診断回路1が故障診断
対象2を常に監視しておシ、正常時には正常出力を、故
障時には故障出力を出力する。なお、ディジタル制御装
置として構成された故障診断対象2は制御動作中におい
ては、通常、正常であり、それを監視している故障診断
回路1は、正常出力を出力している。
In the above fault diagnosis system, the fault diagnosis circuit 1 constantly monitors the fault diagnosis target 2 and outputs a normal output when it is normal and a fault output when it is in failure. The failure diagnosis target 2 configured as a digital control device is normally normal during control operation, and the failure diagnosis circuit 1 monitoring it outputs a normal output.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

従来の故障診断システムは以上のように構成されている
ので、故障診断対象1の制御動作中に、この故障診断対
象1のソフトウェアやハードウェアに故障が発生したと
き、上記故障診断回路2が正常に動作しているか否かを
確認する場合に、試験段階で故障診断対象2に頻繁に故
障を発生させる必要があるが、上記制御動作中に任意の
条件。
Since the conventional failure diagnosis system is configured as described above, when a failure occurs in the software or hardware of the failure diagnosis target 1 during the control operation of the failure diagnosis target 1, the failure diagnosis circuit 2 is normally operated. When confirming whether or not the control is operating properly, it is necessary to cause failures to occur frequently in the failure diagnosis target 2 during the test stage, but under any conditions during the above control operation.

任意のタイミングで故障状況を作ることは極めて困難で
あシ、上記故障診断回路2の動作確認を高精度に行った
シ評価を常に正しく下したシすることができないなどの
問題点があった。
It is extremely difficult to create a failure situation at an arbitrary timing, and there are problems in that it is not always possible to accurately evaluate the operation of the failure diagnosis circuit 2 by checking its operation with high accuracy.

この発明は上記のような問題点を解消するためになされ
たもので、故障診断対象の動作中でも、意図的に任意の
条件のもとて故障信号を出力させて、故障診断手段の動
作、処理などの確認および評価をすることができる故障
診断システムを得ることを目的とする。
This invention was made in order to solve the above-mentioned problems, and is designed to intentionally output a fault signal under arbitrary conditions even during the operation of the fault diagnosis target, thereby controlling the operation and processing of the fault diagnosis means. The purpose is to obtain a failure diagnosis system that can confirm and evaluate the following.

〔問題点を解決するための手段〕[Means for solving problems]

この発明にかかる故障診断システムは、切換回路によシ
擬似故障発生回路の出力を、故障診断対象の出力に代え
て故障診断手段に入力できるように構成したものである
The fault diagnosis system according to the present invention is configured such that the output of the pseudo fault generation circuit can be input to the fault diagnosis means in place of the output of the fault diagnosis target using the switching circuit.

〔作 用〕 この発明における切換回路は、外部から入力した切換信
号によって、故障診断対象または擬似故障発生回路の各
出力を選択して、故障診断手段に入力するように作用し
、擬似故障発生回路は意図的に任意の条件で故障信号を
出力し、この故障信号を上記切換回路を介して故障診断
手段に入力することによシ、この故障診断手段が正常に
動作しているか否かの確認あるいは評価をできるように
する。
[Operation] The switching circuit according to the present invention operates to select each output of the fault diagnosis target or the pseudo-fault generating circuit according to a switching signal inputted from the outside and inputting the selected output to the fault diagnosing means. By intentionally outputting a fault signal under arbitrary conditions and inputting this fault signal to the fault diagnosing means through the switching circuit, it is possible to check whether or not this fault diagnosing means is operating normally. Or make it possible to evaluate.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する0 第1図において、1は故障診断手段としての故障診断回
路、2は故障診断回路1の故障診断を受ける故障診断対
象、3は上記故障診断回路1の出力、4は意図的に故障
信号を出力する擬似故障発生回路、5は切替回路、6は
外部からの設定による切替回路5の切替信号である。
Hereinafter, one embodiment of the present invention will be described with reference to the drawings. In FIG. 1, 1 is a fault diagnosis circuit as a fault diagnosis means, 2 is a fault diagnosis target to be diagnosed by the fault diagnosis circuit 1, and 3 is the fault diagnosis described above. The output of the circuit 1, 4 is a pseudo-fault generating circuit that intentionally outputs a fault signal, 5 is a switching circuit, and 6 is a switching signal of the switching circuit 5 set from the outside.

次に動作について説明する。まず、外部からの切替信号
が切換回路5に入力されるまでは、従来技術の場合と同
様に、故障診断回路1が故障診断対象2を常に監視して
いる。
Next, the operation will be explained. First, until a switching signal from the outside is input to the switching circuit 5, the fault diagnosis circuit 1 constantly monitors the fault diagnosis target 2, as in the case of the prior art.

ここで外部からのハードウェアまたはマイクロプログラ
ムによる制御で切替信号が入力されると、切替回路5が
動作し、擬似故障発生回路5の出力信号を、故障診断対
象の出力に代えて故障診断回路1に入力し、意図的に発
生した故障信号をその故障診断回路1において診断する
。すなわち、この診断結果が故障であるという判断の出
力信号3である場合には、この故障診断回路1の動作や
処理が正常であると判断できることになる。
Here, when a switching signal is input under the control of external hardware or a microprogram, the switching circuit 5 operates and replaces the output signal of the pseudo fault generation circuit 5 with the output of the fault diagnosis target to the fault diagnosis circuit 5. A fault signal generated intentionally is diagnosed in the fault diagnosis circuit 1. That is, if the diagnosis result is the output signal 3 indicating a failure, it can be determined that the operation and processing of the failure diagnosis circuit 1 are normal.

この場合において、故障診断対象2の考えられる限シの
故障要因に合わせて、種々の故障を擬似できる擬似故障
発生回路4を用意し、これらの各故障信号を選択して故
障診断回路1に入力するようにすれば、各故障信号に対
する故障診断回路1の応答の正常、異常を高精度に判定
することができる。
In this case, a simulated fault generation circuit 4 capable of simulating various faults is prepared according to a limited number of possible fault causes of the fault diagnosis target 2, and each of these fault signals is selected and input to the fault diagnosis circuit 1. By doing so, it is possible to determine with high precision whether the response of the failure diagnosis circuit 1 to each failure signal is normal or abnormal.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明によれば、切換回路によって擬
似故障発生回路の出力を、故障診断対象の出力に代えて
故障診断手段に入力するように構成したので、故障診断
対象が本来の制御動作を実行しているときでも、擬似故
障発生回路からの故障信号を用いて、故障診断回路の動
作状態、処理状態の動作の確認または評価を容易にしか
も正確に行えるものが得られる効果がある。
As described above, according to the present invention, the switching circuit is configured to input the output of the pseudo-fault generating circuit to the fault diagnosing means instead of the output of the fault diagnosis target, so that the fault diagnosis target does not perform the original control operation. The present invention has the advantage that even when executing the fault diagnosis circuit, the operating state and processing state of the fault diagnosis circuit can be easily and accurately confirmed or evaluated using the fault signal from the pseudo fault generating circuit.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例による故障診断システムの
ブロック接続図、第2図は従来の故障診断システムのブ
ロック接続図である。 1は故障診断手段、2は故障診断対象、4は擬似故障発
生回路、5は切替回路。 なお、図中、同一符号は同一または和尚部分を示す。
FIG. 1 is a block connection diagram of a fault diagnosis system according to an embodiment of the present invention, and FIG. 2 is a block connection diagram of a conventional fault diagnosis system. 1 is a fault diagnosis means, 2 is a fault diagnosis target, 4 is a pseudo fault generation circuit, and 5 is a switching circuit. In addition, in the figures, the same reference numerals indicate the same or similar parts.

Claims (1)

【特許請求の範囲】[Claims] 故障診断対象を故障診断手段によつて常時監視する故障
診断システムにおいて、擬似故障信号を発生する擬似故
障発生回路およびこの擬似故障発生回路の出力を上記故
障診断対象の出力に代えて上記故障診断手段に選択的に
入力する切換回路を備えたことを特徴とする故障診断シ
ステム。
In a fault diagnosis system in which a fault diagnosis target is constantly monitored by a fault diagnosis means, the fault diagnosis means includes a pseudo fault generation circuit that generates a pseudo fault signal and an output of the pseudo fault generation circuit in place of the output of the fault diagnosis target. A fault diagnosis system characterized by comprising a switching circuit that selectively inputs input to the system.
JP60265049A 1985-11-27 1985-11-27 Failure diagnosing system Pending JPS62126444A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60265049A JPS62126444A (en) 1985-11-27 1985-11-27 Failure diagnosing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60265049A JPS62126444A (en) 1985-11-27 1985-11-27 Failure diagnosing system

Publications (1)

Publication Number Publication Date
JPS62126444A true JPS62126444A (en) 1987-06-08

Family

ID=17411870

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60265049A Pending JPS62126444A (en) 1985-11-27 1985-11-27 Failure diagnosing system

Country Status (1)

Country Link
JP (1) JPS62126444A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01130232A (en) * 1987-11-16 1989-05-23 Nec Corp Microcomputer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01130232A (en) * 1987-11-16 1989-05-23 Nec Corp Microcomputer

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