JPS62125728A - Clock transmission type synchronizing data transmission equipment - Google Patents

Abstract

PURPOSE:To avoid the generation of a slip even between independent synchronizing networks by sampling and sending a data signal after the signal is converted into a biphase code and the clock frequency component is included in the data so as to allow the reception side to recover a clock. CONSTITUTION:In applying data communication between networks 1 and 2, the network 1 is operated by a clock f1 and the network 2 is operated by a clock f2 according to the independent synchronization. The network 2 shows the case with a time division electronic exchange, for example, a caption 3 is a time division switch, a caption 2 is a gate way device, a caption 4 is a data adaptor and a caption 5 is a data terminal equipment. The data from the network 1 includes a clock frequency component of the network 1 by applying biphase code conversion to the data at the gate way device 2, the result is fed to the data adaptor 4 through a time division switch 3, the data and clock are recovered and transferred to the data terminal equipment 5. Thus, the clock frequency component of the network 1 is sent to the data terminal equipment so as to build a clock transmission type system as if the data terminal equipment 5 were accommodated directly in the network 1.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a synchronous data transmission system between independent synchronous networks, and in particular to a data terminal housed in a time division electronic exchange and a data terminal not synchronized with the electronic exchange. The present invention relates to a device for communicating synchronous data with data devices accommodated in a network.

[Conventional technology]

Conventionally, when connections between networks cannot be synchronized with each other, an independent synchronization method in which a high-precision oscillator is installed in each network, or a staff synchronization method is used.

[Problem that the invention seeks to solve]

However, in the independent synchronization method described above, slips occur depending on the accuracy and deviation of the oscillators installed in each network.

To reduce the frequency of slips, it is necessary to improve the accuracy of the oscillator, but high-precision oscillators made of cesium, rubidium, etc. are extremely expensive and have the disadvantage of having a short lifespan.

Further, the stuff synchronization method requires a complicated circuit.

When synchronous data transmission is performed between networks that are not synchronized, the present invention converts the data signal from the other network into a bi-phase code to include synchronization information and transmit it within the network. An object of the present invention is to provide a clock-transparent data transmission device that can reproduce the clock of a network in which a transmitting terminal is accommodated from received data.

[Means for solving problems]

The present invention provides a device for transmitting synchronized data between data devices housed in a network in which slave synchronization cannot be achieved with each other, comprising a data adapter and a dartway device provided at an inter-network connection part, The gateway device includes a bi-phase code converter that converts the received data bits into a bi-phase code consisting of a combination of O's and 1's, and samples the converted signal using an internal clock that is several times the transmission data speed. , a sampling circuit that transmits the sampling value within a network, and a data adapter, a waveform reproducing circuit that reproduces a data signal from the sampling value, and a synchronous timing extraction circuit that extracts synchronous timing element information from the data signal; The present invention is a clock-transparent type synchronous data transmission device characterized by comprising a bi-phase inverse converter that reproduces an original data signal by bi-phase inverse converting the data signal.

〔Example〕

Next, an embodiment of the present invention will be described with reference to the drawings.

FIGS. 1 and 2 are system configuration diagrams showing the concept of the present invention.

In FIG. 1, when performing data communication between network 1 and network 2, network 1 uses clock f1, and network 2 uses clock f1.
It operates with two independent synchronizations. As an example, the network 2 is a time division electronic exchange, and 3 is a time division switch, 2 is a dartway device, 4 is a data adapter, and 5 is a data terminal.

The data from the network 1 is included in the gateway device 2 by bi-phase code conversion of the data, and is sent to the data adapter 4 through the time division switch 3, where the data and clock are regenerated.
The data is transferred to the data terminal 5. As a result, the clock frequency component of the network 1 is transmitted to the data terminal 5, and as shown in FIG. 2, it is as if the data terminal 5 is directly accommodated in the network 1, thereby constructing a lock-transparent system. becomes possible.

FIG. 3 is a functional block diagram showing an embodiment of the present invention, in which 2 represents a gateway device and 4 represents a data adapter. Although this shows data transmission in the direction from network 1 to data terminal 5, in reality, data transmission in the direction from data terminal 5 to network 1 can be realized in the same way.

That is, the present invention provides a device for transmitting synchronous data between data devices housed in a network in which slave synchronization cannot be achieved with each other, by using a data adapter 4 and a gateway device 2 provided at an inter-network connection section. and a bi-phase code 0 converter 7 for converting the received data bits into a bi-phase code by a combination of O and 1.
and a sampling circuit 8 that samples the converted signal with an internal network clock several times the transmission data speed and transmits the sampling value within the network, and sends the sampling value and the data signal to the data adapter 4. A waveform reproducing circuit 9 for reproducing, a synchronous timing extraction circuit 11 for extracting synchronous timing element information from the data signal, and a bi-phase inverse converter 10 for reproducing the original data signal by inversely converting the data signal in bi-phase. It is equipped with the following.

The data signal from the independent network 1 shown in FIG. 1(a) K is converted into a bi-phase code shown in FIG.
Convert 01.1 to 10. This is done in order to prevent the data from continuing to be 0 or 1 in order to reproduce the clock frequency component from the data in the gateway device 2.

The sampling circuit 8 uses a clock several times the transmission data speed/f ring (Figure 4 (C)).
, its sampling value (transmission data in Figure 1 (d))
is transferred to the data adapter 4 through the time division switch 3.

By selecting an appropriate sampling frequency, it is possible to transfer data while suppressing data waveform distortion.

In the data adapter 4, a waveform reproduction circuit 9 reproduces the waveform from the sampled values sent through the time division switch 3.

The reproduced waveform has been biphase code converted,
This includes a clock frequency component, and the synchronization timing extraction circuit 11 reproduces the clock (see Fig. 4).
e)).

Finally, the original data without the biphase code conversion part is reproduced (FIG. 4(f)) and sent to the data terminal 5.

〔Effect of the invention〕

As explained above, the present invention converts the data signal into a bi-phase code in the connection between independent synchronous networks, includes the clock frequency component in the data, and then samples and transmits the data, so that the clock can be regenerated on the receiving side. This has the effect of allowing clock-transparent synchronous data transmission without slips or slips even between independent synchronous networks.

[Brief explanation of drawings]

1 and 2 are system configuration diagrams showing the concept of the present invention,
Fig. 3 is a functional block diagram in an embodiment of the present invention;
The figure is a diagram showing waveforms of various parts in FIG. 3. 1...Independent network 1.2...Dartway device, 3...
・Time division switch, 4...Data adapter, 5...
Data terminal, 7... Biphase code converter, 8.
...Sampling circuit, 9...Waveform reproduction circuit, 10.
...Biphase code inverse conversion unit, 11...Synchronization timing extraction circuit m-net 2--Ha ``Yuzu 1--Ha field 1 Fig. 3

Claims (1)

[Claims] (1) A device that transmits synchronous data between data devices accommodated in an independent network in which subordinate synchronization cannot be achieved, which includes a data adapter and a gateway device provided at the inter-network connection section, and the gateway device has a A bi-phase code converter converts received data bits into a bi-phase code consisting of a combination of 0 and 1, samples the signal converted to the bi-phase code using an internal clock that is several times the transmission data speed, and converts the sampled value into a bi-phase code. The data adapter is equipped with a sampling circuit for transmission within the network, and
A waveform reproduction circuit that reproduces a data signal from a sampling value, a synchronous timing extraction circuit that extracts synchronous timing element information from the data signal, and a biphase inverse conversion that reproduces the original data signal by inverting the data signal. What is claimed is: 1. A clock-transparent synchronous data transmission device comprising: