JPS62123517A - Control system for power supply - Google Patents

Abstract

PURPOSE:To obtain a power supply control interface corresponding to a small- scale system by using three common signal lines, a connection signal line and two switches to control a power supply interface set between processors. CONSTITUTION:When the power supply of a main controller is applied, the application instructing signal is sent to a connection adaptor 2-1 concurrently with the rise of a shared power supply Vcc. Receiving this signal, the adaptor 2-1 applies the power supply of a device to be controlled. Then the power supply application end signal is sent back from the device to be controlled. Thus the adaptor 2-1 turns off and on the transistors Tr1 and Tr2 respectively. The common part of a switch SW2 is connected to the Tr2 and therefore it is decided that the device to be controlled which must be applied to a lower stage still exists as long as the switch SW2 is connected to the side (a). Then the application instructing signal is transmitted to the lower stage and it is known that all power supplies are applied when the SW2 is connected to the side (b). Then the application end information signal is sent back to the main controller. Thus the main controller starts a system operation.

Description

[Detailed Description of the Invention] [Summary] In a power supply interface that connects information processing devices, the power supply interface between the processing devices is controlled using three common signals, one potato-grip connection signal, and two switches. This is a power supply control method.

C. Industrial Application Field] The present invention relates to a power supply control device for a relatively small-scale information processing system (such as a personal computer), and the present invention provides a power supply control device for a relatively small-scale information processing system (personal computer, etc.), and provides a systematic system by adding a simple connection adapter to each processing device that makes up the system. This makes it possible to control the power supply of the system.

[Conventional technology and problems]

When constructing an information processing system, systematic power supply/
Cutting and abnormal handling are important issues.

For example, for minicomputers, large general-purpose computers, etc., power on/off as a system has been established for a long time, and many companies have their own interfaces. However, these interface methods are mainly based on ideas derived from large-scale systems, and in most cases the power supply sequence is centrally managed by one control device, so they are not suitable for small-scale systems. In addition, in small-scale systems such as personal computers that are currently being produced, a stand-alone concept is the mainstream, and it is normal that there is no power control interface.

[Purpose of the invention]

The present invention is based on the above considerations and aims to provide a power control interface compatible with small-scale systems.

[Means to achieve the purpose]

Therefore, the power supply control method of the present invention includes a main control device, a controlled device, a connection adapter externally attached to or built in the controlled device, and a DC voltage is supplied from the main control device to the connection adapter. an emergency power-off/ground signal line for supplying an emergency power-off/ground signal from the main control device to the connection adapter; A charging completion notification signal line for notification, and a charging instruction signal line provided between the main control device and the first connection adapter and between adjacent connection adapters,
Each connection adapter has a first switch, a second switch, and a signal processing circuit, and the common part of the first switch is connected to the input instruction signal line from the previous connection adapter. The a side of the switch is connected to the signal processing circuit, the b side of the first switch is connected to a signal line for sending a turn-on instruction signal to the corresponding controlled device, and the common part of the second switch is connected to the signal processing circuit. The a side of the second switch is connected to the output of the signal processing circuit, the a side of the second switch is connected to the input instruction signal line to the next stage connection adapter, and the b side of the second switch
The device is characterized in that the side is connected to the power-on completion notification signal line, and the signal processing circuit is configured to output a signal of a predetermined value when power-on of the corresponding controlled device is completed. be.

[Embodiments of the invention] Hereinafter, the present invention will be explained with reference to the drawings.

FIG. 1 is a diagram showing an example of the overall configuration of a system to which the present invention is applied. In Figure 1, ■ is the main controller, 2
-1 to 2-n are connection adapters, 3-1 to 3-n
indicate controlled devices, respectively. The main controller 1 is, for example, a main processor, and the controlled devices 3-1 to 3-n are, for example, I10 devices or channels. The main controller 1 and the connection adapters 3-1 to 3-n are electrically connected by three common lines and one Daisy connection line. Each connection adapter has the same configuration. VCC is a DC power supply used by the connection adapters 2-1 to 2-n, and is output from the main controller 1. Next, the EPO/GND signal is a signal ground line common to connection adapters like VCC, and is used as an emergency power-off switch EPO in the main controller 1.
-5W (see Figure 3) is connected to ground unless it is in the make state. When the emergency power-off switch EPO-SW closes, the Epo/GNDf word goes into the open (r!, break) state, which causes the signal ground line of the controlled device 3-1 to 3-n to become high impedance. Therefore, it operates as an emergency power-off signal. The power-on completion notification signal serves as a power-on operation completion signal for the entire system. The input instruction signal is configured to be connected between each controlled device by a daisy chain connection.

Connection adapter 2-1 (however, i is 1.2..., n)
A signal ground line, a controlled device input instruction signal line, a disconnection request signal line, and a controlled device input completion signal line are provided between the controlled device 3-i and the corresponding controlled device 3-i. As the disconnection request signal, an alarm signal possessed by a normal information processing device can be used.
As the controlled device input completion signal, a ready signal possessed by a normal information processing device can be used.

FIG. 2 is a diagram showing the other side of the overall system configuration to which the present invention is applied. In the example of FIG. 2, a connection adapter 2-i exists in a controlled device 3-i.

FIG. 3 is a diagram showing an example of the configuration of a power supply control section within the main control device. In FIG. 3, 4 is a power supply control unit in the main controller 1, 5 is a power-on signal sending circuit, 6 is a system ready sending path, EPO-5- is an emergency power-off switch, TrO is a transistor, and RLI indicates a relay, and rll indicates a relay contact, respectively. When VCC exceeds a predetermined voltage value, the closing signal sending circuit 5 outputs a closing instruction signal. When the ready signal in the main controller 1 becomes active and the input completion notification signal reaches a predetermined value, the system ready sending circuit 6 makes the system ready signal active. When the system ready signal becomes active, system operation begins. When the emergency power-off switch EPO-5W is closed, the transistor Tr
O turns on, relay RLI is driven, and relay contact rl
l is closed.

FIG. 4 is a diagram showing an example of the configuration of a connection adapter. In addition, connection adapter 2-1.2-2. ..., 2-n all have the same configuration. In FIG. 4, 7 is a latch circuit, 5IL4i and SW2 are switches, and Tri to Tr.
3 represents a transistor, R represents a resistor, and C represents a capacitor. When the switch 1 is turned to side b, the input instruction signal on the IN side is sent as is to the controlled device 3-1.

When the power-on instruction signal becomes L level (ground level), the power supply section of the controlled device 3-1 powers on. When the power-on of the controlled devices 3 to 1 is completed, the controlled device power-on completion signal becomes L level, the base potential of the transistor Tri also becomes L level, and the transistor Tri is turned off.
Transistor Tr2 is turned on. When the transistor Tr2 is turned on, the electric charge of the capacitor C is discharged, and with the switch SW2 turned to the a side, the input instruction signal on the OUT side becomes L level.

If no controlled device is connected to the connection adapter 2-1, the switch bowl 1 is tilted to the side a. Switch lung 1 is a
Under the state where the switch SW2 is pushed to the side, when the input instruction signal on the IN side goes to L level, the transistor Trl is turned on and the transistor Tr2 is turned off. The input instruction signal becomes L level.

When the disconnection request signal goes to L level, the output of launch circuit 7 goes to H level, transistor Tr3 is turned on, and both ends of capacitor C are short-circuited. For example, controlled device 3
-1 is turned off, the controlled device closing completion signal becomes open, but if the disconnection request signal is set to L level before that, the closing instruction signal on the OUT side may become H level. do not have.

In the last connection adapter 3-n, switch SW2
is tilted to side b. Therefore, all controlled devices 3-
When the power-on of devices 1 to 3-n is completed, the power-on completion notification signal becomes L level.

FIG. 4 (bl is a diagram showing the timing of the latch circuit. The controlled device closing completion signal is applied to the resent input terminal R of the latch circuit 7, and the disconnection request signal is applied to the set input terminal S of the latch circuit 7. Ru.

First of all, the subject? When the il device input completion signal goes low, the output of the latch circuit 7 goes low. Next, when the disconnection request signal goes to L level, the state of latch circuit 7 is inverted and its output goes to H level.

Next, the operation of the system will be explained. When the power of the main controller 1 is turned on, the shared power 1) 1i Vcc generated in the main controller 1 is turned on, and the connection adapter 2-
DC voltage is supplied from 1 to 2-n to enable operation. Next, the turn-on instruction signal is the shared power supply ■. Simultaneously with the rise of , the closing signal sending circuit 5 (when the closing instruction is active, the potential becomes 0 in the make state).

) and notifies the connection adapter 2-1 of the input instruction. The connection adapter 2-1 receives the power-on instruction signal and powers on the controlled device 3-1. When the power source unit of the controlled device 3-1 completes power-on, it sends a controlled device power-on completion signal back to the connection adapter 2-1. Connection adapter 2
-1 is a transistor Tr by the controlled device closing completion signal.
i is turned off and the transistor Tr2 is turned on. The common part of the switch SW2 is connected to the transistor Tr2, and if the switch SW2 is connected to the a side, it is determined that there is still a controlled device that must be connected to the lower level, and the input instruction signal is passed to the lower level. . switch SW2
If it is connected to the b side, it indicates that all the power supplies have been turned on, and this is sent back to the main controller 1 as a power-on completion notification signal. The main controller 1 determines that the entire system is ready for operation when the input completion notification signal becomes active, and sends out a system ready signal. This system ready signal completes system startup and starts system operation.

The disconnection request signal and latch circuit 7 are used to locally power off each controlled device during system operation. The initial state of the latch circuit 7 is reset by the controlled device closing completion signal, and keeps the transistor Tr3 in an off state. When it becomes necessary to disconnect the controlled device 3-1, the controlled device 3-1 sends a disconnection request signal to the connection adapter 2-1 while the controlled device insertion completion signal is in the active state. The connection adapter 2-1 receives the disconnection request signal, inverts the latch circuit 7, and turns on the transistor Tr3. next,
The controlled device turn-on completion signal becomes non-active when the power to the controlled device 3-1 is turned off, and thereafter, even if the disconnection request signal becomes non-active, the latch circuit 7 continues to turn on the transistor Tr3. Therefore,
Even though the transistor Tr2 is turned off due to the controlled device closing completion signal from the controlled device 3-1 becoming non-active, the transistor Tr3 is turned on, so the main control does not send out the disconnection request signal. The device and other controlled devices can be kept in the on state, and only the power of the controlled device 3-1 that has sent the disconnection request signal can be turned off.

〔Effect of the invention〕

As is clear from the above description, according to the present invention, signals that are generally output from the power supply of a conventional stand-alone processing device, such as a ready signal (used as a signal for completion of turning on a controlled device) and an alarm. The signal (used as a disconnection request signal) can be used to create a power control interface for the entire system.

[Brief explanation of drawings]

Figure 1 is a diagram showing one example of the configuration of the entire system to which the present invention is applied, Figure 2 is a diagram showing the other side of the configuration of the entire system to which the present invention is applied, and Figure 3 is the interior of the main controller. FIG. 4 is a diagram showing an example of the configuration of the power supply control section of FIG. 4, and FIG. 4 is a diagram showing an example of the configuration of the connection adapter. DESCRIPTION OF SYMBOLS 1... Main control device, 2-1 to 2-n... Connection adapter, 3-1 to 3-n... Controlled device, 4... Power control unit in main control device l, 5... Input signal sending out path, 6... System ready sending circuit, EPO-5-
...Emergency power-off switch, TrO...transistor, RLI...relay, rll...relay contact, 7...latch circuit, SWI or SW3...switch, Tri and Tr2...transistor ,R...
Resistance, C... capacitor.

Claims (2)

[Claims] (1) A main control device, a controlled device, a connection adapter attached externally or built into the controlled device, a common power supply line for supplying DC voltage from the main control device to the connection adapter, and the above-mentioned An emergency power-off/ground signal line for supplying an emergency power-off/ground signal from the main controller to the connection adapter, and a power-on completion notification signal for notifying the main controller of the completion of power-on of all controlled devices. line, and a closing instruction signal line provided between the main controller and the first connection adapter and between adjacent connection adapters, and each connection adapter has a first switch, a second switch, and a input signal line provided between the main control device and the first connection adapter and between adjacent connection adapters. a processing circuit, the common part of the first switch is connected to the closing instruction signal line from the connection adapter in the previous stage, the a side of the first switch is connected to the signal processing circuit, and the first switch has a processing circuit. The b side of the second switch is connected to a signal line for sending an input instruction signal to the corresponding controlled device, the common part of the second switch is connected to the output of the signal processing circuit, and the a side of the second switch is Connected to the input instruction signal line to the next stage connection adapter,
The b side of the second switch is connected to the power-on completion notification signal line, and the signal processing circuit is configured to output a signal of a predetermined value when power-on of the corresponding controlled device is completed. A power control system featuring: (2) When the signal processing circuit receives a disconnection request signal of a predetermined value from the corresponding controlled device while the power of the corresponding controlled device is turned on,
The power supply control method according to claim 1, wherein the power supply control method is configured to maintain the output at the predetermined value even if the power of the corresponding controlled device is cut off.