JPS62115917A - Multicontact type semiconductor relay circuit - Google Patents

Abstract

PURPOSE:To reduce the cost of a relay circuit by connecting the outputs of depression type FETs to plural output FET gates through a transfer gate. CONSTITUTION:Two photodiode arrays 2 and 3 are light-jointed to a semiconductor light emitting element 1 emitting light by an input signal. The 2nd photodiode array 3 is connected across the gate and source of the depression type FET 4, while its output is connected to plural output FET gates. When the light emitting element 1 emits light by the input signal, an optical current generated in the 1st photodiode array 2 is applied to a selection circuit 6, where the transfer gates T1-Tn selected by selection signals S1-Sn pass a signal, select and conduct any one of plural output FETs Q1-Qn. Thus a one expensive photodiode array suffices, and the cost of a multiconnection type semiconductor relay circuit can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a semiconductor relay circuit in which input and output are electrically separated using light emitting and receiving elements.

BACKGROUND ART 1 This type of conventional semiconductor relay, as shown in FIG.
Semiconductor light emitting device 1 such as an LED that emits light according to an input signal
optically couple two photodiodes 7 rays 2 and 3 to
A second 7-photodiode array 3 is connected between the gate and source of a diplegged FET 4 such as a junction FET connected in parallel to the first photodiode array 2, and the output of the diplegged FET 4 is used to output, 1FET
It is configured to drive 5.

The feature of the above semiconductor relay circuit is that when the output FET 5 is turned on in the first 7-way diode array 2, the N-channel dibresilane type FET 4 is turned off by reverse bias, so that the current supplied to the date of the output FET 5 is There is no loss in the output FET 5, and since no bias is applied to the depredigidine FET 4 when the output FET 5 is turned off, the depredigidine FET 4 is turned on and the gate accumulated charge of the output FET 5 is quickly discharged.

[Objective of the Invention 1] Now, when trying to select a control load using the above semiconductor relay using a plurality of selection signals SI+..., Sn, as shown in FIG. 4, for example, as shown in FIG. The semiconductor relays RL, .

The present invention has been made in view of the above problems, and its object is to provide a multi-contact type semiconductor relay circuit with a built-in selection circuit at a low cost.

[Disclosure of the Invention] The multi-contact type semiconductor relay circuit according to the present invention optically couples two 7-diode arrays to a semiconductor light emitting element that emits light in response to an input signal, and connects them in parallel to a first photodiode array. A photodiode array of vJ2 is connected between the gate and source of the depletion type FET, and the output of the depletion type FET is connected to a transformer 7.
It is configured by connecting to the dates of multiple output FETs via an agate, and by providing a selection circuit consisting of multiple transfer gates on the output side of the depletion type FET, it can handle multiple selection loads. The feature is that only one set of 7-dimensional arrays is required.

FIG. 1 shows an embodiment of the circuit of the present invention. In the figure, two 7-dimensional diode arrays are optically coupled to a semiconductor light emitting device 1 that emits light in response to a human input signal.
An N-channel depletion type FET 4 is connected in parallel to the 7-way diode array 2, and a second 7-way diode array 3 is connected between the gate and source of this depletion type FET 4. In addition, the output of the depletion type FET 4 is connected to the dates of a plurality of output FETs Q, , Q2, . , multiple trans7T days) T, , T2. ..., Tn are connected in parallel with each other.

In the above configuration, when the light emitting element 1 emits light in response to an input signal, the photocurrent generated in the first seven-dimensional diode array 2 is applied to the selection circuit 6. The selection circuit 6 outputs selection signals S, , S2 . ...+Sn selected transformer 7ade)T,,T2. ..., Tn passes the signal,
Any one of the plurality of output FETs Q, . . . r Q n is selected and made conductive. The date of this N-channel depletion type FET 4 is reversely biased by the photodiode array 3I of ptS2.
Since depletion type FET 4 is turned off, output FETs Q, , Q2 .・
...There is no loss in the current supplied to the date of tQn,
For this purpose, output FETQ, Q2. ...t Q n
turns on immediately.

Next, the human input signal disappears, and the first 7-wire array 2 turns off, which causes the output FET Q l l
When Q 21 ''' l Q n turns off, the second 7t) diode array 36 turns off, and the depletion type FET 4 is no longer biased, so the depletion type FET 4 turns on, and therefore the output J'T7FE
TQ, . . . The charges accumulated in M on the date of tQn are discharged through the depletion type FET4 and output from ITIF.
ETQ, . . . , Q n are quickly turned off.

[9 Effects of Light] As mentioned above, in the present invention,! In a semiconductor relay circuit in which the output FET is driven by the output of a depletion type FET that is connected in parallel to the 7-channel diode array of @1 and controlled by the second 7r) diode array, the depletion type FET is Since a selection circuit consisting of a plurality of transformers 7adate is provided between the output terminal of the output terminal and the input terminal of the plurality of output FETs, in order to selectively control the plurality of loads, the conventional example shown in FIG. This method has the advantage that a multi-contact type semiconductor relay circuit can be provided at low cost by eliminating the need for a plurality of semiconductor relays and using only one set of expensive photodiode arrays.

[Brief explanation of drawings]

2 is a specific circuit diagram of the main part same as above, FIG. 3 is a block circuit diagram of a conventional example, and FIG. 54 is a block circuit diagram of another conventional example. 1 is a semiconductor light-emitting device, 2 is a first photodiode array, 3 (7 photodiode array of Doi 2, 4ii tier 'L' signal type FET, Q+, Q, ,", Qn are for output FET, T, T2..., Tn is the transformer 7 date. Agent Patent attorney Ishi 1) Chief 7 Figure 2 Figure 3

Claims (1)

[Claims] (1) A depletion type FET in which two photodiode arrays are optically coupled to a semiconductor light emitting element that emits light in response to an input signal, and the first photodiode array is connected in parallel.
A multi-contact type semiconductor relay circuit comprising: a second photodiode array connected between the gate source of the depletion type FET; and outputs of the depletion type FETs connected to the dates of a plurality of output FETs via transfer gates.