JPS6211373A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To correct a picture element poor in sensitivity and thereby to improve the picture quality by positioning a picture-element signal whose noise output exceeds the tolerance limit value in the vicinity of a picture element and replacing said signal with another one whose S/N ratio is maximum. CONSTITUTION:Of the titled device, th offset correction value of each picture element is stored in an offset correction value memory 3 and the sensitivity correction value in a sensitivity correction value memory 5 beforehand. And these values are added with and multiplied on the picture signal form an A/D converter 2 respectively by an adder 4 and multiplier 6. Between a microprocessor 7 for the circuits 3 and 5 and display memories 11a and 11b, two frame memories 8 and 9 are provided in order to expand the function of the processor 7. The absolute value of the difference between a normalized output and the offset/sensitivity correction values generated by picking up a high-brightness reference target, is obtained. The said value is compared with the tolerance limit value, and a signal whose said signal exceeds the limit value is positioned near the picture element, and is replaced with a picture element signal of maximum S/N.

Description

[Detailed Description of the Invention] [Summary] The present invention improves image display in a solid-state imaging device by replacing pixels with a poor signal-to-noise ratio that appear as flickering in the image.

[Industrial application field]

The present invention relates to solid-state imaging devices, and particularly to correction of pixels with poor signal-to-noise ratios that appear as flickering in images.

[Conventional technology]

In solid-state imaging devices, electrical signals generated in each pixel region of a photoelectric conversion element are normally multiplexed in time series and detected using a charge transfer device (CTD) such as a charge-coupled device (CCD), and the signals are processed after sampling and digital conversion. The correction is performed and displayed on the display device.

FIG. 3 is a block diagram of one conventional example of a solid-state imaging device having such a configuration. In the figure, 1 is a photoelectric conversion element, CO
2 is an analog/digital converter, 3 is an offset correction value memory, 4 is an offset correction adder, 5 is a sensitivity (gain) correction coefficient memory, 6 is a sensitivity correction multiplier, 7 is a microprocessor;
10 is a display address generator, lla and llb are display memories, 12 is a digital/analog converter, and 13 is a display device.

In the solid-state imaging device having the above configuration, signal correction includes correction of offset variations between pixels, sensitivity variation correction, and defective pixel correction in which defective pixels having no or almost no sensitivity are replaced with data of other pixels. It is being done.

Offset and sensitivity variation correction is generally performed using the following calculation formula.

(P - P L) / (P HP L) where P is the output when looking at the imaging target, PL is the output when looking at the uniform low brightness reference target, and PH is the output when looking at the uniform high brightness reference target. This is the output when viewed.

The offset correction is expressed by the numerator of the above equation, and is a correction for variations in the DC component that are unrelated to the intensity of the incident light. The sensitivity correction is expressed by the denominator of the above equation, and is a correction for variations in the ratio of the amount of change in the output to the amount of change in the incident light.

These corrections are performed by storing the offset correction value of each pixel in the offset correction value memory 3 and the sensitivity correction coefficient in the sensitivity correction coefficient memory 5 in advance, and adding them to the digital image signal, as shown in the block diagram of Fig. 3. The offset correction value is subtracted by the device 4, and the sensitivity correction coefficient is multiplied by the multiplier 6.

As is known from the above equation, the offset correction value is the output PL of each pixel when looking at a uniform low hesitation reference target.
The sensitivity correction coefficient is set based on a constant multiplied by the reciprocal of the output difference P, -PL of each pixel when looking at high and low luminance reference targets.

This offset correction and sensitivity correction make it possible to obtain a uniform output even if there are variations in the imaging unit 1, but if there are pixels with no or almost no sensitivity, the sensitivity correction coefficient becomes extremely large. , the correction output changes greatly even for a slight change in output during imaging, and the pixel flickers heavily and becomes difficult to see.

To solve this problem, for example, a pixel whose sensitivity is below a certain value is determined to be a defective pixel, and the display address generator 10 shown in FIG.
The address of the defective pixel is converted into the address of the adjacent normal pixel by the memory of , and correction is performed to replace the data at that position in the display memories lla and llb with normal data.

[Problem that the invention seeks to solve]

In the conventional signal correction method for solid-state imaging devices described above, pixels with a poor signal-to-noise ratio but whose sensitivity is not particularly low are displayed as normal pixels after sensitivity correction, resulting in flickering on the output screen. This makes the image difficult to view.

Therefore, there is a demand for effective correction even for pixels with poor signal-to-noise ratios.

[Means for solving problems]

The above-mentioned problem is that the noise output of each pixel is compared with a tolerable limit value, and the signal of the pixel whose noise output exceeds the tolerable limit value is selected from pixels located near the pixel and having the maximum signal-to-noise ratio. This problem is solved by the solid-state imaging device according to the present invention, which replaces the signal of the pixel with the signal of the pixel.

The noise output and the allowable limit value may be compared by, for example, setting the allowable limit value to a reference signal value after offset and sensitivity correction, and comparing the signal value after offset and sensitivity correction of each pixel with the reference signal value. This can be easily carried out by comparing the integrated value of the absolute value of the difference between the two and the permissible limit value.

[For production]

FIG. 1 is an explanatory diagram of an example of the operation of a solid-state imaging device according to the present invention.

Low-luminance reference target LL and high-luminance reference target LL
If the output of the first pixel for H is pti and put, respectively, the input/output characteristic of this pixel is a straight line A.

It is approximated by If offset correction and sensitivity correction are performed on this input/output characteristic as in the conventional case, the normalized input/output characteristic is represented by a straight line B for all pixels.

If there is a fluctuation Vi due to noise in the output pni of this first pixel with respect to the high-intensity reference target L)I, there is a fluctuation V due to noise in the output pH (at a constant level for all pixels) after its offset and sensitivity correction.

will occur.

If this output fluctuation Vi becomes large, it will cause the unpleasant flickering mentioned above, so in the present invention, the tolerable limit value V of the output fluctuation after offset and sensitivity correction is set based on the normalized output PR, Pixels whose output fluctuation exceeds this value are replaced with the signal value of a nearby pixel with the highest signal-to-noise ratio and displayed.

The determination of this output fluctuation can be performed, for example, as shown in an embodiment later (by recording the results of offset and sensitivity correction using a high-brightness reference target as a bridge image, and recording this and the normalized output P in one frame memory).

This can be carried out by calculating the absolute value of the difference between the two frames, recording the integrated value for a plurality of frame periods in another frame memory, and comparing this with the allowable limit value VH of output fluctuation.

〔Example〕

The present invention will be specifically explained below using examples.

FIG. 2 is a block diagram showing one embodiment of the present invention, and parts corresponding to the conventional example are designated by the same reference numerals as in FIG. 3.

Compared to the conventional example, this embodiment is equipped with two frame memories 8 and 9, and the functions of the microprocessor 7 are expanded. The result of the correction is recorded in one frame memory 8, and this and the normalized output P,
The absolute value of the difference is determined, the integrated value for the plurality of frame periods is recorded in the frame memory 9, and this is compared with the allowable limit value vH.

If a pixel has an output fluctuation exceeding the allowable limit of 8 in this comparison, it will be replaced with the signal value of a pixel that is nearby, such as adjacent to that pixel, and has the highest signal-to-noise ratio, and the display address will be ordered. The latter address is recorded in the former address of the memory of the device 10. This improves the display of pixels with poor signal-to-noise ratios that exhibit difficult-to-see flickering.

Furthermore, if there is a defective pixel with no or almost no sensitivity, defective pixel correction is performed to replace this pixel with data of another pixel, as in the conventional example, and a good image display without abnormal pixels can be obtained.

It is also possible to configure the display memories lla and llb to perform the operations of the frame memories 8 and 9 of this embodiment, thereby saving the memory device.

〔Effect of the invention〕

As explained above, according to the present invention, not only low sensitivity but also
Even pixels exhibiting flickering due to a small signal-to-noise ratio can be easily replaced, resulting in a significant effect on improving the performance of the solid-state imaging device.

[Brief explanation of drawings]

FIG. 1 is an embodiment of a solid-state imaging device according to the present invention. FIG. 3 is a block diagram of a conventional example of a solid-state imaging device. In the figure, 1 is an imaging unit, 2 is an analog/digital converter, 3 is an offset correction value memory, 4 is an offset correction adder, 5 is a sensitivity correction coefficient memory, 6 is a sensitivity correction multiplier, 7 is a microprocessor, 8 and 9 a frame memory, 10 a display address generator, 11a and llb display memories, 12 a digital/analog converter, and 13 a display device.

Claims (1)

[Claims] 1) The noise output of each pixel is compared with a tolerable limit value, and the signal of the pixel whose noise output exceeds the tolerable limit value is selected from a pixel that is located near the pixel and has the highest signal-to-noise ratio. A solid-state imaging device characterized in that the signal is replaced with a signal from another pixel. 2) Set the permissible limit value for the reference signal value after offset and sensitivity correction, and calculate the integrated value of the absolute value of the difference between the signal value after offset and sensitivity correction of each pixel and the reference signal value, and the permissible limit value. The solid-state imaging device according to claim 1, wherein the solid-state imaging device compares with a limit value.