JPS62109546U - - Google Patents
Info
- Publication number
- JPS62109546U JPS62109546U JP19909685U JP19909685U JPS62109546U JP S62109546 U JPS62109546 U JP S62109546U JP 19909685 U JP19909685 U JP 19909685U JP 19909685 U JP19909685 U JP 19909685U JP S62109546 U JPS62109546 U JP S62109546U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- input signal
- amplitude
- noise level
- frequency
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 12
- 238000010586 diagram Methods 0.000 description 3
- 238000003708 edge detection Methods 0.000 description 1
Description
第1図は本考案の制御信号検出回路の一実施例
を示したブロツク図、第2図は第1図で用いられ
る信号波形図、第3図は入力信号の拡大図である
。
1…バンドパスフイルタ、2…エツジ検出回路
、3…信号下限検出回路、4…信号上限検出回路
、5…ノイズレベル上限検出回路、6…アンド回
路、7,9…オア回路、8…インバータ、10,
11…カウンタ。
FIG. 1 is a block diagram showing one embodiment of the control signal detection circuit of the present invention, FIG. 2 is a signal waveform diagram used in FIG. 1, and FIG. 3 is an enlarged diagram of an input signal. DESCRIPTION OF SYMBOLS 1... Bandpass filter, 2... Edge detection circuit, 3... Signal lower limit detection circuit, 4... Signal upper limit detection circuit, 5... Noise level upper limit detection circuit, 6... AND circuit, 7, 9... OR circuit, 8... Inverter, 10,
11...Counter.
Claims (1)
を検出する周波数検出手段と、入力信号が所定の
周期であるかどうかを検出する周期検出手段と、
入力信号の有信号部分の振幅が所定の範囲内であ
るかどうかを検出する振幅検出手段と、入力信号
の無信号部分のノイズレベルが所定値以下である
かどうかを検出するノイズレベル上限検出手段と
、前記周波数検出手段により前記入力信号の周波
数が所定の範囲内であることが検出され、かつ前
記周期検出手段により前記入力信号が所定の周期
であることが検出され、かつ前記振幅検出手段に
より前記入力信号の有信号部分の振幅が所定の範
囲内であることが検出され、かつ前記ノイズレベ
ル上限検出手段により前記入力信号の無信号部分
のノイズレベルが所定値以下であることが検出さ
れた場合に制御信号が検出されたことを示す検出
信号を出力する検出信号出力手段とを具備して成
ることを特徴とする制御信号検出回路。 frequency detection means for detecting whether the frequency of the input signal is within a predetermined range; period detection means for detecting whether the input signal has a predetermined period;
An amplitude detection means for detecting whether the amplitude of the signal portion of the input signal is within a predetermined range; and a noise level upper limit detection means for detecting whether the noise level of the non-signal portion of the input signal is below a predetermined value. The frequency detecting means detects that the frequency of the input signal is within a predetermined range, the period detecting means detects that the input signal has a predetermined period, and the amplitude detecting means detects that the input signal has a predetermined period. It is detected that the amplitude of the signal portion of the input signal is within a predetermined range, and the noise level upper limit detection means detects that the noise level of the non-signal portion of the input signal is below a predetermined value. 1. A control signal detection circuit comprising: detection signal output means for outputting a detection signal indicating that a control signal is detected when the control signal is detected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19909685U JPS62109546U (en) | 1985-12-26 | 1985-12-26 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19909685U JPS62109546U (en) | 1985-12-26 | 1985-12-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS62109546U true JPS62109546U (en) | 1987-07-13 |
Family
ID=31160400
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19909685U Pending JPS62109546U (en) | 1985-12-26 | 1985-12-26 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS62109546U (en) |
-
1985
- 1985-12-26 JP JP19909685U patent/JPS62109546U/ja active Pending
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