JPS62108A - Detection circuit - Google Patents

Abstract

PURPOSE:To change over simply the AM detection and the SSB detection by controlling the potential at points A and D nearly identical so as to obtain an AGC voltage stably. CONSTITUTION:Transistors (TR) 23, 24, resistors 21, 22, 25, 27, 28 and a capacitor 26 are provided to control the potential at points, A, D to be identical and TRs 29-32, resistors 33, 34, 38 and a switch S are added, a part between the points A and C is divided by resistors 35-37 to add potentials at points B, F. Through the constitution above, the potentials of the points A, D are compared and the circuit is controlled automatically so that the potential at the point D approaches the potential at the point A.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a detection circuit in a receiver, and in particular, extracts the 5M detection output and the SSB detection output from the 5M detection circuit and the 888 detection circuit from the same terminal, and mutes the DC voltage obtained at the time of detection. The purpose of this is to provide a stable MUGC voltage when used as an EC signal. Another object of the present invention is to provide a detection circuit that can be easily integrated into an integrated circuit.

The AM detection circuit that is generally used for the SSB detection circuit is the first one.
As shown in the figure, a differential amplifier is provided in which the emitters of transistors 1 and 2 are connected to each other.
The base bias is applied through the resistors 8 and 9 from the connection between the resistor 16 and the diode 14.13 that constitute the bias circuit, and the emitter of the transistor 1.2 is connected to the impedance element formed by the transistor 3 that constitutes the constant current circuit. Was. The base of this transistor 30 is biased through the resistor 10 from the 8 points divided by the 0 point by the resistors 11 and 12, so even if the power supply of 10B changes, the transistor 3 will have almost no current. It operates as an impedance element so that it does not change. Further, a current mirror circuit was provided on the collector side of the transistor 1.2. This is done by connecting a diode element 5 (which may be a diode-connected element of the transistor as shown) between the collector of transistor 1 and the power supply, and connecting the collector of transistor 2 to a PNP with a different polarity from transistor 1.2. Connect the collector of the transistor 6, connect the emitter of the transistor 6 to the power supply, and connect the emitter of the transistor 6 to the power supply.
The base of the transistor 1 was connected to the connection point E between the collector of the transistor 1 and the diode element 6. Then, a detection transistor 16 is connected to point D. Then, 5M signal (4
When the 5M signal of the carrier wave of 55K) tz is added, it is amplified to point D and is applied to the base of the detection transistor 16.The AV detection is applied to the emitter of the transistor 16 by charging and discharging the capacitor 18 connected to the emitter of the transistor 16. AM
Extract the detection signal.

Then, high-frequency components are removed by a filter constituted by a resistor 19 and a capacitor 2o, and the 5M detected AC signal is extracted at point b. In addition, the detected DC voltage of the emitter of the detection transistor 16 is used directly or via the resistor 19 as a MuGG signal, and the gains of the high frequency circuit, frequency conversion circuit, and intermediate frequency circuit of the receiver are adjusted according to changes in the input signal. It was configured so that it could be controlled automatically.

In the AM detection circuit with such a configuration, the diode element 5 is connected between the base and emitter of the transistor 6 to operate as a current mirror circuit, so the current amplification factor of the transistor 6 is approximately 1, and the diode element 5 is connected between the collector of the transistor 1 and the emitter. The current flowing through transistor 5 and the current flowing from the collector current of transistor 2 to transistor 6 are almost the same. However, these currents are not exactly the same, and due to variations in potential between the base and emitter of transistors 1 and 2 and variations in current amplification factors, transistors 1 and 2
The collector current of will be different. Furthermore, if the potential of the diode element 6 and the potential between the base and emitter of the transistor 6 are different, the current amplification factor of the transistor 6 is close to 1, but not completely 1. The current flowing through the two is different. Therefore, the collector currents of transistor 6 and transistor 2 are no longer the same, and point D is biased more than point A by resistor 7, but current from the collector of transistor 2 or the collector of transistor 6 flows through resistor 7. The position of point D changes more than that of point A. If you make many circuits like this, the potential at point D will have various values due to variations in transistors 1, 2j6, and diode element 6. Therefore, when there is no input signal and no detection output signal, the potential at point D will be different. Since the emitter potential of the transistor 16 is variously different, when the detected DC potential obtained at the emitter of the transistor 16 is used for the five GC signals, the GC voltage flowing directly from the emitter of the transistor 16 or through the resistor 19 varies. There was a disadvantage that the five GO operations were inconsistent.

The present invention eliminates the drawbacks of such conventional devices, and the detection circuit of the present invention will be described below with reference to drawings of embodiments.

Fig. 3 shows an example of the configuration of the detection circuit of the present invention, and the difference from Fig. M1 is that transistors 23 and 24 and resistors 21 and 22° 25.27.2B
, by providing the capacitor 26, the potentials of the mermaid and point D can be controlled to be the same, and the transistors 29,
30, 31.32, resistor 33, 34, 38 and switch S
Add 3 resistors between the 5 points and 0 points as a bias circuit.
It is divided by 6°36.37 and the potentials of point B and one point are added. That is, the point D is connected to the base of a transistor 240 via a resistor 26, the emitters of the transistor 24 are mutually connected to the emitters of the transistor 23, and a resistor 27 is connected between one of the power supplies. Further, the base of the transistor 23 is connected to the stabilized voltage point A via a resistor 28. The collector of the transistor 24 is connected to the emitter of the transistor 6, and the collector of the transistor 23 is connected to the power supply. Furthermore, a resistor 22 is connected between the emitter of the transistor 6 and the power supply, and a resistor 21 is connected between the diode element 6 and the power supply.
are connected. With this configuration, the potential at point D is compared with the potential at five points, and the potential at point D is automatically controlled so as to approach the potential of the mermaid. This is point D, resistance 25,
Transistor 240 base-collector, transistor 6
This is because the emitter-collector (point D) of is in a negative feedback loop, and if point D is at a higher potential than point A, the base of transistor 24 will have a higher potential than the base of transistor 23. Therefore, a large amount of current flows through the transistor 24, the voltage drop across the resistor 22 increases, the emitter potential of the transistor 6 decreases, and the current through the transistor 6 decreases. Therefore, until now, part of the collector current of transistor 6 has flowed to resistor 7, making the potential at point D higher than point 5, but when the current of transistor 6 becomes smaller and becomes almost the same as the current of transistor 2, resistor 7 Since no current flows through , the five points and the D point can be made to have almost the same potential.

Conversely, when point D is lower than point 5, the current in transistor 24 becomes smaller than the current in transistor 23, the voltage drop across resistor 22 becomes smaller, the current in transistor 6 increases, and the values of the currents in transistor 2 and transistor 6 decrease. It operates so that the points A and D have almost the same potential.

When operated in this way, variations in the current amplification factor of transistors 1 and 2, variations in the potential between the base and emitter of transistors 1 and 2, and a slight difference between the potential between the base and emitter of transistor 6 and the potential of diode element 5 are reduced. To a certain extent, the potentials at point A and point D can be made almost the same by the action of transistors 23 and 24. When point A and point D are almost the same, if almost the same current flows through transistors 1, 2, 23, and 24.6, the value of resistor 21 is equal to resistor 2.
It is recommended to set the value to 202 times. That is, only the current of transistor 1 flows through resistor 21, but the two currents of transistor 6 and transistor 240 flow through resistor 22, resulting in twice the voltage drop.

In addition, as shown in FIG. 2, the resistors 21 and 22 are eliminated and the collector of the transistor 23 is connected to the diode element 6 and the transistor 1.
The potential at point D is connected to the connection point of the collector of point D, the resistor 25, the base and emitter of transistor 24, the emitter and collector of transistor 23, the diode element 6, and the base and collector of transistor 6. a
It is possible to control the points almost identically. At this time, when the currents of transistors 1, 2, and 6.23 are almost the same, if two diode elements 6 are used in parallel as shown in Fig. 2, then
Although it is possible to make the potential between the base and emitter of the transistor 6 and the potential of the diode element 6 almost the same, it is better to do it as shown in Fig. 3, because negative feedback can be achieved by changing the values of the resistors 21 and 22. It is convenient because the amount can be changed.

As described above, when the potential at point D becomes almost the same as the potential at point a, a stable potential is obtained at point D even with changes in the power supply voltage at point a, so the emitter voltage of transistor 16 also becomes a stable DC voltage. can be obtained, so it can be stably used as a mu GO signal. At this time, the capacitor 26 is used to attenuate the AC signal at point D and apply it to the transistor 24, and the resistor 25 and capacitor 26 constitute a filter.

This turns on transistors 30 and 31 when switch S is turned on.
is in a cut-off state, transistors 29 and 32 are in a conductive state, the collector of transistor 1 is connected to diode element 6 via transistor 29 which is conductive, and the collector of transistor 2 is connected to diode element 6 through transistor 3 which is conductive.
Since it is connected to the collector of the transistor 6 via the transistor 2, it functions as described above. That is, point a and point D are kept at almost the same potential, and the V modulation signal applied to point a is taken out to point D, detected by transistor 16, and a detected output signal is obtained at point b. Stable operation can be achieved by using the detected DC voltage of the emitter as a mu GO signal.

On the other hand, when switch S is turned off, transistor 29
, 30, 31, and 32 are in operation, an SSB signal (single sideband signal) is applied to point a, and a beat frequency signal is applied to point G. Then, the SSB amplified by transistors 1 and 2
The signal is applied to the emitters of transistors 29, 30 and 31, 32, and multiplied (switched) by transistors 29-32 by the beat frequency signal applied at point G to generate a low frequency beat detection signal at point D. This beat detection signal is taken out from the base of the transistor 16 to the emitter, and is taken out as an SSB detection output at point b. At this time, since the beat detection signal is a low frequency signal, the charging and discharging of the capacitor 18 has a value that has almost no effect, and the transistor 16 operates as an emitter 7 orer. At this time, as in the previous case, when there is no input signal, points A and D have almost the same potential, but when a large input signal enters, the voltage at point D changes, and this voltage is applied to the emitter follower of transistor 16. 5G from the emitter of transistor 16
Not only can the O signal be extracted, but also the SSB detected signal can be extracted.

At this time, the bases of transistors 29, 30, 31.32 are biased from point a by resistor 33.34, the bases of transistors 1 and 20 are biased from point 1 by resistors 8, 9, and the base of transistor 3 is biased from point B. Biased through resistor 10.

Next, FIG. 4 shows an oscillator that oscillates a beat frequency signal in addition to the one shown in FIG. 3, and can be integrated into an integrated circuit with fewer terminals.

This is because when the switch S″ft is turned OFF, no voltage is applied to the collector of the transistor 4o and the base of the transistor 39, so the oscillator for the beat frequency signal does not operate.

Then, the base of the transistor 29.32 is grounded through the resistor 38, so the transistor 29.32 becomes cut off, and the transistor 30.31 becomes conductive.
When an AM modulation signal is applied to terminal a, it is amplified to point D, and the AM signal is detected by transistor 16. On the other hand, switch S is set to O.
When N is applied, the voltage at point A is applied to the base of transistor 39 and the collector of transistor 40, and since the voltage is always applied to the collector of transistor 39 and the base of transistor 4°, oscillation occurs.

That is, the collector of the transistor 4o is connected to the base of the transistor 39 via the resistor 41.
9 base/emitter, transistor 40 emitter/
Oscillation occurs in the collector's positive feedback loop. At this time, the coil 44 and capacitor 45 connected to the collector of the transistor 4o oscillate at a resonant frequency. This oscillation signal is applied via resistor 42 to the base of transistor 29.32. At this time, when the switch S is in the ON state, the switch S
1 Since the potential at point A is applied to the resistor 42, the transistor 2
9, 30, 31, and 32 become conductive, and the SSB signal applied to the four points is amplified by transistor 1゜2, multiplied by transistors 29 to 32, and the beat detection signal is taken out at point D as in Fig. 6. Through the emitter follower of the transistor 16, the SSB detection power output can be output to point b.

As described above, according to the present invention, the potentials at points A and D can be controlled to be almost the same, a 5 ec voltage can be stably obtained, and MuV detection and SSB detection can be easily switched. . In addition, in Figures 2 to 4, capacitor 1
8, 20, resistor 19 filter and capacitor 26
．． The components other than 46 can be integrated into an integrated circuit.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram of a conventional detection circuit, Fig. 2 is an explanatory diagram of a conventional detection circuit, Fig. 3 is a circuit diagram showing a configuration example of a detection circuit of the present invention, and Fig. 4 is a circuit diagram of a detection circuit of the present invention. FIG. 7 is a circuit diagram showing another example of the configuration of the circuit. 1.2...first differential amplification transistor,
3... Constant current transistor, 6...
Diode element for current mirror circuit, 6...
Current mirror transistor, 13.14...
・Voltage diode, 16...Transistor for detection, 1 day...Capacitor for detection, 20...
...Low pass filter capacitor, 19...
・・・Resistance for low pass filter, 21.22...
... Resistor, 23.24 ... Second differential amplification transistor, 25 ... Filter resistor, 2
6...Filter capacitor, 29°3o・
...Third differential amplification transistor, 31°3
2...Fourth differential amplification transistor, S...
...Switch, 39.40...Beat oscillator transistor, 44...Coil, 46.
...Capacitor. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
Figure 2

Claims (2)

[Claims] (1) A first differential amplifier in which the emitters of the first and second transistors are coupled together; and a diode having a different polarity from the first and second transistors constituting the first differential amplifier. a current mirror circuit using a semiconductor element with special characteristics and a third transistor, and a second differential amplifier in which emitters of a fourth and a fifth transistor are mutually coupled;
A first impedance element is connected between the diode element constituting the current mirror circuit and one power supply, a second impedance element is connected between the emitter of the third transistor and one power supply, and the second impedance element is connected between the emitter of the third transistor and one power supply. A reference voltage A is connected to the base of the transistor No. 5, and at least one of the collectors of the fourth and fifth transistors is connected to the third transistor in a negative DC feedback manner.
The emitter of a third differential amplifier is connected to the second impedance element, and the emitters of the seventh and eighth transistors are mutually coupled to the collector of the first transistor constituting the first differential amplifier. The ninth and tenth transistors are connected to the collectors of the second transistors constituting the first differential amplifier.
The emitters of the fourth differential amplifier are connected to each other, and the collectors of the seventh and ninth transistors constituting the third and fourth differential amplifiers are connected to the diode element. , a filter that connects the collectors of the eighth and tenth transistors constituting the third and fourth differential amplifiers to the collector of the third transistor and the base of the sixth detection transistor, and bypasses the AC signal. is connected to the base of the fourth transistor constituting the second differential amplifier through the switching means, and the base connection point G of the seventh and tenth transistors is connected by the switching means.
When the potential of one of the base connection points H of the eighth and ninth transistors is lower than the other potential, the first and second transistors
constitutes AM detection means for applying an AM modulated signal to one of the transistors and extracting an AM detection signal from the output of a filter connected to the emitter of the sixth detection transistor, and the emitter of the sixth detection transistor. The DC voltage taken out at 1. Apply the SSB signal to one of the bases of the second transistor, and apply the SS signal from the output of the filter connected to the emitter of the sixth detection transistor.
A detection circuit comprising an SSB detection means for extracting a B detection signal. (2) A beat oscillator is provided at one of the connection points G and H of the third and fourth differential amplifiers, and the collector of the eleventh transistor and the base of the twelfth transistor constituting the beat oscillator are provided. is always applied with a voltage close to the reference potential A, the collector of the twelfth transistor is connected to the base of the eleventh transistor, a parallel tuned circuit is connected to the collector of the twelfth transistor, and the voltage of the tuned circuit is connected to the collector of the twelfth transistor. One is connected to a voltage point close to the reference potential A via a switch, and when the switch is turned on, the seventh, eighth, and ninth
, the bases of the tenth transistors are set at approximately the same potential to operate the beat oscillator, the beat oscillator is inactive when the switch is turned off, and the connection point G;
3. The detection circuit according to claim 2, wherein one of H is configured to have a lower potential than the other.