JPS62108873U - - Google Patents
Info
- Publication number
- JPS62108873U JPS62108873U JP20249585U JP20249585U JPS62108873U JP S62108873 U JPS62108873 U JP S62108873U JP 20249585 U JP20249585 U JP 20249585U JP 20249585 U JP20249585 U JP 20249585U JP S62108873 U JPS62108873 U JP S62108873U
- Authority
- JP
- Japan
- Prior art keywords
- mount
- displayed
- test
- reference position
- positions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 claims description 3
Landscapes
- Testing Electric Properties And Detecting Electric Faults (AREA)
- Keying Circuit Devices (AREA)
- Electronic Switches (AREA)
Description
図はこの考案による試験用補助具の一例を示す
平面図である。
１１，１２；台紙、１３；回路図、１４；スイ
ツチ素子の表示、１５，１８，２１；孔、１６；
基準位置、１７；試験条件位置。
The figure is a plan view showing an example of the testing aid according to this invention. 11, 12; mount, 13; circuit diagram, 14; display of switch element, 15, 18, 21; hole, 16;
Reference position, 17; test condition position.
Claims (1)
持され、 その上側の第１台紙上に被試験機器の回路図が
表示され、 その回路図中のスイツチ素子が表示されるべき
複数の部分は上記回転の中心から離れて位置し、
その各部分は第１台紙に孔が開けられ、 上記第１台紙に基準位置が設けられ、上記第２
台紙に、これを回転することにより上記基準位置
に合せることができる試験条件位置が複数設けら
れ、 その試験条件位置を上記基準位置に合せると、
上記複数の孔の位置に、スイツチ素子が、その試
験条件に応じた正常動作時のオン、オフ状態でそ
れぞれ現われるように上記第２台紙に表示されて
いる試験用補助具。[Claims for Utility Model Registration] The first and second mounts are stacked and held rotatably with respect to each other, and the circuit diagram of the device under test is displayed on the first mount above them, and the switch in the circuit diagram is displayed on the first mount above them. portions in which the elements are to be displayed are located away from the center of rotation;
Each part has a hole in the first mount, a reference position is provided in the first mount, and a hole is provided in the second mount.
A plurality of test condition positions are provided on the mount, which can be aligned with the above reference position by rotating the mount, and when the test condition positions are aligned with the above reference position,
A test aid wherein switch elements are displayed at the positions of the plurality of holes on the second mount so that the switch elements appear in an on state and an off state during normal operation according to the test conditions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20249585U JPH05867Y2 (en) | 1985-12-25 | 1985-12-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20249585U JPH05867Y2 (en) | 1985-12-25 | 1985-12-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62108873U true JPS62108873U (en) | 1987-07-11 |
| JPH05867Y2 JPH05867Y2 (en) | 1993-01-11 |
Family
ID=31166930
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20249585U Expired - Lifetime JPH05867Y2 (en) | 1985-12-25 | 1985-12-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05867Y2 (en) |
-
1985
- 1985-12-25 JP JP20249585U patent/JPH05867Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH05867Y2 (en) | 1993-01-11 |
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