JPS62106456A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPS62106456A
JPS62106456A JP24665585A JP24665585A JPS62106456A JP S62106456 A JPS62106456 A JP S62106456A JP 24665585 A JP24665585 A JP 24665585A JP 24665585 A JP24665585 A JP 24665585A JP S62106456 A JPS62106456 A JP S62106456A
Authority
JP
Japan
Prior art keywords
resist film
pattern
film
positive resist
vapor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24665585A
Other languages
Japanese (ja)
Inventor
Masao Kanazawa
金沢　政男
Seiji Kawanako
川那子　誠二
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP24665585A priority Critical patent/JPS62106456A/en
Publication of JPS62106456A publication Critical patent/JPS62106456A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/095—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having more than one photosensitive layer

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  • Engineering & Computer Science (AREA)
  • Architecture (AREA)
  • Structural Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)

Abstract

PURPOSE:To form a fine pattern having high accuracy by forming the pattern composed of a deposited org. high polymer film together with an another masking film. CONSTITUTION:The pattern is formed of the deposited org. high polymer film jointly using the another masking film. For example, the pattern is formed by coating a PMMA positive type resist film 13 on a substrate, and by forming the pattern of a novolak type positive resist film 14 on said film 13, and then by coating the film 14 with the deposited org. high polymer film 10, and then by giving anisotropy to the obtd. film, thereby forming the novolak type positive resist film pattern 14 which remains the deposited org. high polymer film 10 on a side of the film pattern 14, and then by masking the novolak type positive resist film pattern 14, and by exposing the PMMA positive type resist film 13 to pattern it. And the deposited org. high polymer film 10 is stuck between the PMMA positive type resist film 13 and the novolak type positive resist film pattern 14 followed by patterning it.

Description

【発明の詳細な説明】 し概要］ レジスト膜などのマスクと蒸着有機高分子膜とを併用し
て、窓パターンなどの微細なパターンを高精度に形成す
る。[Detailed Description of the Invention] Summary] A mask such as a resist film and a vapor-deposited organic polymer film are used in combination to form a fine pattern such as a window pattern with high precision.

［産業上の利用分野］ 本発明シ１１半導体装置の製造方法に係り、特に、パタ
ーンニング方法に関する。[Industrial Application Field] The present invention relates to a method of manufacturing a semiconductor device, and particularly relates to a patterning method.

Ｉｃなど、半導体装置の製造力性において、ＪＩｋも重
要なプロセスの−・つにパターンを’！Ｊ：真１；［削
性で形成する、所謂フォ（・プ「ｌセスがあり、現？１
１、ＩＣが微細化され、高集積化されてきた昔日り、’
−４：ｔ、このフォトプロセスの進歩が大きく貢献し′
（いる。JIk is one of the important processes in the manufacturing efficiency of semiconductor devices such as Ic. J: true 1;
1. Back in the day, when ICs were miniaturized and highly integrated.
-4:t, this progress in photoprocessing has made a major contribution.'
(There is.

一方、ＩＣは高集積化、高密度化する程、高速に動作す
る等、高性能化される利点があ幻、そのため、Ｉｃを一
層高集積化する検討が続行されているが、そうすれば、
多層配線などで表面の凹凸が激しくなって段差ができ、
その段差上に１戚細パターンを高精度に形成しなければ
ならないと云う難かしい問題を起きてくる。On the other hand, the higher the integration and density of ICs, the higher the performance, such as faster operation, and the benefits of higher performance are looming.For this reason, studies are continuing to make ICs even more highly integrated. ,
Due to multilayer wiring, etc., the surface becomes extremely uneven, creating steps.
This poses the difficult problem of having to form a linear thin pattern with high precision on the step.

しかし、ＩＣの高集積化のためには、このような段差ヒ
のパターンニングは避りることができず、目、つ、その
領域での微細で高精度なパターンの形成が要望されてい
る。However, in order to achieve high integration of ICs, patterning of such steps is unavoidable, and it is required to form fine and highly accurate patterns in these areas. .

［従来の技術と発明が解決しようとする問題点］従来、
段差部にレジスト膜パターンを形成すると、四部と凸部
とではレジスＩ・膜の膜厚が異なり２、てれを露光・現
像すれば四部と凸部とのパターン幅が違ってくる等、高
精度にパターンニングできない問題かあった。即ち、両
方を同時に露光すると、凹部上の膜厚の厚いレジスト膜
部分は露光不足になって、現像すればレジスト膜パター
ンの幅が狭くなり、凸部Ｉ−の膜厚の薄いレジスト膜部
分（、ｉｎ光過度になって、現像すれはレジスト膜パタ
ーンの幅が広くなる。第４図＋ａ＋および［ｂｌはそれ
を示す平面図と断面図で、段差のある半導体基板１上に
形成したネガレジスト膜パターン２を例示しＣいる。[Problems to be solved by conventional techniques and inventions] Conventionally,
When a resist film pattern is formed on the step part, the thickness of the resist I/film differs between the four parts and the convex part2, and if the edge is exposed and developed, the pattern width between the four parts and the convex part becomes different, etc. There was a problem with not being able to pattern accurately. That is, if both are exposed at the same time, the thick resist film portion on the concave portion will be underexposed, and when developed, the width of the resist film pattern will be narrowed, and the thin resist film portion on the convex portion I- ( , the in-light becomes excessive, and the width of the resist film pattern becomes wider due to development. An example of film pattern 2 is shown in FIG.

詳しくは、露光波長とレジスト膜厚とが関連して、パタ
ーン幅は一定しないが、概念的には」二記に説明したよ
うに、レジスト膜パターンの幅がその膜厚に比例して変
わるものである。Specifically, the pattern width is not constant due to the relationship between the exposure wavelength and the resist film thickness, but conceptually, as explained in Section 2, the width of the resist film pattern changes in proportion to its film thickness. It is.

そこで、段差のある部分には、２種類のレジスト膜パタ
ーンを形成するパターンニング方法が提案されてきた。Therefore, a patterning method has been proposed in which two types of resist film patterns are formed in the portion where there is a step difference.

第５図は２層からなるジノシスト膜パターン３，４を半
導体基板１トに形成し７だ例である。露光波長の異なる
レジス１へ膜３を平田するまで厚く塗布し、そのトに、
高感度なレシヌ１１１り４を塗布して、まず、レジスミ
膜パターン４をフォトマスクを用いてｉｌＷ光、現像し
た後、そのレジスト膜パターン４をマスクにして、その
下層のレジスト膜パターン３を露光、現像する。そ・う
すると、解像力が良いために、高精度な膜厚の厚いレジ
スト膜パターン３が形成され、これをマスクにして半導
体基板１をエツチングする。このレジスト膜３．４とし
て具体的には、ＰＭＭＡポジ型レジスト膜（レジスト膜
３）とノボラック系ポジ型レジスト膜（レジスト膜４）
とが、現在常用されている。FIG. 5 shows an example in which seven ginocyst film patterns 3 and 4 consisting of two layers are formed on one semiconductor substrate. The film 3 is applied thickly to the resist 1 with different exposure wavelengths until it becomes flat, and then
After coating the highly sensitive Resinu 111 4 and developing the resist film pattern 4 with ILW light using a photomask, using the resist film pattern 4 as a mask, the underlying resist film pattern 3 is exposed. ,develop. As a result, a thick resist film pattern 3 with high precision is formed due to its good resolution, and the semiconductor substrate 1 is etched using this pattern as a mask. Specifically, the resist film 3.4 includes a PMMA positive resist film (resist film 3) and a novolac positive resist film (resist film 4).
is currently in common use.

即ち、ノボラック系ポジ型レジスト膜Ｃ１ｖ、波長４３
６ｎｍ程度の紫外線に露光されるから、フォトマスクを
用いて露光、現像して、レジスト膜パターン４を形成す
る。一方、ＰＭＭＡポジ型レジスト膜は紫外線に露光さ
れずに、波長２００〜２４０ｎｍ程度の遠紫外線に露光
される。従って、フォトマスクを用いて、ノボラック系
ポジ型レジスト膜バタン４を紫外線露光して形成し、こ
のノボラック系ポジ型レジスト膜パターン４をマスクと
して露光、現像して、ＰＭＭＡポジ型レジスト膜パター
ン３を形成することができる。なお、ソーダガラス基板
に作成したフォトマスクは遠紫外線を透過し難いと云う
問題がこの背景にあり、従って、このような方法を用い
て、解像力の優れたＰＭＭＡポジ型レジスト膜のパター
ンを形成するわけである。That is, novolac positive resist film C1v, wavelength 43
Since it is exposed to ultraviolet light of about 6 nm, it is exposed and developed using a photomask to form a resist film pattern 4. On the other hand, the PMMA positive resist film is not exposed to ultraviolet rays, but is exposed to far ultraviolet rays having a wavelength of about 200 to 240 nm. Therefore, a novolak positive resist film pattern 4 is formed by exposing it to ultraviolet light using a photomask, and the PMMA positive resist film pattern 3 is formed by exposing and developing the novolac positive resist film pattern 4 as a mask. can be formed. The problem behind this is that the photomask made on the soda glass substrate is difficult to transmit deep ultraviolet rays, so this method is used to form a pattern of a PMMA positive resist film with excellent resolution. That's why.

ここに、ＰＭＭＡとはポリメタクリル酸メチルの略称で
、電子ビーム露光やＸ線露光に用いられるレジスト膜で
あり、ノボラック系レジスト膜は一般の紫外線露光用で
、例えば、０ＦＰＲ（商品名）はノボラック系レジスト
である。Here, PMMA is an abbreviation for polymethyl methacrylate, and is a resist film used for electron beam exposure and X-ray exposure. Novolak resist films are for general ultraviolet exposure. For example, 0FPR (trade name) is novolac. It is a type resist.

ところが、このような２層のレジスト膜パターンを形成
する方法は、上層のノボラック系ポジ型レジスト膜の解
像性に律速される問題があり、また、Ｉ）　Ｍ　Ｍ　Ａ
ポジ型レジスト膜とノボラック系ボジ型レジスト膜との
間に中間変質層が形成される等の欠点がある。However, the method of forming such a two-layer resist film pattern has the problem that the resolution of the upper layer novolak positive resist film is rate-determining.
There are drawbacks such as the formation of an intermediate degraded layer between the positive resist film and the novolak positive resist film.

本発明は、このような問題点を除去Ｌ−ζ、■つ、高精
度な微細パターンが形成できるパターンの形成方法を提
案するものである。The present invention proposes a pattern forming method that eliminates these problems and allows formation of highly accurate fine patterns.

し問題点を解決するための一■・段１ そのＬ１的は、蒸着有機高分子膜を他のマスク膜と併用
して、パターンを形成するようにした半導体装置の製造
方法によって達成される。1. Step 1 for solving the problem The L1 goal is achieved by a semiconductor device manufacturing method in which a vapor-deposited organic polymer film is used in combination with another mask film to form a pattern.

例えば、Ｐ　Ｍ　Ｍ　Ａポジ型レジスト膜を塗布し、そ
の−１−にノボラック系ポジ型ｌ・シス１．１１９パタ
ーンを形成し、次いで、その−１−に蒸着り機＾’ｊ＋
　３）　ｉ’　Ｉｆ％′！を被着し、蒸着有機高分子膜
を置去１／１゛？ソシンクして、蒸着有機高分子膜を側
面に残（７にノボラック系ポジ型レジスト膜パターンを
形成した後、そのノボラック系ポジ型ｌノジスト膜バタ
　ンをマスクにして、ｌ）　Ｍ　Ｍ　Ａポジ型レジスト
膜をｙＦＸし゛ζパターンニングする。For example, apply a PMM A positive resist film, form a novolac positive type l.cis 1.119 pattern on the -1-, and then use a vapor deposition machine
3) i'If%'! 1/1゛? (After forming a novolac positive resist film pattern in step 7, use the novolac positive resist film pattern as a mask to leave the vapor-deposited organic polymer film on the side surface.) The resist film is patterned using yFX.

また、ｌ）　Ｍ　Ｍ　Ａポジ型レジスト膜とノボラック
系ポジ型レジスト膜パターンとの間に、蒸着有機、Ｃ４
分子膜を被着してパターンニングする。l) Between the MMA positive resist film and the novolac positive resist film pattern, a vapor-deposited organic, C4
Deposit and pattern a molecular film.

１作用］ 即ち、本発明は蒸着有機高分子膜を用いて、Ｌ層のレジ
スト膜パターンの解像力の不足などを補ない、また、中
間変質層の形成を抑制して、微細パターンを高精度に形
成する。1 Effect] That is, the present invention uses a vapor-deposited organic polymer film to compensate for the lack of resolution of the resist film pattern of the L layer, and also suppresses the formation of an intermediate degraded layer to form fine patterns with high precision. Form.

５二こに、蒸着有機高分子膜とは、例えば、分子式　Ｕ
ｃｌｈ　　　−Ｃ１１２］をもったパリレン（商品名）
などで、粉末（ダイマー）を加熱すると昇華してポリマ
ーとなって被着する高分子の薄膜のことで、酸素プラズ
マによ′つてアッシング（灰化処理）し−ζパターンニ
ングされるものである。52 In this case, a vapor-deposited organic polymer film has, for example, a molecular formula of U
clh -C112] Parylene (trade name)
It is a thin film of polymer that sublimates and becomes a polymer when powder (dimer) is heated, and is patterned by ashing (ashing treatment) using oxygen plasma. .

［実施例］ １）４下、図面を参照して実施例によって詳細に説明す
る。[Examples] 1) 4 Below, examples will be explained in detail with reference to the drawings.

第１図（ａｌ〜（ｅｌは本発明にかかる形成方法（その
口の形成Ｔ稈順断面図を示しており、まず、同図ｆａｔ
に示すように、段差のある半導体基板１１−１−にＰＭ
ＭＡポジ型レジスト膜１３（膜厚１．２メツｍｌ≧ｌ上
）を塗布して、更に、その−１−にノボラック系ポジ型
レジスト膜１４（膜厚数千人）を塗布する。FIG. 1 (al to (el) shows a forming method according to the present invention (a sectional view of the forming T culm in the order of the mouth).
As shown in FIG.
An MA positive resist film 13 (thickness: 1.2 ml≧l) is applied, and then a novolak positive resist film 14 (thickness: several thousand ml) is applied on -1-.

次いで、第１図（ｂｌに示すように、フォトマスク（図
示セず）を用いて、ノボラック系ボシノ型レジスト膜１
４を紫夕）線露光、現像して、パターンを形成する。次
いで、同図（Ｃ１に示すように、その上にパリレン１０
（膜厚５０００人程度）を蒸着する。Next, as shown in FIG.
4) is line exposed and developed to form a pattern. Then, as shown in the same figure (C1), Parylene 10
(film thickness of about 5,000 layers) is deposited.

次いで、第１図（ｄｌに示すように、直上から酸素プラ
ズマによってパリレン１０をアッシングする。Next, as shown in FIG. 1 (dl), the parylene 10 is ashed directly above using oxygen plasma.

この異方性エツチングによって、上記のノボラック系ポ
ジ型レジスト膜パターン１４の側面にのみ、パリレン１
０が残存する。次いで、第１図（ｅ）に示すように、こ
のパリレン１０を側端にもつノボラック系ポジ型レジス
ト膜パターン１４をマスクにして、ＰＭＭＡポジ型レジ
スト膜１３を遠紫夕Ｉ線で露光し、現像してパターンを
形成する。By this anisotropic etching, parylene 1 is formed only on the side surfaces of the novolac positive resist film pattern 14.
0 remains. Next, as shown in FIG. 1(e), using the novolac positive resist film pattern 14 having the parylene 10 at the side end as a mask, the PMMA positive resist film 13 is exposed to deep-violet I-ray. Develop to form a pattern.

このようにすれば、従来はノボラック系ポジ型レジスト
膜パターン１４の解像限界によって、１〜’ｌｌｔｍ前
後のパターンしか形成されなかったが、−１−記の方法
によれば、ＰＭＭＡポジ型レジスト膜］３１；ｌ解像力
、感度ともに優れたものであるから、その特性が活され
て、サブミクロンの微細パターンを形成することができ
る。Conventionally, due to the resolution limit of the novolak positive resist film pattern 14, only patterns of around 1 to 'lltm could be formed, but according to the method described in -1- Film] 31: Since it has excellent resolution and sensitivity, its characteristics can be utilized to form submicron fine patterns.

次に、第２図（ａ）〜（８１は本発明にかかる他の形成
方法（その■）の形成工程順断面図を示している。Next, FIGS. 2(a) to (81) show sequential cross-sectional views of forming steps of another forming method (part 2) according to the present invention.

これば、同図（ａｌ　Ｌこ示すように、半導体基板１１
上に絶縁膜１２が形成されており、それに窓開けする例
である。まず、同図ｔａ＋に示すように、絶縁膜１２上
に解像性の良いレジスト膜２４（膜厚数千人程度）を塗
布し、次いで、同図（ｂｌに示すように、レジスト）１
り２４を露光、現像して１μ、１ｘ１μｍの方形窓パタ
ーンが得られたとする。As shown in the same figure (al L), the semiconductor substrate 11
This is an example in which an insulating film 12 is formed on top and a window is opened in it. First, as shown in ta+ in the same figure, a resist film 24 with good resolution (film thickness of about several thousand layers) is coated on the insulating film 12, and then, as shown in bl in the same figure, a resist film 24 (film thickness of about several thousand layers) is coated on the insulating film 12.
It is assumed that a rectangular window pattern of 1 μm and 1×1 μm is obtained by exposing and developing the film 24.

次いで、第２図（Ｃ）に示すように、上記例と同じく、
その十にパリレン１０（膜厚２０００人程度）を蒸着し
、次いで、同図（ｄｌに示すように、直−トから酸素プ
ラズマによってパリレン１０をアッシングして、異方性
エツチングをおこなって、上記のレジスト膜パターン２
４の側面にのみ、パリレン１０を残存させる。そうする
と、０．６μｍ　ｘｏ、　６１’　ｍの方形窓パターン
を得ることかできる。従つで、このカー形窓パターンを
マスクにして、絶縁膜１２を工・ノチングすると、第２
図（ｅｌに示すように、絶縁膜＋２に約０．６平方μｍ
のサブミクロン窓が形成されて、一層微細なパターンの
形成かできる。Next, as shown in FIG. 2(C), as in the above example,
Parylene 10 (film thickness of about 2,000 layers) is deposited on the surface, and then, as shown in the same figure (dl), Parylene 10 is ashed with oxygen plasma from a direct hole to perform anisotropic etching. resist film pattern 2
Parylene 10 is left only on the sides of 4. Then, a rectangular window pattern of 0.6 μm xo, 61' m can be obtained. Therefore, when the insulating film 12 is etched and notched using this Kerr-shaped window pattern as a mask, the second
As shown in the figure (el), approximately 0.6 square μm is applied to the insulating film +2.
submicron windows are formed, allowing for the formation of even finer patterns.

次に、第３図（ａｌ〜（ｄ）は本発明にかかる史に他の
形成方法（そのＩＩ＋　）の形成工程順断面図を示して
いる。まず、同図（ａｌに示すように、段差のある半導
体基板１１七にＰＭＭＡポジ型レシスし＝　ＩＩ焚１３
（膜厚１．２μｍｌＮ上）を塗布し、１５０〜２００°
Ｃでヘーキングして、その上にパリレン１０（膜厚０．
５μｍ前後）を被着し、更に、その上にノボラック系ポ
ジ型レジスト膜１４（膜厚数千人）を塗布して９０〜１
００℃でヘーキングする。Next, FIGS. 3(al to d) show sequential cross-sectional views of the forming process of another forming method (part II+) according to the present invention. First, as shown in FIG. PMMA positive type resist on semiconductor substrate 117 with = II firing 13
(on a film thickness of 1.2 μmlN) and 150 to 200°
C and then layer Parylene 10 (film thickness 0.
5 μm), and then coated with a novolac positive resist film 14 (film thickness of several thousand) on top of it.
Hake at 00°C.

次いで、第３図（ｂ）に示すように、フォトマスク（図
示せず）を用いて、ノボラック系ポジ型レジスト膜１４
を紫外線露光、現像し、更に、約１２０℃でポストヘー
クして、パターンを形成する。次いで、同図［Ｃ）に示
すように、酸素ブラスマによってバリ１／ン１０をアッ
シングしてＷ方性エツチングをおこなって、−１−記の
ノボラック系ポジ型レソス１膜パターン１４の側面にの
み、パリレン１０を残存さ〜Ｉ！る。次いで、第３図（
ｄ＋に示すように、このパリレンＩＯを側端にもつノボ
ラック系ポジ型レジスト膜パターン１４をマスクにして
、ＰＭＭＡポジ型レシスし−１１’Ｊ　Ｉ　３を遠紫外
線で露光し、現像してパターンを形成する。Next, as shown in FIG. 3(b), a novolac-based positive resist film 14 is formed using a photomask (not shown).
is exposed to ultraviolet light, developed, and further post-haked at about 120°C to form a pattern. Next, as shown in FIG. 1C, the burr 1/10 is ashed with an oxygen blaster and W directional etching is performed to form only the side surface of the novolak positive type resos 1 film pattern 14 marked -1-. , Parylene 10 remains~I! Ru. Next, Figure 3 (
As shown in d+, using the novolak positive resist film pattern 14 having this parylene IO at the side edge as a mask, a PMMA positive resist film is exposed to -11'J I 3 with deep ultraviolet rays and developed to form the pattern. Form.

このようにすれば、従来、ノボラック系ポジ型レジスト
膜１４とＰＭＭＡポジ型レジスト膜１３との界面に形成
されていた中間変質層が、パリレン１０を介在さ・υる
ために形成されず、従来の２層レジスト膜パターンの欠
点が除去されて、一層高精度なＩ）　Ｍ　Ｍ　Ａポジ型
レジスト膜パターンが得られる。In this way, the intermediate degraded layer that was conventionally formed at the interface between the novolac positive resist film 14 and the PMMA positive resist film 13 is not formed due to the interposition of parylene 10, and The defects of the two-layer resist film pattern are removed, and a more accurate I) MM A positive resist film pattern is obtained.

従来、中間変質層はノボラック系ポジ型レジスト膜１４
の溶剤によってＰＭＭＡが溶かされて形成されていたと
考えられ、パリレン１０はその溶剤に不溶のために、そ
の介在によって中間変質層が解消されるものである。Conventionally, the intermediate altered layer is a novolak positive resist film 14.
It is thought that the PMMA was formed by being dissolved in the solvent, and since Parylene 10 is insoluble in the solvent, the intermediate altered layer is eliminated by its intervention.

−１−記の実施例のように、パリレンのような蒸着有機
高分子膜は他のマスクとｆｄｌ用すると、（戯ｊ、１１
１パターンの高精度化に極めて有効となるものである。As in the example described in -1-, when a vapor-deposited organic polymer film such as parylene is used with other masks and fdl,
This is extremely effective in increasing the accuracy of one pattern.

［発明の効果］ 以上の説明から明らかなよ・うに、本発明によれば蒸着
有機高分子膜を利用して、高精度な１肢細パターンが得
られ、ＩＣなど、半導体装置の高性能化に大きく寄与す
るものである。[Effects of the Invention] As is clear from the above description, according to the present invention, a highly accurate one-limb pattern can be obtained by using a vapor-deposited organic polymer film, and the performance of semiconductor devices such as ICs can be improved. This will greatly contribute to the

【図面の簡単な説明】[Brief explanation of drawings]

第１図＋８１〜ｆｅ）　、第２図（ａ）〜（ｅ）および
第３図（ａｌ　−ｆｄｌは本発明にかかる実施例の形成
工程順断面図、第４図（ａｌ、　（ｂｌは従来の１層の
レジスト膜パターン形成の平面図と断面図、 第５図は従来の２層のレジスト膜パターン形成の断面図
である。 図において、 １．１１は半導体基板、 ２．３．４はレジスト１模パターン、 １０はパリレン（蒸着有機高分子膜）、１２ば絶縁膜、 １３はＰＭＭＡポジ型レジスト膜、 １４はノボラック系ポジ型レジスト膜 ４発θ月にＸ７Ｖ７３非勿へ方既　（予め■）第１図 不兆明にかか）形成方ま（５１） 第２図 ５杢７と０月にカ切・〕力形へか云　（ｆｎＩ）第３図 ＤＪ−ｔｙ＋　　Ｉ；’ｆ　ｙ＋　ＬＳ’１１４１　Ｒ
７−＞＠Ａ’ｒｌ！Ｊ第４ｒ！Ｍ 第　５Ｗｉ1+81 to fe), FIGS. 2(a) to (e), and FIG. 3 (al-fdl are sectional views in the order of forming steps of the embodiment according to the present invention, and FIG. 4 (al, (bl is conventional 5 is a plan view and a cross-sectional view of the formation of a conventional two-layer resist film pattern. In the figure, 1.11 is a semiconductor substrate, and 2.3.4 is a semiconductor substrate. Resist 1 mock pattern, 10 is parylene (vapor deposited organic polymer film), 12 is an insulating film, 13 is a PMMA positive resist film, 14 is a novolac positive resist film 4 shots ■) Fig. 1 Indication light) How to form (51) Fig. 2 Cut at 7 and 0 month in Fig. 5,] Force shape (fnI) Fig. 3 DJ-ty + I;'f y+ LS'1141 R
7->@A'rl! J 4th r! M 5th Wi

Claims (4)

【特許請求の範囲】[Claims] （１）蒸着有機高分子膜を他のマスク膜と併用して、パ
ターンを形成するようにしたことを特徴とする半導体装
置の製造方法。(1) A method for manufacturing a semiconductor device, characterized in that a vapor-deposited organic polymer film is used in combination with another mask film to form a pattern. （２）ＰＭＭＡポジ型レジスト膜を塗布し、該ＰＭＭＡ
ポジ型レジスト膜上にノボラック系ポジ型レジスト膜パ
ターンを形成し、次いで、該レジスト膜パターンの上に
蒸着有機高分子膜を被着し、該蒸着有機高分子膜を異方
性アッシングして、該蒸着有機高分子膜を側面に残した
前記ノボラック系ポジ型レジスト膜パターンを形成した
後、該ノボラック系ポジ型レジスト膜パターンをマスク
にして、前記ＰＭＭＡポジ型レジスト膜を露光してパタ
ーンニングするようにしたことを特徴とする特許請求の
範囲第１項記載の半導体装置の製造方法。(2) Apply a PMMA positive resist film, and
forming a novolak positive resist film pattern on the positive resist film, then depositing a vapor-deposited organic polymer film on the resist film pattern, anisotropically ashing the vapor-deposited organic polymer film, After forming the novolak positive resist film pattern with the vapor-deposited organic polymer film left on the side surfaces, the PMMA positive resist film is exposed and patterned using the novolac positive resist film pattern as a mask. A method of manufacturing a semiconductor device according to claim 1, characterized in that: （３）所定のマスクパターンの上に蒸着有機高分子膜を
被着し、該蒸着有機高分子膜を異方性アッシングして、
該蒸着有機高分子膜を側面に残した前記マスクパターン
を形成した後、該マスクパターンによって被処理層をパ
ターンニングするようにしたことを特徴とする特許請求
の範囲第１項記載の半導体装置の製造方法。(3) depositing a vapor-deposited organic polymer film on a predetermined mask pattern, anisotropically ashing the vapor-deposited organic polymer film,
The semiconductor device according to claim 1, wherein after forming the mask pattern leaving the vapor-deposited organic polymer film on the side surface, the layer to be processed is patterned using the mask pattern. Production method. （４）ＰＭＭＡポジ型レジスト膜を塗布し、該ＰＭＭＡ
ポジ型レジスト膜上に蒸着有機高分子膜を被着し、該蒸
着有機高分子膜の上にノボラック系ポジ型レジスト膜を
塗布し、次いで、該ノボラック系ポジ型レジスト膜、蒸
着有機高分子膜およびＰＭＭＡポジ型レジスト膜を順次
にパターンニングするようにしたことを特徴とする特許
請求の範囲第１項記載の半導体装置の製造方法。(4) Apply a PMMA positive resist film, and
A vapor deposited organic polymer film is deposited on the positive resist film, a novolac positive resist film is applied on the vapor deposited organic polymer film, and then the novolak positive resist film and the vapor deposited organic polymer film are coated. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the PMMA positive resist film is sequentially patterned.
JP24665585A 1985-11-01 1985-11-01 Production of semiconductor device Pending JPS62106456A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24665585A JPS62106456A (en) 1985-11-01 1985-11-01 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24665585A JPS62106456A (en) 1985-11-01 1985-11-01 Production of semiconductor device

Publications (1)

Publication Number Publication Date
JPS62106456A true JPS62106456A (en) 1987-05-16

Family

ID=17151645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24665585A Pending JPS62106456A (en) 1985-11-01 1985-11-01 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS62106456A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0313814A2 (en) * 1987-10-30 1989-05-03 International Business Machines Corporation Organic sidewall structures
US4838991A (en) * 1987-10-30 1989-06-13 International Business Machines Corporation Process for defining organic sidewall structures
US4871630A (en) * 1986-10-28 1989-10-03 International Business Machines Corporation Mask using lithographic image size reduction
JPH0269755A (en) * 1988-07-28 1990-03-08 Korea Electron Telecommun Method of forming fine line width by utilizing spacer
US5795830A (en) * 1995-06-06 1998-08-18 International Business Machines Corporation Reducing pitch with continuously adjustable line and space dimensions

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4871630A (en) * 1986-10-28 1989-10-03 International Business Machines Corporation Mask using lithographic image size reduction
EP0313814A2 (en) * 1987-10-30 1989-05-03 International Business Machines Corporation Organic sidewall structures
US4838991A (en) * 1987-10-30 1989-06-13 International Business Machines Corporation Process for defining organic sidewall structures
JPH0269755A (en) * 1988-07-28 1990-03-08 Korea Electron Telecommun Method of forming fine line width by utilizing spacer
JPH0579980B2 (en) * 1988-07-28 1993-11-05 Korea Electronics Telecomm
US5795830A (en) * 1995-06-06 1998-08-18 International Business Machines Corporation Reducing pitch with continuously adjustable line and space dimensions

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