JPS62105485A - Manufacture of semiconductor substrate - Google Patents
Manufacture of semiconductor substrateInfo
- Publication number
- JPS62105485A JPS62105485A JP60245469A JP24546985A JPS62105485A JP S62105485 A JPS62105485 A JP S62105485A JP 60245469 A JP60245469 A JP 60245469A JP 24546985 A JP24546985 A JP 24546985A JP S62105485 A JPS62105485 A JP S62105485A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- photoelectric conversion
- reflected
- light
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 239000000758 substrate Substances 0.000 title claims abstract description 25
- 238000004519 manufacturing process Methods 0.000 title claims description 6
- 238000000034 method Methods 0.000 claims description 13
- 238000000151 deposition Methods 0.000 claims description 11
- 230000008021 deposition Effects 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 7
- 238000006243 chemical reaction Methods 0.000 abstract description 21
- 229910052710 silicon Inorganic materials 0.000 abstract description 9
- 239000010703 silicon Substances 0.000 abstract description 9
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 8
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052750 molybdenum Inorganic materials 0.000 abstract description 5
- 239000011733 molybdenum Substances 0.000 abstract description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 5
- 150000003376 silicon Chemical class 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 14
- 238000010586 diagram Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 239000004020 conductor Substances 0.000 description 3
- 238000000354 decomposition reaction Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- 241000257465 Echinoidea Species 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- BTYUGHWCEFRRRF-UHFFFAOYSA-N [As].[K] Chemical compound [As].[K] BTYUGHWCEFRRRF-UHFFFAOYSA-N 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000009795 derivation Methods 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010304 firing Methods 0.000 description 1
- 150000004678 hydrides Chemical class 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 150000002894 organic compounds Chemical class 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- NTHWMYGWWRZVTN-UHFFFAOYSA-N sodium silicate Chemical compound [Na+].[Na+].[O-][Si]([O-])=O NTHWMYGWWRZVTN-UHFFFAOYSA-N 0.000 description 1
- 241000894007 species Species 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 238000005979 thermal decomposition reaction Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 239000011345 viscous material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0236—Special surface textures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/054—Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means
- H01L31/056—Optical elements directly associated or integrated with the PV cell, e.g. light-reflecting means or light-concentrating means the light-reflecting means being of the back surface reflector [BSR] type
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/52—PV systems with concentrators
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Photovoltaic Devices (AREA)
Abstract
Description
【発明の詳細な説明】
産系−し９刊用−分野
本発明（Ｊ、半導体基体の製造法、特に太陽電池の製造
に適１７に半導体基体の製造に関する。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention (J) relates to a method for manufacturing a semiconductor substrate, particularly suitable for manufacturing a solar cell.
従来技術
太陽電池等の光電変換装置では、基体面に対して垂直に
近い入射先程有効に利用されろ。なんら機能的な処理が
施されていない、平面状の半導体基体を使用１．構成し
た太陽電池における入射光の分岐の様子を第４図に示す
。一般に、入射光（１）は基体裏面（８）を透過する光
（２）と反射する光（３）とに分かれ、はぼ８０％の光
が透過光（２）となって基体（８）の外へ出ろ。裏面反
射光（３）はさらに表面を透過′４−ろ児（４）と反射
オろ光（５）に分４１ていく。光電変換機能は、光か、
活性領域、４７ｊ′わち、空乏層（６）を横切る時に発
揮さイ］ろので、空乏層（６）を通過４゛ろ光が多い程
、上た、」、ネルギーが大きい程、光電変換効率かＩ７
シ１１“４“ろ。そＪｉ、 ＩＩｌ、、透過光（２）お
よび（４）をなくすこと、換、−；′４゛イ］げ、一旦
入射した光を基体の中に閉し込めろことが出来れば変換
効率はｌＷオろ、１
」１記した目的を達成４゛るＬ段と１．て、半導体１１
１゜体裏面に凹凸を設（３ることが提案されている。裏
面に凹凸を設けた場合の光の進路の概念図を第１図に示
す。はぼ垂直に入射した光（ＩＪ凹凸裏面（Ｉｏ）に垂
直ではなく、一定の角度を持って反射オるため、はぼ全
反射する。その結果、裏面では透過光による損失がほぼ
完全に押さえられる。さらにその反射光（９）も基板表
面（７）に対して垂直ではなく、一定のＩＪ度を持って
反射するため、はぼ全反射ずろ。この、Ｌうに裏面に凹
凸を設：ｊだ場合、一旦入射した光（１）は外へ出るこ
となく、はぼ１００％完全に光電変換に利用できろ。In conventional photovoltaic conversion devices such as solar cells, the incidence angle close to perpendicular to the substrate surface is effectively utilized. 1. Using a flat semiconductor substrate that has not been subjected to any functional treatment. FIG. 4 shows how incident light is split in the constructed solar cell. In general, incident light (1) is divided into light (2) that passes through the back surface (8) of the substrate and light (3) that is reflected, and about 80% of the light becomes transmitted light (2) and returns to the substrate (8). Go outside. The back-reflected light (3) further passes through the front surface into a transmitted light (4) and a reflected light (5). The photoelectric conversion function is based on light or
The more light passes through the depletion layer (6), the greater the photoelectric conversion. Efficiency or I7
Shi11 "4"ro. If it is possible to eliminate the transmitted light (2) and (4), and confine the incident light inside the substrate, the conversion efficiency will increase. lW Oh, 1. Achieve the objectives listed in 1. 4 L stage and 1. So, semiconductor 11
It has been proposed to provide unevenness on the back surface of the IJ body. Figure 1 shows a conceptual diagram of the path of light when unevenness is provided on the back surface. Since the reflection is not perpendicular to (Io) but at a certain angle, it is almost totally reflected.As a result, loss due to transmitted light is almost completely suppressed on the back surface.Furthermore, the reflected light (9) is also reflected from the substrate. Since it is reflected not perpendicularly to the surface (7) but with a constant IJ degree, it is almost total reflection.If the back surface of the sea urchin is uneven: j, once the incident light (1) You can use it for 100% photoelectric conversion without going outside.
従来、）１゛導体括体に凹凸を設（Ｊろ手段と１〜で（
Ｊ、５ｉＱｔ結晶の（ｌ［ｉｏ）面をアルカリ水溶液で
異方性の化学研摩を行うことによりピラミッド１［ニ状
が得らイ］ろが、コノ凹凸の頂ｆＱｉｉ８０−９０°ノ
ー 定値となる。この角度（Ｊ１本発明の目的には合致
１．ない。Conventionally, ) 1 conductor body is provided with unevenness ( J filter means and 1 ~ (
By performing anisotropic chemical polishing on the (l[io) plane of the J,5iQt crystal with an alkaline aqueous solution, pyramid 1 [D] shape is obtained. . This angle (J1) does not meet the purpose of the present invention.
−２より、本発明が従来法に比べて優れている点（」、
一定形状の型を用いろ為に、従来法に比べて簡便に、
（Ｆ＠の形状に仕−１−げろことかできる点にあろ１、
ブＣ１すｊｆ／’）ｊ’ｊ −リ
本発明は、入射光を有効利用するために、裏面に微細な
凹凸を有オろゝ１を導体粘体の製造法を提（」（するこ
とを目的どする。-2, the present invention is superior to the conventional method ('',
Because a mold with a fixed shape is used, it is easier than the conventional method.
(The advantage of this invention is that it can be shaped into the shape of F@1, buC1sujf/')j'j The purpose of this paper is to propose a method for producing a conductive viscous material.
発明の構Ｉ求
本発明（」、微細な凹凸を表面に有する堆積用型板１．
に、゛１′導体＋Ａ月を堆積成長さ且た後、両者を剥離
４〜るごとに、Ｌす、平板上１−の凹凸が転写された裏
面構造を有４゛る半導体基体を製造する方法に関する。Structure of the Invention The present invention (1) Deposition template having fine irregularities on its surface.
After depositing and growing the ``1'' conductor + A, each time they are peeled off, a semiconductor substrate having a back surface structure on which the unevenness of 1- on the flat plate is transferred is manufactured. Regarding the method.
本発明方法で（」、」：４゛、第２図に示４゛、＝と３
５、表面に微細な凹凸をｆ１計る堆積用型板ｌに゛Ｉ′
導体＋４１１を堆積さＵ−ろ。堆積用型板としては、半
導体材料の種類や堆積ノｊ法にし上るが、グロー放′市
分解法やスパッタリング等の重積手段とし７て７１ｉＩ
’ｍ Ｆｌ’加を要４゛ろ場合やＩｌｊｔＭ性４曹４−
ろ場合は、導出（’１＋、４ ＩＩ、即ら、金属製の型
ＩＮカ＆ｒＶ ｌ−ｋｌ、、金属＋’ｌ型板と（２ては
、例えば金属モリブデン、タンｒ）スフーン等が例示さ
イ］ろか、坩積嘆と型板との剥離を要する場合は、両者
が容易に剥離１．得ろ、１： ’＋な金り４打月を選択
計へきである。例えは、半導体Ｈ１１と１、て多結晶シ
リコンを用いろ場合（」、そＡ１とｌｌ＃居１、係数の
大きく異なるＭＯを用いるごとによ？）、ｔ［１なろ冷
却によζ）両者を剥離さｌろ５−とがで。−／、。In the method of the present invention ('','': 4'', as shown in FIG. 2, 4'', = and 3
5. ゛I' on the deposition template l to measure the fine irregularities f1 on the surface.
Deposit conductor +411. As a template for deposition, the type of semiconductor material and the deposition method can be used, but as a stacking method such as glow exposure decomposition method or sputtering, 71iI can be used.
'm Fl' must be added in case of 4 or IljtM 4-
In this case, the derivation ('1+, 4 II, i.e., metal mold INka&rV l-kl, metal +'l template and (2, for example, metal molybdenum, tan r), etc. is exemplified. However, if it is necessary to separate the crucible and the template, select 1:'+ metal 4 strokes so that both can be easily peeled off.For example, semiconductor H11 and 1, if polycrystalline silicon is used (A1 and 1, depending on the use of MO with significantly different coefficients?), both must be peeled off by cooling. 5-Togade. -/,.
従って、その様な組合わＵ−（」特に好ましいらい−（
７ある。Therefore, such a combination U-("particularly preferred L-(
There are 7.
堆積用型板（、の凹凸（」鋸歯状、す゛ｒシンカブ状等
種々あるが、その光電変換に効用が大きいｊ［う状は第
１図、第２図に示したような断面構造による一３＝
形状のものが特に好ましい。凹凸の大きさは、ｒｌＪ５
−３０ｆ１７ｚｍ、深さ２２−１Ｏ０７ｚ程度が適当で
ある。また、鋸歯状の凹凸の場合は、第２図に示４−傾
斜角（１６）が３０度以」−１特にシリコン基体で垂直
入射時を考えた場合には、その角度は３０〜４０度が好
ましい。There are various types of deposition templates, such as serrated and cylindrical shapes, but these are most effective for photoelectric conversion. 3 = shape is particularly preferable.The size of the unevenness is rlJ5
-30f17zm and depth of about 22-1007z are appropriate. In addition, in the case of sawtooth-like unevenness, as shown in Figure 2, the angle of inclination (16) is 30 degrees or more. is preferred.
半導体＋（ネ」を型板上に堆積させるには、半導体材料
の種類にもよるが、例えば半導体となる元素を主成分と
する各種の有機化合物あるいは水素化物等の分解反応を
利用する等の方法が例示される。Depositing the semiconductor + (N) on the template depends on the type of semiconductor material, but for example, it is possible to use decomposition reactions of various organic compounds or hydrides whose main components are elements that will become semiconductors. A method is illustrated.
半導体＋Ａ料として多結晶シリコンを用いるときは、モ
ノシランガス（Ｓｉ１１４）の減圧ＣＶＤ法、グロー放
電分解法か特に適している。When polycrystalline silicon is used as the semiconductor+A material, a low pressure CVD method using monosilane gas (Si114) or a glow discharge decomposition method is particularly suitable.
堆積条件そのものは、従来半導体の成膜に用いられた条
件と特に異なるものではない。The deposition conditions themselves are not particularly different from those used for conventional semiconductor film formation.
半導体材料としては、典型的にはシリコンであるか、こ
イ］に限定されるものではなく、他のあらゆる半導体＋
４料、例えばカリウム砒素（ＧａＡｓ）、インジウノ・
燐（ＩｎＰ）等を使用し得る。Semiconductor materials are typically silicon, but are not limited to silicon, and may include any other semiconductor material.
4 materials, such as potassium arsenic (GaAs), indium
Phosphorus (InP) or the like may be used.
本発明で得られる半導体基体は単層であってもよい。こ
の場合は後に、Ｗ種ノし素、例オ（Ｊリン等またはボｌ
：ｌン等を表面まノニは裏面に１・ ブｊ２−で、その
いずれかをｐ型またはｐ型にする。また、本発明半導体
７に体は、堆積（成ｌｌ＊）時に、裏面１・た（３表面
に上記異種元素を導入し、そのいずイ１かをｐ型または
ｐ型に極性調整したものであってもよい。The semiconductor substrate obtained by the present invention may be a single layer. In this case, W species, e.g.
: The front side of the surface is 1, 2-, etc., and either one of them is made p-type or p-type. In addition, the semiconductor 7 of the present invention may have the above-mentioned different elements introduced into the back surface 1 and the surface 3 during deposition (formation*), and the polarity of one of the elements 1 and 1 may be adjusted to p-type or p-type. It may be.
以下多結晶シリコン半導体基体を例にとって、その製造
法を説明する。The manufacturing method will be described below by taking a polycrystalline silicon semiconductor substrate as an example.
微細凹凸（深さＩ ０μｍ、ｉＮ Ｏ０７ｚｍ、傾斜角
度３５度）を有する金属モリブデン板（１００ｘ１００
ＸＩ００ｍｍ）を真空反応室（２ｘｌＯ’Ｔｏｒｒ）中
に設置し、型板温度を６００〜９００℃として維持する
。熱分解法により、１−記モリブデン板上にに多結晶シ
リコン半導体層（１３）を形成させた（膜厚１０〜１０
０μ）。得られろシリコン半導体層はｐ型である。その
後、供給ガスを導市１２、窒素ガス等の不活性雰囲気に
切換えろと同時に、型板温度を低下さｕ７Ｉｏ ンリコ
ン坩積層（１３）は、モリブデン金属との熱膨張係数の
差により、型板（１１）より剥離する。剥離面（１４）
には、型板凹凸而（１２）か転写さＡ１ろ３、さらに、
剥離面（１４）での反射率を１１・月Ｕに・１ろ３ｊ−
パ）に機械研摩等の表面処理を施４１、シリコン゛しｑ
体層（１３）の剥離面（１４）の反対側のノリコンＪ、
１体曲（１５）ｉＪ、化学研屋法等により、串ハ゛トな
１ｆ１１と１−７てイ１１．ばてもよいし、表面デクス
チャエゾーＪ′−ンタを１１ＩＩ！（、た而に仕１−げ
てちよい。Metallic molybdenum plate (100x100
XI00mm) is placed in a vacuum reaction chamber (2xlO'Torr) and the template temperature is maintained at 600-900<0>C. A polycrystalline silicon semiconductor layer (13) was formed on the molybdenum plate described in 1-1 by a thermal decomposition method (thickness: 10-10
0μ). The silicon semiconductor layer obtained is p-type. After that, the supply gas is switched to an inert atmosphere such as nitrogen gas, and at the same time the template temperature is lowered. (11) Peel off. Peeling surface (14)
The pattern plate is uneven (12) or transferred A1 and 3, and
The reflectance on the peeled surface (14) is 11・month U・1ro3j−
Surface treatment such as mechanical polishing is applied to silicone
Noricon J on the opposite side of the peeled surface (14) of the body layer (13),
1 body song (15) iJ, Kagakukenya method, etc., skewer-height 1f11 and 1-7 are 11. You can also use the surface texture roller 11II! (But you can do it.
ごの４１））にして得らイ］たシリ：ＩンＪＩ（体を用
いて通′畠（ハ製市力法で、人陽市／１１シ素了を作製
ｌ−る。その素ｒ構〕６を第３図に示４−ｏ半導体基体
（２３）は、Ｉ）型ノ１１ ：：ｌンイ６１１品で、そ
の基体の−１−面に、ｎ型不純物の〃１拡牧処理により
１１型層（１７）を形成十ろ。41))) Using the body, we created the Renyo City/11 Shiryo by using the body. ] 6 is shown in FIG. 3. The 4-o semiconductor substrate (23) is an I) type No. 11::ln-611 product, and the −1-plane of the substrate is treated with an n-type impurity by an expansion treatment. Form 11 type layer (17).
Ｉ）’！’１．１ｍ （２４）とｎ Ｉ（’！ Ｉｌ’
ｌＩ （１７）の界面は、光電変換効率の高い部分であ
ろ空乏層（１８）が構成されろ。光電変換により）発生
４−ろ電流は、電極（１９）および（２ｏ）より取りＮ
Ｎ−ｏ電極の取り何口方法としては、蒸着技術、印刷焼
成法等が使用でΔろ。電極（１９）の形状は、」Ｉ（体
内面での反射を考慮１．た［、で、微小の傾斜面に加１
置−でおくことが望ましく、特に、ＪＩＩ；体間凸面（
２２）のｊ［ツ状に加工するのか最も望ま１゜し）。電
極（２０）は、入射光（２５）の透過を妨げないように
、格子状に配置する。I)'! '1.1m (24) and n I('! Il'
The interface of lI (17) is a portion with high photoelectric conversion efficiency and constitutes a depletion layer (18). The current generated (by photoelectric conversion) is taken from the electrodes (19) and (2o).
Vapor deposition technology, printing/firing method, etc. can be used to form the N-o electrode. The shape of the electrode (19) is 1.
It is desirable to leave it in place, especially JII;
22) j [The most desirable angle is 1° to process into a square shape). The electrodes (20) are arranged in a grid pattern so as not to impede transmission of the incident light (25).
次に、本装置の動作について述べろ。受）し表面（２１
）に）一方から垂直あるいはそれに返いｊｆ１度で光か
入る。入射光（２５）の一部（」、表面（２１）で反射
されろか、大部分！Ｊ： Ａ１体（２３）内に入る。そ
１．で、活性領域であろ空乏層（１８）を垂直に横切る
。入射光成分の内、短波長）冒二つい−（′（」、空乏
層（１８）のイ、１近で吸収されて光電変換かさイする
が、より長波長光（上、裏面電極とのν／１１ｔｉ １
でヤ１１ふｔ、−’ｒ全反射さイする。反射光（２６）
は、（１）ひ空乏層（１８）を横ＱＪり表面（２１）で
↑反ｆｌ・Ｉ４−ろ５１５、−のように、甲偉体基体Ｃ
２３）の内部で多重反射を繰返ｉｌ゛、−、：に、１
ｉｌ、空乏層（１８）を多数回横切り、うし電変換が損
失なく行／ｌｆ イ）れる。ごの現象を光電し込め効果
と称４−る。この効果は、従来の構造（第４図）−（二
はほとんと期待できない。従来の構造をした光電変換素
子で１２％の変換効率の６ので６、本発明による構造（
図３）にすると１３〜１５％の変換効率か得られろ。Next, describe the operation of this device. surface (21)
)) Light enters perpendicularly from one side or at a angle of 1 degree from one side. A part of the incident light (25) is reflected by the surface (21), or most of it! J: enters the A1 body (23). Among the incident light components, the short wavelength) is absorbed near the depletion layer (18) and photoelectrically converted, but the longer wavelength light (the upper and lower ν/11ti 1 with electrode
At 11 feet, -'r total internal reflection is detected. Reflected light (26)
(1) Transversely QJ the depletion layer (18) on the surface (21) ↑ anti-fl・I4-RO 515,-, the upper body substrate C
23), multiple reflections are repeated inside il゛, -, :, 1
il, the depletion layer (18) is crossed many times, and insulator conversion is performed without loss. This phenomenon is called the photoelectric injection effect. This effect cannot be expected with the conventional structure (Figure 4) - (2).The photoelectric conversion element with the conventional structure has a conversion efficiency of 12%, so the structure according to the present invention (6) has a conversion efficiency of 12%.
Figure 3) would give a conversion efficiency of 13 to 15%.
発明の効果
本発明により、゛１−導体基体の表面が所望の形状で得
ることがでΔ、その結果、光電変換効率を大幅に高める
構造を有した光電変換素子を提供４−ろことかできる。Effects of the Invention The present invention provides a photoelectric conversion element having a structure in which the surface of the conductive substrate can be obtained in a desired shape, and as a result, the photoelectric conversion efficiency can be significantly increased. .
第１図（Ｊ、裏面凹凸構造での光の進路を示す図、第２
図は、本発明にお（ｊろ凹凸の転写を示す概念図、第３
図は、本発明により作製した太陽Ｎ他素子の構造を示４
−図、第４図は、従来構造での光の進路を示す図である
、。
図中の記号（１以上の通りである。
ｌ ・入射光、 ２ 透過光、 ３・・・反射光、４・
透過）し、 ５ 反射光、 ６・・・空乏層、７ 基
体表面、８・・・ｉｋ体裏面、９・・反射光、１０
凹凸裏面、 １１・金属モリブデン型板、１２・・・型
板凹凸面、１３・シリコン半導体層、１４・剥離面、
１５ シリコン基体面、１６・・・傾斜角度、１７
・ ｎ型層、１８・・・空乏層、１９・電極、 ２０
・・・電極、 ２１・・受光表面、２２・・・基体凹
凸面、２３・・・半導体基体、２４・・・ｐ型層、 ２
５・・・入射光、 ２６・・・反射光。
第１図
第２図Figure 1 (J, Diagram showing the path of light on the uneven back surface structure, Figure 2
The figure is a conceptual diagram showing the transfer of unevenness according to the present invention.
The figure shows the structure of a solar element manufactured according to the present invention.
- Figure 4 is a diagram showing the path of light in a conventional structure. Symbols in the figure (1 or more. 1. Incident light, 2. Transmitted light, 3. Reflected light, 4.
5 Reflected light, 6... Depletion layer, 7 Substrate surface, 8... Ik body back surface, 9... Reflected light, 10
Uneven back surface, 11. Metallic molybdenum template, 12... Uneven surface of template, 13. Silicon semiconductor layer, 14. Peeling surface.
15 Silicon substrate surface, 16... Inclination angle, 17
・N-type layer, 18...depletion layer, 19・electrode, 20
...Electrode, 21.. Light-receiving surface, 22.. Base uneven surface, 23.. Semiconductor substrate, 24.. P-type layer, 2
5...Incoming light, 26...Reflected light. Figure 1 Figure 2
Claims (1)
材料を堆積成長させた後、両者を剥離することにより、
型板上の凹凸が転写された裏面構造を有する半導体基体
を製造する方法。1. By depositing and growing a semiconductor material on a deposition template having fine irregularities on its surface, and then peeling off both,
A method for manufacturing a semiconductor substrate having a back surface structure on which the irregularities on a template are transferred.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60245469A JPS62105485A (en) | 1985-10-31 | 1985-10-31 | Manufacture of semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60245469A JPS62105485A (en) | 1985-10-31 | 1985-10-31 | Manufacture of semiconductor substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62105485A true JPS62105485A (en) | 1987-05-15 |
Family
ID=17134122
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60245469A Pending JPS62105485A (en) | 1985-10-31 | 1985-10-31 | Manufacture of semiconductor substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62105485A (en) |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01111887A (en) * | 1987-09-08 | 1989-04-28 | Westinghouse Electric Corp <We> | Etching of silicon dendrite web crystal |
| JPH05343712A (en) * | 1992-06-05 | 1993-12-24 | Hitachi Ltd | Manufacture of tandem heterogeneous photoelectric conversion element |
| JP2011023418A (en) * | 2009-07-13 | 2011-02-03 | Hamamatsu Photonics Kk | Semiconductor photodetecting element and method for manufacturing the same |
| JP2011023417A (en) * | 2009-07-13 | 2011-02-03 | Hamamatsu Photonics Kk | Semiconductor optical detecting element, and method of manufacturing the same |
| JP2012142568A (en) * | 2010-12-17 | 2012-07-26 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion element |
| JP2013115434A (en) * | 2011-11-25 | 2013-06-10 | Qinghua Univ | Solar cell and manufacturing method therefor |
| US8575476B2 (en) | 2007-07-13 | 2013-11-05 | Omron Corporation | CIS solar cell and method for manufacturing the same |
| US8809675B2 (en) | 2011-12-16 | 2014-08-19 | Tsinghua University | Solar cell system |
| US8871533B2 (en) | 2011-12-29 | 2014-10-28 | Tsinghua University | Method for making solar cell and solar cell system |
| US9012767B2 (en) | 2011-12-16 | 2015-04-21 | Tsinghua University | Solar cell system |
| US9209335B2 (en) | 2011-12-09 | 2015-12-08 | Tsinghua University | Solar cell system |
| US9349894B2 (en) | 2011-12-29 | 2016-05-24 | Tsinghua University | Solar cell and solar cell system |
| US9349890B2 (en) | 2011-12-29 | 2016-05-24 | Tsinghua University | Solar cell and solar cell system |
| JP2017092502A (en) * | 2009-02-24 | 2017-05-25 | 浜松ホトニクス株式会社 | Manufacturing method of photodiode |
| US9972729B2 (en) | 2009-02-24 | 2018-05-15 | Hamamatsu Photonics K.K. | Photodiode and photodiode array |
-
1985
- 1985-10-31 JP JP60245469A patent/JPS62105485A/en active Pending
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01111887A (en) * | 1987-09-08 | 1989-04-28 | Westinghouse Electric Corp <We> | Etching of silicon dendrite web crystal |
| JPH05343712A (en) * | 1992-06-05 | 1993-12-24 | Hitachi Ltd | Manufacture of tandem heterogeneous photoelectric conversion element |
| US8575476B2 (en) | 2007-07-13 | 2013-11-05 | Omron Corporation | CIS solar cell and method for manufacturing the same |
| US9972729B2 (en) | 2009-02-24 | 2018-05-15 | Hamamatsu Photonics K.K. | Photodiode and photodiode array |
| JP2017092502A (en) * | 2009-02-24 | 2017-05-25 | 浜松ホトニクス株式会社 | Manufacturing method of photodiode |
| JP2011023417A (en) * | 2009-07-13 | 2011-02-03 | Hamamatsu Photonics Kk | Semiconductor optical detecting element, and method of manufacturing the same |
| JP2011023418A (en) * | 2009-07-13 | 2011-02-03 | Hamamatsu Photonics Kk | Semiconductor photodetecting element and method for manufacturing the same |
| JP2012142568A (en) * | 2010-12-17 | 2012-07-26 | Semiconductor Energy Lab Co Ltd | Photoelectric conversion element |
| JP2016154243A (en) * | 2010-12-17 | 2016-08-25 | 株式会社半導体エネルギー研究所 | Photoelectric conversion element |
| JP2013115434A (en) * | 2011-11-25 | 2013-06-10 | Qinghua Univ | Solar cell and manufacturing method therefor |
| US9209335B2 (en) | 2011-12-09 | 2015-12-08 | Tsinghua University | Solar cell system |
| US8809675B2 (en) | 2011-12-16 | 2014-08-19 | Tsinghua University | Solar cell system |
| US9012767B2 (en) | 2011-12-16 | 2015-04-21 | Tsinghua University | Solar cell system |
| US10109757B2 (en) | 2011-12-16 | 2018-10-23 | Tsinghua University | Solar cell system |
| US8871533B2 (en) | 2011-12-29 | 2014-10-28 | Tsinghua University | Method for making solar cell and solar cell system |
| US9349890B2 (en) | 2011-12-29 | 2016-05-24 | Tsinghua University | Solar cell and solar cell system |
| US9349894B2 (en) | 2011-12-29 | 2016-05-24 | Tsinghua University | Solar cell and solar cell system |
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