JPS621000B2 - - Google Patents

Info

Publication number
JPS621000B2
JPS621000B2 JP53157497A JP15749778A JPS621000B2 JP S621000 B2 JPS621000 B2 JP S621000B2 JP 53157497 A JP53157497 A JP 53157497A JP 15749778 A JP15749778 A JP 15749778A JP S621000 B2 JPS621000 B2 JP S621000B2
Authority
JP
Japan
Prior art keywords
plating
wafer
semiconductor wafer
plating liquid
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP53157497A
Other languages
Japanese (ja)
Other versions
JPS5585692A (en
Inventor
Masaru Tsukahara
Kazuhisa Nakamoto
Nobuo Shinkai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15749778A priority Critical patent/JPS5585692A/en
Publication of JPS5585692A publication Critical patent/JPS5585692A/en
Publication of JPS621000B2 publication Critical patent/JPS621000B2/ja
Granted legal-status Critical Current

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  • Electroplating Methods And Accessories (AREA)
  • Electrodes Of Semiconductors (AREA)

Description

【発明の詳細な説明】 本発明は、メツキ方法特に半導体用バンプメツ
キ方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a plating method, particularly a bump plating method for semiconductors.

従来、第1図に示すように、シリコンダイオー
ドのAgバンプ1の形成に当つては、第2図の如
く浸漬式電気メツキ法を行なつており、この方法
では、第3図に示すようにバンプ頂部が凹凸形状
となり、この後リード線を圧着する場合に、接触
不良が生じやすいことから、バンプ頂部をへら等
で磨して平坦化する作業を組み込んで接触不良を
減らすようにしていた。しかも、この平坦化作業
は、ウエーハを割つたりバンプ頂部にキズをつけ
てしまうこともある。また、第2図に示すよう
に、ウエーハ2のガラス板3へのワツクス4によ
る接着、ワツクスを溶解してのはがし、後洗浄な
どの付帯作業も多く、また浸漬式電気メツキ法の
原理上大電流を流せず、小電流で時間がかかると
いうような欠点がある。本発明の目的は、上記の
欠点を改善し、第4図に示すようなバンプ頂部が
平坦かつ接触面積の広い台形状を得ること、ウエ
ーハを付帯作業がなく容易に保持することができ
ること、メツキ時間の短縮を図ることにある。
Conventionally, as shown in Fig. 1, the immersion electroplating method as shown in Fig. 2 has been used to form the Ag bump 1 of a silicon diode, and in this method, as shown in Fig. 3, The top of the bump has an uneven shape, which tends to cause poor contact when the lead wire is crimped after that. Therefore, the bump top was polished with a spatula or the like to flatten it to reduce the chance of poor contact. Moreover, this planarization work may break the wafer or scratch the tops of the bumps. In addition, as shown in Fig. 2, there are many incidental operations such as adhering the wafer 2 to the glass plate 3 with wax 4, dissolving the wax and peeling it off, and cleaning afterward, which is also difficult due to the principle of the immersion electroplating method. The drawback is that current cannot flow, and it takes a long time with a small current. The objects of the present invention are to improve the above-mentioned drawbacks, to obtain a trapezoidal shape with a flat bump top and a large contact area as shown in FIG. The purpose is to save time.

上記の目的を達成するために、本発明では、第
5図に示すように、メツキ液を含浸できる弾性の
ある多孔質布層10で覆つた電極板11と、ウエ
ーハを周辺からエアー等を吹きつけメツキ液の浸
入を遮断しつつ真空吸着保持できる電極12に保
持して対向させてたがいに、こすりあわせながら
大電流を流しバンプを成長させることに特徴があ
る。
In order to achieve the above object, the present invention, as shown in FIG. The feature is that the bumps are grown by applying a large current to the electrodes 12, which are held facing each other and are rubbed against each other, and which can be held by vacuum suction while blocking the penetration of the dipping plating liquid.

以下本発明を第6図に示す実施例によつて詳細
に説明する第6図において、2はウエーハであ
る。まずウエーハを導通がとれる電極13に、真
空吸着14させる、このとき周辺からエアー15
を吹きメツキ液8の侵入を防ぐ、ここで電極のウ
エーハ吸着面とガイド17のウエーハ接触面は、
ウエーハの変形を防ぐために、同一平面にする必
要がある。また、エアー室にたまつたエアーをリ
ークさせるために、ガイドのウエーハ接触面に、
こまかい溝18を入れる。10が多孔質布である
が、弾性をもたせるために、導電性のスポンジ1
9を下に入れる。これを導電性を増すために、カ
ーボンの円盤11の上にセツトする。ここで、円
盤の周辺には、ふち20をつけメツキ液を、ため
るようにする。つぎに、上記のウエーハをセツト
した電極とこの円盤を対向接触させ、円盤を回転
16させながら両電極に電流を流しバンプを成長
させる。このような装置により前述のような非常
に良好なバンプが短時間で形成できる。
Hereinafter, the present invention will be explained in detail with reference to an embodiment shown in FIG. 6. In FIG. 6, 2 is a wafer. First, the wafer is vacuum-adsorbed 14 to an electrode 13 that can be electrically conductive.
The wafer suction surface of the electrode and the wafer contact surface of the guide 17 are
To prevent wafer deformation, it is necessary to make them flush. In addition, in order to leak the air accumulated in the air chamber, the wafer contact surface of the guide is
Insert fine grooves 18. 10 is a porous cloth, but in order to have elasticity, a conductive sponge 1 is used.
Put 9 below. This is set on a carbon disc 11 to increase conductivity. Here, a rim 20 is provided around the disk to collect the plating liquid. Next, the electrodes on which the wafer is set are placed in opposing contact with this disk, and while the disk is rotated 16, a current is applied to both electrodes to grow bumps. With such an apparatus, very good bumps as described above can be formed in a short time.

以上説明した如く、本発明によれば、頂部が平
坦かつ接触面積の広い台形状のバンプが形成でき
ることから従来行なつていた、バンプ頂部の平坦
化作業が不要となり、接触不良を大巾に低減でき
る。また、ウエーハを簡単に保持および着脱でき
るので、従来のウエーハの接着、はがしにともな
う付帯作業が不要となり大巾に工数低減ができ
る、さらにはメツキ液のAgイオン濃度を高める
ことにより大電流を流し高速メツキできることか
らメツキ時間も従来約60分/枚から約15分/枚に
短縮できる。
As explained above, according to the present invention, since a trapezoidal bump with a flat top and a large contact area can be formed, the conventional work of flattening the top of the bump is no longer necessary, and contact failures are greatly reduced. can. In addition, since the wafer can be easily held and removed, there is no need for the conventional work associated with bonding and peeling off wafers, greatly reducing the number of man-hours.Furthermore, by increasing the Ag ion concentration of the plating solution, a large current can be applied. Since high-speed plating can be performed, the plating time can be reduced from about 60 minutes/sheet to about 15 minutes/sheet.

特に、本発明では、メツキ液器具20によつて
メツキ液がたまるように構成されるので、多孔質
布10の全体に常にメツキ液が含浸した状態とな
る。このため、メツキ液の供給が充分に行なわれ
る。また、このとき、エアー15をウエーハの裏
面周辺部に吹き付けしているので、真空吸引され
た電極13とウエーハ2の裏面との間にメツキ液
の浸入が防止され、これによつて、メツキ電流は
メツキ液から半導体ウエーハ表面全体を横切つて
電極13に均等に流れるのでバンプの高さ、大き
さにバラツキが少く、かつ第4図に示すような台
形状のバンプ形状を得ることができる。
In particular, in the present invention, since the plating liquid device 20 is configured to collect the plating liquid, the entire porous cloth 10 is always impregnated with the plating liquid. Therefore, the plating solution is sufficiently supplied. In addition, since the air 15 is blown around the back surface of the wafer at this time, the plating liquid is prevented from entering between the vacuum-sucked electrode 13 and the back surface of the wafer 2, thereby reducing the plating current. Since the plating liquid flows uniformly from the plating liquid to the electrode 13 across the entire surface of the semiconductor wafer, there is little variation in bump height and size, and a trapezoidal bump shape as shown in FIG. 4 can be obtained.

なお、上記実施例では、相対回転運動を行つた
が、運動形式は回転のみに限定されず、直線運動
でも可能である。
In the above embodiment, relative rotational motion was performed, but the motion type is not limited to rotation only, and linear motion is also possible.

また、以上の実施例では、シリコンダイオード
のAgバンプの形成について述べたがこのメツキ
装置は、それ以外の例えばIC、LSI用のAuバン
プの形相等にも同じように適用できる。
Further, in the above embodiments, the formation of Ag bumps for silicon diodes has been described, but this plating device can be similarly applied to other shapes such as Au bumps for ICs and LSIs.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、バンプが形成された半導体素子の要
部断面図、第2図は浸漬式電気メツキ法を説明す
るための装置の斜視図、第3図は、浸漬式電気メ
ツキ法で得られたバンプを有する半導体素子要部
断面図、第4図は本発明で得られたバンプを有す
る半導体素子要部断面図、第5図は本発明に係る
メツキ方法を説明するためのメツキ装置の要部断
面図、第6図は本発明の一実施例に係るメツキ装
置の要部断面図である。 2…ウエーハ、5…絶縁テープ、6…アルミ
箔、7…Ag電極、8…メツキ液、9…メツキ
槽、13…電極、17…ガイド、18…エアーリ
ーク溝、19…導電性スポンジ。
Fig. 1 is a cross-sectional view of a main part of a semiconductor element on which bumps are formed, Fig. 2 is a perspective view of an apparatus for explaining the immersion electroplating method, and Fig. 3 is a sectional view of a semiconductor element obtained by the immersion electroplating method. FIG. 4 is a cross-sectional view of the main part of a semiconductor device having bumps obtained by the present invention, and FIG. 5 is a main part of a plating device for explaining the plating method according to the present invention. FIG. 6 is a sectional view of a main part of a plating device according to an embodiment of the present invention. 2... Wafer, 5... Insulating tape, 6... Aluminum foil, 7... Ag electrode, 8... Plating liquid, 9... Plating tank, 13... Electrode, 17... Guide, 18... Air leak groove, 19... Conductive sponge.

Claims (1)

【特許請求の範囲】[Claims] 1 メツキ液をためるようにしたメツキ液器具の
中において、前記メツキ液を含浸し、かつ弾性的
性質を有する材料で表面が形成された一方のメツ
キ用電極を配置し、一方、表面にバンプメツキを
すべき半導体ウエーハの裏面を他方のメツキ用電
極面に真空吸引させて固定するとともに、真空吸
引された前記半導体ウエーハの裏面と前記他方の
メツキ用電極面との間にメツキ液が浸入するのを
防止するために前記半導体ウエーハ裏面の真空吸
引部の周辺に気体を吹きつけた状態で、前記半導
体ウエーハの表面と前記一方のメツキ用電極の表
面とを対向接触させ、相対運動を与えながら前記
半導体ウエーハ表面にバンプを形成することを特
徴とするメツキ方法。
1. In a plating liquid device that stores plating liquid, place one plating electrode impregnated with the plating liquid and having a surface formed of an elastic material, and on the other hand, bump plating is applied to the surface. The back surface of the semiconductor wafer to be removed is fixed by vacuum suction to the other plating electrode surface, and the plating liquid is prevented from entering between the vacuum suctioned back surface of the semiconductor wafer and the other plating electrode surface. In order to prevent this, the surface of the semiconductor wafer and the surface of the one plating electrode are brought into opposing contact with each other while a gas is blown around the vacuum suction section on the back surface of the semiconductor wafer, and the semiconductor wafer is removed while applying relative motion. A plating method characterized by forming bumps on the wafer surface.
JP15749778A 1978-12-22 1978-12-22 Plating method Granted JPS5585692A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15749778A JPS5585692A (en) 1978-12-22 1978-12-22 Plating method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15749778A JPS5585692A (en) 1978-12-22 1978-12-22 Plating method

Publications (2)

Publication Number Publication Date
JPS5585692A JPS5585692A (en) 1980-06-27
JPS621000B2 true JPS621000B2 (en) 1987-01-10

Family

ID=15650968

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15749778A Granted JPS5585692A (en) 1978-12-22 1978-12-22 Plating method

Country Status (1)

Country Link
JP (1) JPS5585692A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3348528B2 (en) * 1994-07-20 2002-11-20 富士通株式会社 Method for manufacturing semiconductor device, method for manufacturing semiconductor device and electronic circuit device, and electronic circuit device
JP2000232078A (en) 1999-02-10 2000-08-22 Toshiba Corp Plating method and plating equipment
US6632335B2 (en) * 1999-12-24 2003-10-14 Ebara Corporation Plating apparatus
KR100773165B1 (en) * 1999-12-24 2007-11-02 가부시키가이샤 에바라 세이사꾸쇼 Semiconductor Substrate Processing Equipment and Processing Method
JP4922275B2 (en) * 2008-10-20 2012-04-25 株式会社東芝 Plating method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5265665A (en) * 1975-11-28 1977-05-31 Hitachi Ltd Formation of protruding electrode of semiconductor device

Also Published As

Publication number Publication date
JPS5585692A (en) 1980-06-27

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