JPS619807A - Preamplifier integrated circuit - Google Patents

Abstract

PURPOSE:To prevent disturbance of pictures at a head switching point by providing a terminal which adjusts the output terminal DC of a regenerative amplifier IC for the purpose of eliminating the DC offset of the regenerative amplifier which causes inversion phenomena, waveform distortion, etc. at the head switching point. CONSTITUTION:When the value of a resistance 17 is reedueced, the emitter current of a transistor TRQ12 is increased, and that of TRQ11 is increased, and the base potential of a TRQ13 is reduced, and the DC voltage of an output terminal 12 is reduced. When the value of a resistance R16 is reduced, the emitter current of the TRQ12 is reduced, and the base potential of the TRQ13 is raised, and the DC voltage of the output terminal 12 is raised. Thus, the ratio among resistances R16, R17, and R15 is changed to change freely the voltage of the output terminal 12 in both of positive and negative directions. Consequently, this circuit is used for, for example, an amplifier 3 of a conventional circuit to adjust the DC offset between amplifiers 3 and 4.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a magnetic recording and reproducing device, and in particular to an integrated circuit for a reproducing head amplifier (I) for amplifying the output signal of the reproducing head.
Regarding C).

[Background of the invention]

Conventional general-purpose VTRs are of the two-head scan type, with each circuit square, and one recording pattern is formed diagonally on the magnetic tape for each field (one vertical period) of the television signal. It was a method. During reproduction, the two video heads alternately reproduce recording patterns one line (one field) at a time. Generally, the playback signal is weak, so
A playback amplifier is required. FIG. 1 shows an example of a block diagram of a conventional reproduction amplifier. In the figure, 1 is the video head of the first channel, 2 is the video head of the second channel, 3 is an amplifier for amplifying the reproduction output of the video head 1, and 4 is the video head of the second channel.
is an amplifier for amplifying the playback output of video head 2,
5 is a switch circuit that electronically alternately switches and outputs the respective channel outputs of these two amplifiers 3 and 4; 6;
is a terminal that provides a switching signal to the switch circuit 5; 7 is an amplifier for amplifying the signal output from the switch circuit 5;
8 is an output terminal from which the reproduced signal is output by the amplifier 7; 9
is a preamplifier integrated circuit that includes these circuits. The switching point of the changeover switch 5 in the block diagram of FIG. 1 is located near the vertical to-ranking of the television signal.

This connecting part has a skinny (
time axis fluctuation).

There are inversion phenomena and waveform distortion due to phase and frequency discontinuity of the reproduced FM signal, but since it is close to vertical blanking, even if this connection is not successful, it will hardly appear on the TV screen. There were no particular problems.

Recently, a high-definition system has been developed that quadruples the video signal bandwidth of television cameras. VT for this television signal
As for R, if recording growth is taken as one step, the corresponding speed between the magnetic tape and the head must be quadrupled.F! , not. If we use the conventional tape running mechanism as is,
It is necessary to quadruple the rotational speed of the head, and the signal of one field is divided into four tracks and recorded, and the switching points of the two heads can be seen at three points in the center of one screen.

This method of dividing the signal of one field into several parts and recording them in a plurality of patterns is called a segment method, and in this case, the reproduction circuit &C requires a skinny correction circuit. That is, during playback, as described above, time axis fluctuations due to companding of the magnetic tape occur near the switching of recording (playback) tracks, resulting in skinny. If this is not corrected, a discontinuous point (break) will appear in the center of the screen, making it extremely difficult to see. Since skew correction is performed by detecting discontinuity in the period of the horizontal synchronization signal, the role of the reproduced horizontal synchronization signal becomes more important than before.

However, as mentioned above, there is a one-inversion waveform distortion near the head switching point.

Not only is it difficult to see the screen, but the resulting pulse toward the black side of the image is mistakenly detected as a synchronization signal by the skew correction circuit, causing a problem in which the screen becomes more distorted and correct correction becomes impossible. Ta.

One of the causes of the head switching point inversion phenomenon, waveform distortion, etc. is the DC offset of the reproduced FM signal at the time of head switching. That is, the output waveform of the output terminal 8 in the 10 diagram of FIG. 1 is shown in the waveform diagram of FIG. 2. As shown in this waveform diagram, the output is shifted from the switching point A immediately after that, and the playback F 7Ii (02 point of No. 7 is shifted. For this reason, the correct video information is output in the subsequent F AI converter. It will no longer be piled up.

As a result of the above, distortion will occur on the synchronization side, causing an error in the subsequent skew correction circuit. Therefore, it is important to eliminate the DC offset between the two channels of the amplifier 3.4 which individually VC amplifies the outputs of the two video heads. As an example of a segment Z self-recorded VTR, a 2-inch 4-head VTR for broadcasting, edited by the Japan Broadcasting Corporation, VTR technology (
Japan Hogoroban Association, October 1982, pp. 136-14
2 pages].

[Purpose of the tip ψ]

The object of the present invention is to
To provide a preamplifier integrated circuit that eliminates surface disturbance [
Melt.

[Summary of the invention]

The present invention (jl, reversal phenomenon at the head switching point.

The present invention is characterized in that a terminal is provided to adjust the output terminal DC+1- of the reproduction amplifier 1 IC to eliminate the main angle 1) C offset that causes waveform distortion.

[Embodiments of the invention]

DC offset adjustment is done using the 2 buttons in front of the channel changeover switch.
Since the adjustment method and workmanship differs depending on whether the adjustment is performed using both two amplifiers or one amplifier, here, we will use the case where the adjustment is performed using -10,000 amplifiers as an example.
Use the full drawing to open the CC.

In the circuit diagram of FIG.
#An example of an amplifier with a set-up dragon is shown.

FIG. 3 shows a central circuit of an amplifier which tunes the l)C voltage at the output terminal by interpolating the M@Ang'a flow. In this figure, the reproduced FM signal supplied from the video head is connected to the input terminal 10 and the transistor Q.
5 base. Transistor q5 and transistor Q4) are connected in cascode, and the transistor Q4 has a diode +Ij connected in series with the connected transistor Q1. Q2. Q3. and t from resistor R1VC
A bias (IIA) is connected to the base of the transistor Q4, and a bias is applied from this bias voltage to the base of the transistor Q4.The collector of the transistor Q4 is connected to the resistor R2 and the base of the transistor Q8, and the reproduction FM signal is It is output to the next-stage differential amplifier via R7 and Re. A diode-connected transistor Q6 is connected to the emitter of the transistor Q8, and the emitter of the transistor Q6 is connected to the resistor VCk.
3°R4 is in contact with M. The reproduced FM signal outputted from the emitter of the transistor Q9 via the resistor R4 is supplied to the transistor Q5 via the resistor R6 to perform feedback damping. Here transistor Q9
A load resistor R5 is connected to the emitter of. With that said.

Configures the first stage tank with feedback tamping Kaoru Isoryu. Resistors R7 and R8 are connected to the bases of the differential amplifier transistors Q 10 and Q 11, respectively, and a capacitor C17) is connected to the base of the transistor Q11 to provide only K mm lliC. The output resistor R9 and the base of the transistor Q13 are connected to the collector of the transistor Q11.
A reproduced FM signal is output from the output terminal 12 via the 15 emitter follower. Transistor Q 10 , Q
The emitter of the transistor Q11 is connected to the collector of a transistor Q12 constituting a differential current source, and the emitter of the transistor Q12 is connected to a resistor R10. The emitter of the transistor Q15 is connected to the collector of the transistor Q14, and the emitter of the transistor Q14 is connected to a resistor j? 11 is connected, and the transistor 414 forms a current source. The emitter of a transistor Q15 and a resistor R12 were connected to the base of the transistor Q12mQ140, and the resistor R15 and a diode were connected in series to the base of the transistor Q15. A voltage source consisting of a temperature compensation transistor Q16, Q17° resistor R14 is connected.

The voltage source then applies a DC voltage to the bases of transistors Q12 and Q14. Here, the DC offset adjustment terminal (pin) connected to the emitter of transistor Q12
11, resistor R15 and resistor R1 externally connected to the IC.
After passing through 5 and 7 resistors R16 and R17 rictl
), DCA-ysey) atlfi is created as MIt.

Next, the DC offset A adjustment operation will be explained based on the circuit diagram of FIG. “First, as shown in the previous layer, remove the DC “off-cent hair styling terminal 11” from the emitter of the transistor Q12 in Figure 1 and connect the external V4I resistor (15 m).
``''''By increasing the ratio of R17, the emitter of transistor Q12 is oscillated, thereby increasing the resistance R17.
9, the base potential of transistor Q15 changes, and the 1) C% pressure at output terminal 12 can be adjusted. That is, by lowering the height of the resistor 17, the emitter of the transistor Q12 is increased, and the emitter of the transistor Qll is increased.

To the base of transistor 415, output terminal 1
2's DC voltage decreases. Conversely, by lowering the first section of resistor R16, the emitter current of transistor Q12
The voltage decreases, the rebase level of the transistor Q15 increases, and the DCt pressure at the output terminal 12 increases.

From the above, the aforementioned rA=circuit, that is, the resistor R16
, R17, and R15, the voltage at the output terminal 12 can be freely oscillated in both positive and negative directions. Therefore, by using the circuit shown in Figure 3 for example, the amplifier 6 of the circuit shown in Figure 1, it is possible to
You can also fold the offset. Since the actual Dc′ between two channels is about 5 ornV,
What is the change in amplifier gain due to this moderate adjustment?

There are almost no clubs. As a result of the above, D of the output terminal 12
By increasing the C'@ pressure, there is no DC offset between channels, suppressing the anti-bacterial distortion at the fixed head cutting point, and preventing the skew correction circuit in the latter stage from acting. can.

Further, only 1) C can be seen at the DC offset-cost terminal 11. (Can be used as an inlay test pin when integrated into an IC, and by connecting a large 8M bypass capacitor to the adjustment terminal 1iVc.

The effect of isolation training becomes greater.

As shown in the circuit diagram of FIG. 3, the external circuit for Bli adjustment is composed of three resistors, but as shown in the circuit diagram of FIG. 4, only the resistor R17 may be used. In this case, the resistor R1 connected to the emitter of the transistor Q12 in the circuit diagram of the fourth prisoner S
0 is set to a large value, and the DC of output terminal 12
It is necessary to adjust the voltage to lower it,
With a DC offset of about 50 degrees, this installation is simple and does not pose any particular problem.

As shown in the circuit diagram of FIG. 5, the resistor connected to the emitter Vc of the transistor Q12 is connected to the D
It is also possible to use only the C offset adjustment resistor R17. In this case, the emitter current of transistor Q12 is controlled by resistor R
Since it is determined at 17VC, it has the advantage of having a wide adjustment range.

In the circuit diagram of FIG. 3 described above, DC offset adjustment is performed using six resistors, but two resistors R16 and R17 may be used as shown in the example of the circuit diagram of FIG. 6.

Next [, as shown in the circuit diagram of the seventh factor, transistor Q1
In some cases, a DCC offset circuit a14 using a transistor Q18 is used for the differential angle waveform consisting of 0 and Qll. DC offset adjustment terminal 13↓ out from the emitter of transistor Q18 lj Adjustment resistors R1B, R19, R20VC externally attached to the IC
Also, configure the adjustment circuit. DC adjustment is simple because a separate adjustment pin is provided, and the A14 terminal 16 only has a DC % pressure and has a point that can be used as an isolation pin. Also, as previously mentioned, connecting the Noxcon will have an even greater isolation effect.

In the embodiment of FIG. 7, three resistors IC or DC offset adjustment are performed, but two resistors may be used as shown in the circuit diagram of FIG. 8.

Also, 711i in Figure 5? Similarly to the embodiment shown in FIG. 9, the number of resistors connected to the emitter of the transistor 77>star Q18 may be one adjustment resistor R18.

Next, the circuit diagram of FIG. 10 shows that the emitter current of the transistor Q13 is changed by changing the emitter current of the transistor Q13 by the adjustment resistor R21 connected via the C offset adjustment terminal 14 from the emitter of the transistor Q14.
The base-emitter voltage of the output terminal 12 may be changed, thereby adjusting the DC voltage at the output terminal 12. in this case,
Emitter of transistor Q15 1m, 50% change of current 1
For 11SiC, the L)C voltage of the output toriko 12 is approximately iom
i Change the ratio. Therefore, making rice cakes is easy. Also, there is an advantage that there is no change in 5 ang gain due to this V @ wart. Further, as in the previous embodiment, only DC'@i voltage appears on the Es4 adjustment terminal 14, and it can also be used as an isolation pin in an IC.

DC offset rA adjustment resistor R2 in the circuit diagram in Figure 10
1 is one. As shown in the example shown in FIG. 11, three resistors R21, R22, and R23 may be used. In this case, #1 adjustment resistor R21, R22°R23 is in one direction (
When the mouth (increase, decrease) cannot be adjusted, a simple VC,
DC offset can be adjusted.

In Figure 11, there were three adjustment resistors externally attached to the IC, but as shown in the circuit diagrams in Figures 11g and 12, there are five.

It may be configured with two adjustment resistors R21 and R22.

Next, the emitter current of transistor Q15 causes D C
Figure 13 shows a case in which the current source for AJi by the transistor Q19 is separately housed when adjusting the voltage.

As mentioned above, this ltK further simplifies the copying fA adjustment. Here 15 is DC offset tone! i terminal, R23
is a DC offset adjustment resistor.

141st! ! As shown in the circuit diagram of J, the collector IC of transistor Q11 is connected to D (
1, 'Offset ^I connected via the enterprise terminal 16 (,
Due to both distortions of the adjustment resistor R24, which is externally attached to tc,
The DC of output terminal 12 exceeds the base pressure of Nostar Q15.
Here is an example of changing the voltage and adjusting the DC offset. Since the amplifier gain varies by 1 or more depending on the adjustment, and the DC offset is about 50 mV, there is no problem.

〔Effect of the invention〕

As detailed above, with the non+t, kJA reproduction video head integrated circuit (I C'), simple VcDc offset adjustment can be done with an external resistor in relatively few cities and #1000s, so segment Reversal phenomenon at the hiteo head switching point in system VTR, molding distortion,
The FA operation of the skew correction circuit can be eliminated, and the disturbance of one surface at the head switching point can be eliminated.

[Brief explanation of the drawing]

Figure 1 is a block diagram of a conventional Fabric IC.
The figure is a drum-shaped diagram at the head switching point. #43 is a circuit diagram showing one embodiment of the preamplifier integrated circuit according to the present invention, and FIGS. 4 to 14 are circuit diagrams showing other embodiments of the preamplifier integrated circuit according to the present invention. QIO, Qll, Q12, Q13. Q14
, Qi8, Q19: transistor Rq, J<io, Rii; resistor R15, R1
6, R17, R18, R19, R20, R21°R22
, R25, R24: vIA external external resistor 1113
, 14 , 15 , 1tS:li, current rA rectified terminal pin)

Claims (1)

[Claims] 2 to amplify the playback output of the two video heads, respectively.
In an integrated circuit comprising two amplifiers and a switch circuit that alternately switches and outputs the output of each of these amplifiers, at least one of the amplifiers is provided with an adjustment terminal for adjusting the DC potential at its output terminal. A preamplifier integrated circuit for a segment recording VTR, characterized by the following.