JPS61970A - Abnormal signal detector - Google Patents

Abstract

PURPOSE:To make IC output pins for external parts as an abnormal signal detector unnecessary by using the phase difference between the input signal and the output signal of a delay line of an FM demodulator of delay line type to detect the abnormal state of an FM carrier reproduced signal. CONSTITUTION:An abnormal signal detecting circuit 27 consists of a latch circuits 23 and 24, an NAND circuit 25, and a level converting circuit 26. The FM carrier signal has always a frequency within a certain shift frequency range; and with respect to input/output phase characteristics of a delay line 6 used in an FM demodulator 9, the phase of the output signal of the delay line 6 is 180 deg.-360 deg. behind that of the input signal in the certain shift frequency range of the FM carrier signal. If the carrier frequency of the FM carrier reproduced signal is deviated from the certain shift range to become higher or lower and the phase difference between the input signal and the output signal of the delay line 6 is deviated from the range of 180 deg.-360 deg., latch circuits 23 and 24 outputs signals (h) and (j), and an abnormality detection pulse l is generated.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an abnormal signal detection device suitable for use in reproducing video signals using an FM carrier wave recording format such as video ask.

Conventional structure and problems: In the video disc recording and reproducing system, an FM carrier wave signal is engraved in a linear pattern on the substrate surface of a disc-shaped recording medium (hereinafter referred to as "disc"), and the engraved bits are Information is recorded by geometric changes.

An FM carrier wave reproduction signal can be obtained by reading the information recorded by this geometric change of the bits by some means, such as a change in capacitance or a change in the amount of reflected light.

However, when demodulating a video signal recorded for image display from this FM carrier wave reproduction signal, one of the problems observed in the displayed image is as follows unless appropriate compensation is performed.
Instead of proper image information, erroneous image information in the form of white or black spots or streaks occurs sporadically at irregular locations. This erroneous image information in the form of noticeable spots or streaks can be caused by defects in the disc itself that originate from various stages of disc manufacturing, or scratches and scratches on the disc surface caused by disc usage.
This occurs when the bit shape changes due to causes such as scratches and mechanical deformation, and the instantaneous carrier frequency of the FM carrier reproduction signal exceeds a certain deviation range limit.

FIG. 1 is a block diagram of the main parts of a video disc playback device including a conventional abnormal signal detection circuit. FM read from the disc by the video disc pickup circuit 1
After removing unnecessary components outside the FM signal 9 band using a band pass filter (hereinafter referred to as rBPFJ) 2, the carrier wave reproduction signal is processed through an inverter 3.4, a limiter 5, a delay 116, a multiplier 7, and a low-pass filter. The signal is FM demodulated by an FMI 111III 9 configured with a filter (hereinafter referred to as “LPE”) 8, and applied to the changeover switch 10. The signals output from the changeover switch 10 are 1H delay $1111 and FM41.
11 is transferred to a signal processing circuit 13 which processes the signal into a form suitable for application to a television receiver 12.

Wavelength detection circuit 14 and capacitor G1. C2, resistor R1, comparators 15a, 15b, reference power supply 16, and latch circuit 1
7.18, a NAND circuit 19, and a level conversion circuit 20, the abnormal signal detection circuit 21 detects when the instantaneous carrier frequency of the FM carrier reproduction signal that has passed through the limiter 5 becomes a frequency lower than a certain deviation range. When this happens, it is regarded as an abnormal signal and acts to apply a detection signal to the switch control signal generation circuit 22. The switch control signal generation circuit 22 applies the signal from the one-day delay line 11 to the output terminal of the changeover switch 10 when a detection signal is applied from the abnormal signal detection circuit 21, and also applies the detection signal from the abnormal signal detection circuit 21. If not, the changeover switch 10 is controlled so that the signal from the FMI adjuster 9 is outputted to the output terminal of the changeover switch 10, respectively. In this way, the erroneous image information in the form of distracting white or black spots or streaks that appear in the image is replaced with image information from 1H earlier, thereby attempting to compensate for the unsightlyness in the image.

The operation of the conventional abnormal signal detection circuit 21 will be explained with reference to the signal waveform diagram in FIG. The output signal of the first terminal of the wavelength detection circuit 14 using the signal a output from the limiter 5 is determined by the capacitance Ct and the capacitance of C2 from the moment the signal a from the limiter 5 changes from high level to low level. Value and resistance R
When the potential continues to change at a constant slope determined by the resistance value of 1 and the output signal a of the limiter 5 changes from a low level to a high level, the output signal a of the first terminal of the wavelength detection circuit 14 changes to a high level. Return to electric potential. As a result, the wavelength detection circuit 1
The potential immediately before the output level of the first terminal of the limiter 4 returns to the high level depends on the time of the low level section of the output signal of the limiter 5. The output signal from the first terminal of the wavelength detection circuit 14 is the first
The reference potential of the reference power supply 16 is determined by the comparator 15a of
It is compared with 1. The output of the first comparator 15a is
The output signal of the first terminal of the wavelength detection circuit 14 is at the reference potential v1
When it is larger, the high level is set, and the wavelength detection circuit 14
When the output signal of the first terminal of is smaller than the reference potential v1, a low level is outputted. First latch circuit 17
extracts the output signal of the first comparator 15a when the output signal of the limiter 5 makes a positive transition, and holds this until the next positive transition. C is the output of the first latch circuit.

The remaining half-wavelength portion of the FM carrier reproduction signal is detected in the same manner. In other words, the potential immediately before the output e of the second terminal of the wavelength detection circuit 14 returns to a high level depends on the time of the low level section of the output signal d from the inverter 3, which is a dotted signal of the output signal a of the limiter 5. do. The second comparator 15 compares the output e of the second terminal of the wavelength detection circuit 14 with the reference potential v1, and outputs a high level when the output e of the second terminal of the wavelength detection circuit 14 is larger than the reference potential V1. , and when the output e of the second terminal of the wavelength detection circuit 14 is smaller than the reference potential v1, a low level is output. The second latch circuit 18 extracts the output of the second comparator 15 when the output d of the inverter 3 makes a positive transition, and holds this until the next positive transition. f is the output of the second latch circuit 18.

The signals output from the latch circuits 17 and 18 are NAND
It is applied to the circuit 19 and becomes the detection signal Q. This detection Yu8
g is converted by the four-level conversion circuit 20 to a level suitable for application to the switch control signal generation circuit 22.

However, in the above conventional circuit, the abnormal signal detection circuit 21
can be detected for frequencies lower than the constant deviation range of the FM carrier reproduction signal, but cannot be detected for frequencies higher than the constant deviation range. In addition, when this abnormal signal detection circuit 21 is configured as an integrated circuit, the accuracy may be poor if the configuration consists only of elements inside the integrated circuit (the detection frequency cannot be set, so external components are used to set the detection frequency setting value). There was a problem in that adjustment had to be made, and a bottle was required to attach the integrated circuit externally for this purpose.

OBJECTS OF THE INVENTION The present invention solves the above-mentioned conventional drawbacks, and is capable of detecting abnormal signals even when the instantaneous carrier frequency of an FM carrier regenerated signal exceeds a certain deviation range limit and becomes not only a low frequency but also a high frequency. can generate signals, set deviation range limits without adjustment, and delay linear FM'll
It is an object of the present invention to provide an abnormal signal detecting device which, when incorporated into an integrated circuit together with an H device, can eliminate the need for an IC output pin for an external numbered component.

Structure of the Invention In order to achieve the above object, the abnormal signal detection device of the present invention includes a delay line that delays an FMWI-modulated first signal and outputs the delayed signal as a second signal; The configuration includes a detection means for comparing the phase with the second signal and detecting whether the phase difference exceeds a predetermined range.

According to this configuration, an abnormal signal detection signal can be generated when the instantaneous carrier frequency of the FM carrier reproduction signal exceeds a certain deviation range limit, and furthermore, the deviation range limit can be set without adjustment.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 3 is a circuit block diagram of an abnormal signal detection device according to an embodiment of the present invention, in which the same components as those shown in FIG. 1 are given the same reference numerals and their explanations will be omitted. Third
In the figure, 23 and 24 are latch circuits, and 25 is a NAND
The circuit 26 is a level conversion circuit, and these constitute an abnormal signal detection circuit 2γ.

The output of the limiter 5 and the output of the delay line '6 are supplied to the first latch circuit 23 of the abnormal signal detection circuit 21, and similarly the output of the inverter 3, which is an inverted signal of the output of the limiter 5, and the output of the delay line '6 are supplied to the first latch circuit 23 of the abnormal signal detection circuit 21. The output of the inverter 4, which is an inverted output signal, is supplied to the second latch circuit 24. Latch circuit 23
．． 24 extracts the output levels of the delay line 6 and inverter 4 when the outputs of the limiter 5 and inverter 3 transition in the positive direction, and holds this until the next transition in the positive direction of the outputs of the limiter 5 and inverter 3. . The latch circuits 23 and 24 compare the phases of the input signal applied to the delay 16 and the output signal. Furthermore, the output signals of the latch circuits 23 and 24 are applied to the NAND circuit 25. This NAND circuit 25 outputs a high level when one or both of the input signals are at a low level, and outputs a low level when both input signals are at a high level. The output signal of the NAND circuit 25 is supplied to a level conversion circuit 26, where the potential level of the pulse is converted to a level suitable for the switch control signal generation circuit 22.

FIG. 4A shows the phase characteristics of the input signal and output signal of the delay line 6 due to the IPF configuration. The FM carrier signal is F
M carrier frequency is always a frequency within a constant deviation frequency range (for example 3.5M for a VHD video disc)
Hz to 10.5 MHz), and when using a delay line with a deviation range of phase characteristics of 180° to 360° as shown in Figure 4, the detection characteristic shown in Figure 4B is obtained. An FM41i11 device 9 can be configured. As can be seen from FIG. 4A, the input/output phase characteristics of the delay line 6 used in the FMIII device 9 are such that in a constant shift frequency range of the FM carrier signal, the output signal of the delay line 6 is 180° to 360° relative to the input signal. °
The result is a delayed signal (shown in Figure 4 as a signal advanced by 180'' to 0°).On the other hand, in other frequency ranges, such as low frequencies, the output signal is 180'' with respect to the input signal. When the frequency is high, the output signal is a signal delayed by 360 degrees or more with respect to the input signal.

FIG. 5 shows operating waveforms of the abnormal signal detection circuit 27 when the FM carrier reproduction signal includes a frequency higher than a certain deviation range. The output of the first latch circuit 23 is obtained by extracting the delayed 16th output i when the output a of the limiter 5 transitions in the positive direction and holding the extracted level until the next transition in the positive direction.

It's a signal. Further, the output j of the second latch circuit 24 is the output k of the inverter 4, which is an inverted signal of the output i of the delay line 6.
This is a signal obtained by extracting when the output d of the inverter 3, which is an inverted signal of the output a of the limiter 5, transitions in the positive direction and holding the extracted level until the next transition in the positive direction. Figure 5 ρ is the output of the latch circuits 23 and 24 which is NANDed.
This is an abnormal signal detection pulse obtained by adding in the circuit 25.

If the FM carrier signal has a constant deviation range, when the output of the limiter 5 or inverter 3 transitions in the positive direction, the output signal i of the delay line 6 or inverter 4 is applied to the latch circuit 23 or 24 to which the signal is input. Alternatively, k is at a low level and no abnormal signal detection pulse is generated. However, if the frequency is higher than the constant deviation range and the output signal from the delay line 6 lags the input signal by 3604 or more, an abnormal signal detection pulse is generated.

FIG. 6 shows operating waveforms of the abnormal signal detection circuit 27 when the FM carrier reproduction signal includes a frequency lower than a certain deviation range. The latch circuits 23 and 24 operate as described above and output signals as shown in FIG.
An abnormality detection pulse like g in FIG. 6 is generated.

Due to the above operation, when the carrier frequency of the FM carrier wave reproduction signal deviates from the fixed width difference range and becomes a high frequency or low frequency, the phase difference between the input signal and the output signal of the delay line 6 becomes 1.
The input FM carrier reproduction signal is in an abnormal signal state due to the extraction function of the latch circuits 23 and 24 because it falls outside the range of 80° to 360° and falls within the range of 0° to 1806 or 360" to 540". Detects and generates a detection signal. In this way, the signal state of the FM carrier reproduction signal is detected based on the phase difference between the input signal and the output signal of the delay line 6.

In the above embodiment, the delay line 6 has an LPF configuration, but the delay line 6 may also have an HPF configuration or a BPF configuration. In this case, the phase characteristics of the input signal and output signal of the delay line 6 will be as shown in FIG. 7A, and the detection characteristics of the FM demodulator 9 using this delay line 6 will be as shown in FIG. 7B. The output signal of the delay line 6 within the constant deviation frequency range of the FM carrier signal is delayed by 06 to 18o@ compared to the phase of the input signal as shown in FIG. 7B, so the constant deviation due to the LPF configuration is delay in range 16
Compared to the case where the phase characteristic of latch circuit 23.2 is used,
The latch circuit 23
．． 24 outputs a high level. Therefore, when a HPF configuration or a BPF configuration is used as the l extension 6, it is necessary to use an adder circuit in place of the NAND circuit 25.

As described above, according to this embodiment, when the instantaneous carrier frequency of the FM carrier wave reproduction signal exceeds a certain deviation range limit and becomes a low frequency or a high frequency, it is possible to generate an abnormal signal detection signal, and also to generate an abnormal signal detection signal. Since the detection range is determined by the input/output phase characteristics of the delay line 6, there is no need to adjust the setting range. Also, when incorporated into an integrated circuit, the delay linear F
If it is incorporated together with the M demodulator, an external IC output pin for parts is not required as an abnormal signal detection device.

DETAILED DESCRIPTION OF THE INVENTION According to the present invention, an FM modulated signal is applied to a delay line, and a phase difference between an input signal and an output signal of the delay line is used to detect an abnormality in an FM carrier reproduction signal. Since the state is detected, it is possible to detect when the FM carrier regenerated signal exceeds a certain deviation range limit and becomes either a low frequency or a high frequency. Because it focuses only on the phase difference between
When incorporated into an integrated circuit together with the M demodulator, an external IC output bin for components becomes unnecessary as an abnormal signal detection device.

[Brief explanation of the drawing]

Fig. 1 shows the circuit block diagrams of the main parts of a video disc playback device including a conventional abnormal signal detection device, Fig. 2 shows signal waveforms of various parts of the circuit shown in Fig. 1, and Fig. 3 shows an embodiment of the present invention. 4 is an explanatory diagram of the phase characteristics of the input and output signals of the delay line and the detection characteristics of the FM repeater and VF device in the abnormal signal detection device, and FIG. 5 is a circuit block diagram of the abnormal signal detection device in Figure 3 shows the signal waveform diagram of each part of the circuit when the frequency exceeds a certain deviation range, and Figure 6 shows the input signal 8.
The signal waveform diagram of each part of the circuit shown in Figure 3 is shown when the signal becomes a frequency below a certain deviation range, and Figure 7 shows the signal waveform diagram of each part of the circuit as a delay line.
FIG. 4 is an explanatory diagram of the phase characteristics of the input/output signals of the delay line and the detection characteristics of the FM demodulator when a PF or BPF configuration is used. 6... Delay line, 23... First latch circuit, 24...
...Second latch circuit, 25...NAND circuit, 26
... Level conversion circuit, 27 ... Abnormal signal detection circuit representative Yoshihiro Morimoto t Σ ] Σ: 2 Fig. 4 He he he he he he he he he he
喰 'Is 喰 ゛)）---豐 ν Figure 7

Claims (1)

[Claims] 1. A delay line that delays an FM modulated first signal and outputs the delayed signal as a second signal, and compares the phases of the first signal and the second signal and determines the phase difference between the first signal and the second signal. An abnormal signal detection device comprising: detection means for detecting whether a phase difference exceeds a predetermined range. 2. The abnormal signal detection device according to claim 1, wherein the delay line is constituted by a low-pass filter. 3. The abnormal signal detection device according to claim 1, wherein the delay line is constituted by a bypass filter. 4. The abnormal signal detection device according to claim 1, wherein the delay line is constituted by a bandpass filter.