JPS6196541U - - Google Patents

Info

Publication number
JPS6196541U
JPS6196541U JP1984181719U JP18171984U JPS6196541U JP S6196541 U JPS6196541 U JP S6196541U JP 1984181719 U JP1984181719 U JP 1984181719U JP 18171984 U JP18171984 U JP 18171984U JP S6196541 U JPS6196541 U JP S6196541U
Authority
JP
Japan
Prior art keywords
substrate
resin layer
integrated circuit
circuit device
hybrid integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984181719U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984181719U priority Critical patent/JPS6196541U/ja
Publication of JPS6196541U publication Critical patent/JPS6196541U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)
JP1984181719U 1984-11-30 1984-11-30 Pending JPS6196541U (enFirst)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984181719U JPS6196541U (enFirst) 1984-11-30 1984-11-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984181719U JPS6196541U (enFirst) 1984-11-30 1984-11-30

Publications (1)

Publication Number Publication Date
JPS6196541U true JPS6196541U (enFirst) 1986-06-21

Family

ID=30739260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984181719U Pending JPS6196541U (enFirst) 1984-11-30 1984-11-30

Country Status (1)

Country Link
JP (1) JPS6196541U (enFirst)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5797634A (en) * 1980-12-11 1982-06-17 Canon Inc Hybrid integrated circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5797634A (en) * 1980-12-11 1982-06-17 Canon Inc Hybrid integrated circuit

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