JPS619164A - Semiconductor circuit - Google Patents

Abstract

PURPOSE:To prevent an abnormal voltage from applying to a thyristor by forming the third series circuit connected in parallel with the second diode of a resistor and a saturable reactor. CONSTITUTION:Diodes 3, 4 are connected in parallel with thyristors 1, 2 in a semiconductor circuit having a snubber circuit, and diodes 5, 6, resistors 7, 8 and capacitors 9, 10 are provided as the snubber circuit. In this case, saturable reactors 19, 20 are inserted into the circuits of the resistors 7, 8 for suppressing the discharging currents of the capacitors 9, 10. Thus, since any snubber circuit flows the current through the thyristors 1, 2 and anti-parallel diodes 3, 4, abnormal voltages are not applied to the thyristors 1, 2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a semiconductor circuit equipped with a snubber circuit.

[Conventional technology]

When configuring an inverter or chopper device by connecting multiple thyristors or ()To in series, ON -
Various snubber circuits have been considered to absorb sudden fluctuations in current and fluctuations in voltage that occur during OFF switching.

An example of this is shown in FIG. The one shown in the figure has two thyristors connected in series, (1) +21 I'
i thyristor, +3) +4 Diode that circulates the current flowing in the opposite direction due to commutation or the delayed current, +5
1 +61 snubber circuit diode, +71 (81
A resistor that suppresses the discharge current of the capacitor in the snubber circuit.
(9) 11oI I/'i snubber circuit capacitor.

Now, in FIG. 1, when actual commutation is performed, the operation is as shown in FIG. 2. FIG. 2 shows an embodiment of an inverter circuit, which is of the so-called magma rain pulse commutation system.

The operation is detailed in the literature, so I will omit it.

In the figure, (11) is a DC power supply, (12i (+31041
051 is a commutation reactor, oiu= is a commutation capacitor,
071081 auxiliary thyristor. Note that the contact point ■ is connected to the load as an output.

FIG. 3 shows the timing and waveform when the thyristor fil +2+ is turned off. In this circuit, for example, the thyristor (1) is ON, and this 71. When attempting to turn OFF L, first ignite the auxiliary thyristor 071 at to, the charge of the commutating capacitor (16) flows through the following path as a loop shown in , and the thyristor il+
Iasu is added in reverse.

Commutation capacitor (16) → main arm diode (3)
→ Commutation reactor 03) → Commutation reactor α21 → Auxiliary thyristor (171 → Commutation capacitor α6) At the time tx when the reverse bias time exceeds the turn-off time of thyristor (1), thyristor (21i ON L, thyristor ill OFF) h) In the transient state, the role of the snubber is to alleviate the gradient of the voltage applied to the thyristor [11+21, and to create a state in which the device can move smoothly by lowering it below the withstand voltage of the thyristor. . Time of tl in Figure 3! The movement of the snubber will be explained in detail with reference to FIG.

In Fig. 2, when the thyristor (2) is ON, the voltage of the other arm is applied, but since there is a snubber, current flows through the path (■), and the snubber capacitor (9) is applied.
), a voltage is applied to the thyristor at that voltage gradient. At this time, d v/a at t=6-
t is as follows.

dv74t = E -=== JLC L; Inductance C; Capacity of snubber capacitor During this OFF transient state, the voltage of the snubber capacitor absorbs the energy of the inductance existing in the circuit, and the voltage of the snubber capacitor is It will be charged.

L; circuit inductance C; snubber capacitor construction; current value flowing through L at tl in Figure 3
When the overcharging mode to the capacitor ends, the mode shifts to the discharging mode through the snubber resistor, but the following problems occur here. This problem will be explained using FIG. 4. In the figure, it is assumed that each snubber capacitor has some characteristic difference. For example, if the capacitance of the capacitor (9) is smaller than that of the capacitor (io), the discharge current will rise faster in the capacitor (9) (because the resonance period with the circuit is smaller), and the diode (4) will A current (2) is established via the capacitor (9) and resistor (7). When this current flows through the diode (4), the capacitor 1101 H resistor (8) 7:l)
The energy is then released in a loop of diodes (4).

In this state, the voltage that cannot be applied to the thyristor (2) is the voltage of the capacitor (lO) minus the voltage drop due to the drop of the resistor (8) and the distributed inductance.

(In Fig. 4(b), the period from t1 to t2 shown as the thyristor (2) voltage waveform) If the current ■ in Fig. 4(a) attenuates faster than the current O, the reverse of the diode (4) Directional current does not flow! −
7' 4th stream suddenly attenuates. The voltage of the capacitor (10j) is also connected to the power supply fl via the diode (3).
DK is below the feedback value, and the sustained current disappears. When the current disappears, the voltage of the capacitor (lO) cannot appear as it is as the voltage of the thyristor (2), but at this time, the a v/a t that appears across the thyristor (ts+ in Fig. 4(b)) often causes the thyristor's a v/cl to deviate from the permissible value.

[Summary of the Invention] The present invention connects in series a parallel circuit in which a first diode and a semiconductor element with a control pole are connected in anti-parallel, and a first series circuit in which a second diode and a capacitor are connected in series between both of the above. A third circuit in which a diode is connected in parallel with the above parallel circuit so that the direction is reversed, and a saturable reactor and a resistor are connected in series.
By connecting the series circuit in parallel with the second diode, the saturable reactor becomes a flat impedance until it is saturated, thereby providing a semiconductor circuit in which the rate of increase in current is suppressed.

[Embodiments of the invention]

The figures will be explained below. In Figure 5, when the capacitor (91flor) is overcharged and tries to enter the discharge mode, the rise of the current differs due to the difference in capacitance and the difference in circuit distribution inductance, as mentioned earlier. To suppress, resistance +71 +8
Insert the saturable reactor 09) into the circuit of 1. Saturable reactor (191G!Gij) The impedance is large until it is saturated, and the rate of increase in current can be set the same even if there are variations in the capacitor, etc.

Therefore, since any snubber circuit circulates through the diode that is antiparallel to the thyristor, no abnormal voltage is applied to the thyristor.

Although the present explanation has been made using a thyristor, it goes without saying that the same effect can be obtained for a switching device such as a GTO, a transistor, or an ST.

〔Effect of the invention〕

According to this invention, by configuring the third series circuit connected in parallel to the second diode with a resistor and a saturable reactor, the discharge current of the capacitor and the first diode are circulated, so that the thyristor, etc. Abnormal voltage is no longer applied to the semiconductor collector.

[Brief explanation of the drawing]

Fig. 1 is a configuration diagram showing a conventional semiconductor circuit, Fig. 2 is an inverter commutation circuit using Fig. 1, Fig. 3 is an explanatory diagram showing the waveform of the trough during commutation in Fig. 2, Figure 4 (a
) ij FIG. 1 is an explanatory diagram showing the action, FIG. 4 is an explanatory diagram showing the voltage waveform (effective thyristor ill+2), and FIG. 5 is a configuration diagram showing an embodiment of the present invention. In the figure, 1tlf21 is a semiconductor collector with control poles, (3
) +41 is the first diode, (5) (6) is the second diode, +7+ +8) is the resistor, +91 Flo)
is a capacitor, and (+9) is a saturable reactor. In each figure, the same reference numerals indicate the same or corresponding parts.

Claims (2)

[Claims] (1) A parallel circuit in which a first diode and a semiconductor element with a control pole are connected in anti-parallel is connected in series, and a first series circuit in which a second diode and a capacitor are connected in series is connected in such a way that both diodes are connected in opposite directions. A semiconductor circuit in which a third series circuit in which a saturable reactor and a resistor are connected in series is connected in parallel with the second diode. (2) The semiconductor circuit according to claim 1, wherein the semiconductor element with a control pole is a thyristor.