JPS6189932U - - Google Patents

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Publication number
JPS6189932U
JPS6189932U JP17158384U JP17158384U JPS6189932U JP S6189932 U JPS6189932 U JP S6189932U JP 17158384 U JP17158384 U JP 17158384U JP 17158384 U JP17158384 U JP 17158384U JP S6189932 U JPS6189932 U JP S6189932U
Authority
JP
Japan
Prior art keywords
standby
microcomputer
power supply
circuit
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17158384U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17158384U priority Critical patent/JPS6189932U/ja
Publication of JPS6189932U publication Critical patent/JPS6189932U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のマイクロ・コンピユータのリ
セツト信号発生装置の概要を示す図、第2図は従
来形装置を示す図、第3図は本考案の一実施例と
してのマイクロ・コンピユータのリセツト信号発
生装置を示す図、第4図は第3図装置の各部信号
波形図、第5図は第4図装置におけるスタンバイ
回路およびリセツト回路を示す図、第6図はスタ
ンバイ回路およびリセツト回路部分の一層詳細な
具体例の回路図である。 1,31……マイクロ・コンピユータ、6,3
6……スタンバイ回路、7,37……リセツト回
路、4,34……スイツチ、32……バツテリ。
FIG. 1 is a diagram showing an outline of a reset signal generator for a microcomputer according to the present invention, FIG. 2 is a diagram showing a conventional device, and FIG. 3 is a diagram showing a reset signal generator for a microcomputer as an embodiment of the present invention. FIG. 4 is a diagram showing the signal waveforms of various parts of the device shown in FIG. 3, FIG. 5 is a diagram showing the standby circuit and reset circuit in the device shown in FIG. 4, and FIG. FIG. 3 is a detailed circuit diagram of a specific example. 1,31...Micro computer, 6,3
6...Standby circuit, 7, 37...Reset circuit, 4, 34...Switch, 32...Battery.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 処理中のデータをスタンバイ時に記憶保存する
スタンバイ機能を有するマイクロ・コンピユータ
、該マイクロ・コンピユータの電源端子にコンピ
ユータ作動用電源電圧を常時印加する電源回路、
主電源から装置電気負荷への電源電圧供給をオン
・オフするスイツチ、該スイツチのオン・オフに
応じて該マイクロ・コンピユータをスタンバイ動
作状態とスタンバイ解除状態とに切り替えるスタ
ンバイ回路、およびスタンバイ解除状態への切替
え動作後に該マイクロ・コンピユータをリセツト
するリセツト回路を備えたマイクロ・コンピユー
タ用のリセツト信号発生装置。
A microcomputer having a standby function that stores and stores data being processed during standby; a power supply circuit that constantly applies a power supply voltage for operating the computer to a power supply terminal of the microcomputer;
A switch that turns on and off the supply of power supply voltage from the main power supply to the electrical load of the device, a standby circuit that switches the microcomputer between a standby operating state and a standby release state according to the on and off of the switch, and a standby circuit that switches the microcomputer into a standby operating state and a standby release state. A reset signal generator for a microcomputer, comprising a reset circuit for resetting the microcomputer after a switching operation.
JP17158384U 1984-11-14 1984-11-14 Pending JPS6189932U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17158384U JPS6189932U (en) 1984-11-14 1984-11-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17158384U JPS6189932U (en) 1984-11-14 1984-11-14

Publications (1)

Publication Number Publication Date
JPS6189932U true JPS6189932U (en) 1986-06-11

Family

ID=30729259

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17158384U Pending JPS6189932U (en) 1984-11-14 1984-11-14

Country Status (1)

Country Link
JP (1) JPS6189932U (en)

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