JPS6189787A - Bit reduction system - Google Patents

Abstract

PURPOSE:To preserve continuity by the frame of chrominance components even when the data, in which an NTSC signal is sampled at 4fSG, is bit-reduced at the free ratio by separating a video signal to a luminance signal and chrominance components, inverting the chrominacne components at every frame, mixing them to the luminance signal, sampling the mixed signal intermittently, synthesizing it at plural every frames, further, separating the synthesized signal to the luminance signal and the shrominance signals, inverting the chrominance components at every frame and mixing them to the luminance signal. CONSTITUTION:A switch circuit 3 is changed over by the frame pulse which synchronizes to an input video signal and is generated by a clock generating device 5, and chrominance components C, which are mutually in the relation of a reverse phase at every frame. After that, to match the bit-reduced signal to continuity of the sub-carrier, chrominance components including a burst signal is reversely rotated at the part of an inverting circuit 14 and returned to the original position. thus, the NTSC signal can be bit-reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bit reduction system suitable for use in transmitting video signals.

[, conventional tricks]

For example, when sampling and transmitting an NTSC signal,
The sampling frequency is 4 fsc (ignoring points other than image information such as fsc hanging period and vertical blanking period, it becomes a large amount of data of j95 x 768 x 8 bits. So, such a large amount of data can be reduced to 1/2,
As a method for reduction to 1/4, etc., there is a method in which all pixels are filled in i number of frames by changing the sampling point I for each frame, in other words, a reduction method in which Mabiki sampling is performed in time series. There is. With this method, if the pit reduction ratio is, for example, 1/2, it will be 9
1÷2'Mbit/SE(!',, 1/'4
f, ;, h 91÷ 4 Mbit/st, c
Figure 3 shows an example when the pit reduction ratio is 172. In the figure, O and Δ,
The marks represent the sampling points of each pixel. And 1. In this case, in the first frame, the data corresponding to the sampling points marked O are transferred, and in the next frame, the data corresponding only to the sampling points marked Δ are transferred, and finally they are combined.

The sub-Nyquist sampling method, which uses this bit reduction method to complete one cycle of 4 fields classified as ton 1-interlace, is described in the preliminary lecture for the founding anniversary lecture published by the NHK Research Institute of Technology on June 6, 1980. [Described in New Transmission Method for High Definition Television (MUSH) J.

[Problem that the invention seeks to solve]

By the way, the color signals (including burst signals) of NTSC signals usually have a phase inversion for each frame, so if Mabiki sampling is performed as described above and synthesized, hue information will be lost and the continuity of subcarriers will be lost. It becomes impossible to maintain
Problems such as hues not matching or colors not being applied may occur.

This will be explained with reference to FIG. Now, considering the color signal that is 45 degrees ahead of the burst signal, the first
In the frame, as shown in Figure 4, the pixel A+ marked O
, A2. A3... are sampled, and the relationship between the burst signal and color signal corresponding to each pixel is such that the latter leads the former by 45°. Next, in the second frame, as shown in Figure 4B, 1L11 element Bl marked with △
, B2 .

However, the signal obtained by combining these two frames is the fourth
As shown in Figure C, the color signal is 45% for the burst signal.
°It will be delayed. This means that phase information is missing. Therefore, the continuity of the subcarrier cannot be maintained, leading to problems such as mismatching hues or lack of coloration.

This invention was made in view of the above, and is NTSC
The present invention provides a bit reduction system that can bit-reduce data obtained by sampling a signal at 4 fsc at an arbitrary ratio and maintain the continuity of the color signal according to the frame.

[Means for solving problems]

The present invention includes a first dividing means (2) that separates a video signal into a luminance signal and a color signal, and a first inverting means (2) that inverts the separated color signal for each frame and mixes it with the luminance signal. 31, 141, a bit reduction means +81, I'11 that samples this mixed signal intermittently and synthesizes it for each plurality of frames, and a second bit reduction means that separates a luminance signal and a color signal from this synthesized signal. Separation means (1
2), a second inverting means (13) for inverting the separated color signal for each frame and mixing it with the luminance signal;
(14).

[Effect]

The first separating means (2) separates the input video signal into a luminance signal and a color signal, and the separated color signals are inverted frame by frame by a first inverting means (31, (41) and separated into ζ The mixed signal is sampled intermittently by the bit reduction means 181+91 and synthesized for each frame.The synthesized signal is again processed by the second separator 1'1 (12) to reduce the luminance signal. The signal and the color signal are separated, and the separated color signal is sent to the second inverting means (1
3) The signal is inverted in step (14) and mixed into the separated luminance signal.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in detail based on FIGS. 1 and 2.

FIG. 1 shows the circuit configuration of this embodiment in a Neo version. 1 time v! 4 (21) and is separated into a luminance signal Y and a color signal C.The separated color signal C is directly sent to a switch circuit (3).
is supplied to contact a side of
The phase is inverted and the signal is supplied to the contact side of the switch circuit (3).The switch circuit (3) is switched by a frame pulse generated by the clock generator (5) in synchronization with the input video color code. Therefore, on the output side of the switch circuit (3), color signals C having mutually opposite phases are obtained for each frame.

The color signal C obtained at the output side of this switch circuit (3), which is inverted every frame, is mixed with the luminance signal Y from the separation circuit (2), and passed through the low-pass filter (6) to the AID signal.
It is supplied to a converter (7). Then, the analog signal is converted into a digital signal.

The converted digital signal is passed through a bit reduction circuit (
8), where, for example, a 1/2 reduction process as explained in FIG. 3 is performed.

In this case, the reduced data is combined every two frames to obtain a digital signal that corresponds to all the parts. This digital signal is converted into an analog signal by a D/A converter a, and is supplied to a separation circuit (12) via a low-pass filter (11).

In the separation circuit (12), the luminance signal Y and the color signal C are separated, and the separated color signal C is directly sent to the switch circuit (13).
) is supplied to the contact a side of the
The phase is reversed by 80 degrees and the signal is supplied to the contact side of the switch circuit (13). Switching of the switch circuit (13) is performed by a frame pulse (which has, for example, a reverse phase relationship with the frame pulse supplied to the switch circuit (3)) generated by the clock generator (5). Therefore, color signals C having mutually opposite phases are obtained on the output side of the switch circuit (13) for each frame.

The color signal C, which is inverted every frame, obtained at the output side of this switch circuit (13) is mixed with the luminance signal Y from the separation circuit v14 (12), and is mixed as a video signal at the output terminal (1
5).

Here, it will be explained with reference to FIG. 2 that the hue information is not lost even when the images are combined as described in I-.

Now, if we consider a color signal that is 45 degrees ahead of the burst signal as described above, in the first frame, $A1, A2, A3, A2, A3, A2, A3, A2, A2, A3, A2, A2, A3, A2, A2, A2, A3, A2, A2, A3, A2, A2, A3, A2, A2, A3, A2, A2, A3, A2, A2, A3, A2, A2, A3, A2, A3, A2, A2, A3
. Next, in the second frame, as shown in FIG. 2B, the pixels B1+B2, etc. marked with Δ are sampled, and the relationship between the burst signal and color signal for each pixel is as described above, where the latter is 45° with respect to the former. It has become more advanced. However, what should be noted here is that as mentioned above, the color signal □ is inverted every frame by the inverting circuit (4>), so in this case, for example, the signal of the second frame changes from the state shown by the broken line in Figure 2 to the solid line. In other words, the phase of the burst signal and color signal is originally reversed for each frame, but in this case, by inverting the second frame, the phase of the first frame is reversed. In the second frame, the phases of the verse 1 signal and the color signal are aligned.

Then, when the first frame and the second frame are combined, the second
A composite signal as shown in Figure C is obtained.

From this, the color signal advances by 45 degrees with respect to the burst signal, and no phase information is lost. In other words, it can be seen that the continuity of subcarriers is maintained.

However, if such a composite signal were directly D/A converted and outputted, the burst signal and color signal would have the same phase in each frame, and would therefore differ from a true NTSC signal. That is, the phases of the burst signal and color signal must actually be reversed every frame. Therefore,
The subsequent inversion circuit (14) inverts the color signal including the burst signal for each frame, returning it to the original signal whose phase is reversed for each frame.

As described above, in this embodiment, before bit reduction is performed using the NTSC signal and Mabiki sampling, the
The color signal, including the burst signal whose phase is inverted L7 for each frame, is inverted and phase-aligned at the inversion time @C4), and then the bit-reduced signal is inverted in order to match the continuity of subcarriers. Since the color signal including the burst signal is reversed and returned to its original state in the rotation (14), bit reduction of the NTSC signal can be performed reliably, and the hue can also be made the same as the IF.

Note that the inversion of soil color signals, etc. is an analog process,
Digital processing may be performed by changing the positions of the A/D converter (7) and the D/A converter ill.

〔Effect of the invention〕

As described above, according to the present invention, a video signal is separated into a luminance signal and a chrominance signal, the chrominance signal is inverted for each frame and mixed with the luminance signal, and the mixed signal is intermittently sampled for every multiple frames. The combined signal is further separated into a luminance signal and a color signal, and the color signal is inverted for each frame and mixed with the luminance signal, so the NTSC signal can be converted to 4E.
The data sampled by sc is 1/2, l/4
Even if bisotridaccidine is used at an arbitrary ratio such as l/8, the continuity of the color signal between frames, that is, the continuity of the subcarriers, can be maintained, and the problem of hues not matching or no coloring can be avoided. It will be resolved. Moreover, the amount of data is 1/2, l/4, l compared to Drastain Ink.
It is possible to transfer data at any ratio, such as /8, without any reduction, making it possible to transfer data efficiently.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing an embodiment of the present invention, FIG. 2 is a diagram for explaining the operation of FIG. 1, and FIG.
Diagram 4 for explaining bit redaction in No. 2
The figure is a diagram for explaining the conventional method. (2+, (12) is a separation circuit, 131. (13
) is a switch circuit, +4), (14) is an inverting circuit,
(5) is a clock generator, (8) is a bit reduction circuit, and (9) is a synthesis 1r! There is one route. JP-A-Sho Gl-89787 (5)

Claims (1)

[Claims] a first separating means for separating a video signal into a luminance signal and a color signal; a first inverting means for inverting the separated color signal for each frame and mixing it with the luminance signal; a bit reduction means that samples intermittently and synthesizes it for each plurality of frames; a second separation means that separates a luminance signal and a color signal from the synthesized signal; and a second separation means that inverts the separated color signal for each frame. and second inverting means for mixing the luminance signal with the luminance signal.