JPS618973B2 - - Google Patents

Info

Publication number
JPS618973B2
JPS618973B2 JP54015205A JP1520579A JPS618973B2 JP S618973 B2 JPS618973 B2 JP S618973B2 JP 54015205 A JP54015205 A JP 54015205A JP 1520579 A JP1520579 A JP 1520579A JP S618973 B2 JPS618973 B2 JP S618973B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP54015205A
Other versions
JPS55107964A (en
Inventor
Kanji Hirabayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Original Assignee
CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHO ERU ESU AI GIJUTSU KENKYU KUMIAI filed Critical CHO ERU ESU AI GIJUTSU KENKYU KUMIAI
Priority to JP1520579A priority Critical patent/JPS55107964A/ja
Publication of JPS55107964A publication Critical patent/JPS55107964A/ja
Publication of JPS618973B2 publication Critical patent/JPS618973B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Detection And Correction Of Errors (AREA)
JP1520579A 1979-02-13 1979-02-13 Device for evaluation of integrated circuit Granted JPS55107964A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1520579A JPS55107964A (en) 1979-02-13 1979-02-13 Device for evaluation of integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1520579A JPS55107964A (en) 1979-02-13 1979-02-13 Device for evaluation of integrated circuit

Publications (2)

Publication Number Publication Date
JPS55107964A JPS55107964A (en) 1980-08-19
JPS618973B2 true JPS618973B2 (ja) 1986-03-19

Family

ID=11882360

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1520579A Granted JPS55107964A (en) 1979-02-13 1979-02-13 Device for evaluation of integrated circuit

Country Status (1)

Country Link
JP (1) JPS55107964A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6123275U (ja) * 1984-07-18 1986-02-12 矢崎総業株式会社 防水型コネクタ

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4744084A (en) * 1986-02-27 1988-05-10 Mentor Graphics Corporation Hardware modeling system and method for simulating portions of electrical circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6123275U (ja) * 1984-07-18 1986-02-12 矢崎総業株式会社 防水型コネクタ

Also Published As

Publication number Publication date
JPS55107964A (en) 1980-08-19

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