JPS6187488A - Coding or decoding device of image - Google Patents

Abstract

PURPOSE:To decrease the required code amount resulting in improving the picture quality by coding the number of times of repetition in place of repeating sequential coding when the same code output appears repetitively. CONSTITUTION:The converted code fed via a transmission line 3000 is matched for the speed once in a buffer memory 503 and then fed to an M decoding circuit 500, a V decoding circuit 501 and an e decoding circuit 502. The circuit 500 applies decoding to a code, if available, representing line synchronism, decoding of coded mode, and repetition of the same code in the unit of N scanning lines. When repetition number is included, the decoded mode signal is outputted via line 5061 and the repetitive output of the same coding result is commanded to the circuits 501, 502 via the line 5050 by the number of times of decoding repetition.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a technique for encoding a single image signal.

(Prior art and its problems) Among image signals, the correlation between mtffi, that is, the inter-frame phase jx4+, is high in the waiting area of a television signal, which is a typical video signal, and this is used to increase redundancy. By reducing this, it is possible to significantly reduce the amount of information during transmission, that is, to compress data. The most simple method of using interframe correlation is called interframe predictive coding, and the smaller the amount of information contained within a screen, the more extensive compression can be achieved.

On the other hand, if the movement is large (area, speed), the pressure f,
We can't expect much from H3. On the other hand, for the moving part (including encouragement), the movement adaptively realizes the optimal prediction for the 5-cut by using the motion vector that determines the speed and direction of the movement. If complementary interframe predictive coding is used, significant compression is possible even when .'n3 is included. An example of this is the paper "Motion Compensated Interframe Coding Method" by Ninomiya et al.
, , T 63- B A 11 + 1980 11
Monthly pp. 1140). The result of highly efficient predictive coding obtained in this way is the difference and motion vector, as well as the coding parameters used in predictive coding, horizontal and vertical synchronization signals, etc., as much as possible. In code conversion that requires a small amount of code, unequal length codes such as Huffman codes are often used.

This encoding parameter is not necessarily changed to one scan line i4, but is passed to N scan lines (N22),
For example, 7.2 Lti is obtained for N=8 units. Therefore, every N feet and z lines is suitable as a delimiter for code conversion. An example of simple code conversion is shown in the part marked B in 1:4. A synchronization code (e.g., 8-bit zero) indicating that vertical or horizontal opening A is next, followed by line synchronization, and a coding mode signal, which is predicted using the auxiliary vector code and this coding mode signal. The prediction error when converted into a signal is code-converted, and the code conversion for N scanning lines is completed. Here, it is assumed that a total of 24 bits, 8 bits each, are allocated to represent the synchronization code, line synchronization, and encoding mode signal. That is, when assuming an image signal system with M scanning lines, 24×M/N (bits) are required for each side. If M=525 and N=8, it becomes 1575 bits. In a system that displays 30 screens per second, 1575X30
'-47 (kb/s). This is a constant occurrence. In other words, the motion vector and Pre3! Even if the II errors are all zero and are so small that they can be ignored, this amount of information of 47 kb/s will occur. If the transmission speed of the communication channel used for transmission is 1.5 Mb/s, then n is 47/1500 = 1/30, which is not a huge difference, but assuming a lower transmission speed, for example, 500 Mb/s.
If it is kb/s, it is 471,500 yo.

It will be 1/10, which is a considerable proportion. If the motion vector and the prediction error are the same repeatedly for every N scans + τ under the same encoding mode, a code conversion method that requires a small amount of code is required.

(Objective of the Invention) An object of the present invention is to realize a code conversion method suitable for low-speed transmission of image signals.

(Structure of the Invention) According to the present invention, the redundancy imposed on the two numbers is reduced according to the encoding parameter selected in the single look under N (N22 accuracy/attack) scanning from an image including correlation. means, a first encoding means for encoding the 1'R information representing the encoding parameter for every N running f lines; an image signal with redundancy eliminated, which is an output of the means for reducing redundancy; a second encoding means for encoding the above N scanning lines, and a determination for determining whether the outputs of both the first and second encoding means are the same as the output for the immediately preceding N scanning lines. means, when the determination by the determination means indicates the same, a third encoding means for encoding the consecutive number of times in units of N scanning lines; and 81 2nd
There is obtained an image encoding device characterized in that it comprises encoding means, or means for multiplexing the outputs of the first, second, and third encoding means.

Further, according to the present invention, the redundancy is reduced by 1 and the code is converted using the coding parameter returned in units of N scanning centers, and the code is converted. The code consisting of both image signals is N running Ef+'J
When the unit is the same, it represents the number of times the same number of repetitions is made (placed according to the information). , and when it includes information representing the number of repetitions, a means for separating this, a first decoding means for decoding the encoding parameter that is the output of the separating means, and an output of the separating means. a second decoding means for decoding the code-converted image word whose redundancy has been reduced; when the separation means separates and outputs information representing the number of repetitions, only the number of repetitions indicated by the information; '+tilJ n means for repeatedly outputting the same deba to the first:16 and second decoding means; and the first and second decoding means using the outputs of the first and second decoding means. means for reproducing an image signal in which the redundancy has been recovered by performing a reverse operation of the method used to reduce the redundancy using the output of the image signal. Can't wait for Kasou ft.

();tjj bow bow The principles of the present invention will be explained with reference to FIG.

The code combination shown in B in Figure 1 is a method that has been used in the past, as mentioned above, but if the synchronization code, line synchronization, and encoding mode signal are always fixedly converted and transmitted, it will be difficult to transmit. It may happen.

If the subsequent motion vectors and prediction errors are constant repetitions based on a certain encoding mode signal, and can generally be expressed by repeating every N scans Q, code conversion is performed again every N scan lines. It is redundant to do so.

In this case, after first performing code conversion as shown in B in Figure 1, if a code representing each subsequent repetition is generated, the state of each signal before code conversion can be changed evenly. Particularly when the reference vector and the predicted J!1 error all represent a complete stationary state, a part of the encoding mode signal, for example 1 bit, can be prepared as a code to specify whether the state is in a perfect state or not. 2r<,?(fj). The person in Figure 1 shows this case. In other words, a completely still state is converted into a code with one bit of the coding mode signal after synchronization code and line synchronization. Then, next to the encoding mode signal, one freezing cycle f1m indicating that the decoy continues for m×N scanning lines is added after code conversion.

In this way, once decoding is performed, it can be reproduced that the error vector and prediction error in the corresponding m×N scanning line are the answers under the encoding parameters represented by the encoding mode signal at this time. At this time, the code ° threat is per applicable running line,
Assuming that 8 bits are required to represent m, (-8X4)
/ (+nXN) bits.

If N=8, then 4/m bits/scanline. If the entire screen is completely blank, m can be expressed as 52578', 65, so 8 bits can be used as &, so the same < 8X4 (bits/screen)
That's enough. Comparing 1575 bits/screen using the conventional method, the result is 32/1575ζ1/49, which means that the same one screen requires an extremely small amount of code to express a completely still state.

Therefore, when the code conversion according to the present invention is performed, the completely still part is represented by the person in Figure 1, and the part that is not completely still is represented by B in Figure 1, and normally the stroke number signal is a mixture of both. The code will be converted.

The completely still state mentioned here is a state that actually appears in the case of field repetition or coding stop, which are typical methods that are usually used when the amount of information generated during encoding becomes excessive. The frequency of this occurrence is especially high when the speed is low or in images that include intense movement. When the entire screen is completely stationary, that is, when encoding is stopped for one screen, a frame synchronization representing the start of the screen is inserted in place of the line synchronization of the person in Figure 1, and the m representing the above-mentioned 65 is inserted.
The code is converted as the number of repetitions.

(11 Actual Cases) Hereinafter, actual court cases of the present invention will be explained in detail with reference to Fig. 2.3.4.

The input image signal is supplied to the vector detection circuit 10 and the northernmost circuit 20 via the FJn 1000. During vector detection +eio, the speed and direction of the motion of the image 1; 1 in d, ie, the vector, are detected and supplied to the predictive encoding circuit 20 and the unequal length encoding circuit 30 via @2000. In predictive coding, the delay between frames is determined according to the motion indicated by the kalpa vector. A prediction error signal is generated by adaptively changing one hour, and predictive encoding is performed using this signal, and the prediction error signal is supplied to the unequal length encoding circuit 30 via the event 2030. This forecast is +4+14@
The difference signal is usually subjected to a process called quantization that limits the number of possible output levels, and in the case of the present invention, the characteristics of this quantization are prepared for multiple failures, and rP% 40
One of them is selected and used in accordance with the encoded control signal supplied via 00. In addition, this encoded τ inquiry signal can also be used to perform thinning of pixels, scan lines, etc., and addition of frames or fields. This encoding control signal is generated by the encoding control circuit 40 by monitoring the sufficiency state of the built-in buffer memory (304 in FIG. 3) in the unequal length encoding circuit 30. The encoded ° and °ζ control signals supplied are also code-converted in the unequal length encoding circuit 30. Predicted code Kitakai@2
0 does not necessarily have to have the ability to generate a prediction signal corresponding to the auxiliary vector; for example, so-called inter-frame prediction, in which pixels of one frame before are fixedly used for prediction, may be used. In addition, there is no problem at all when replacing it with a transform encoding circuit that uses orthogonal transforms such as Hadamard transform and cosine transform, which is limited to predictive encoding. May be applied. At this time, the obtained device coefficients are quantized, and ! ! 12030 to the unequal length encoding circuit 30.

In the unequal length encoding circuit 30, the input code weight is 1 s
The =v signal, the prediction error signal (or conversion coefficient), and the coefficient vector are code-converted, and when transferred to the transmission path 3000, speed matching is performed between the information generation speed and the transmission speed. The sufficiency status of the buffer memory for rate matching (304 in FIG. 3) is provided to the encoding control circuit 40 via line 3040. The above is a description of the encoding device, and next, the decoding device will be explained.

The converted code supplied via the transmission path 3000 is first subjected to code conversion in the unequal length decoding circuit 50,
Separated into encoded control signal, prediction error signal (or transformation coefficient) and motion vector, (e) 5061, 5,061, respectively.
062.5063. Using these three signals, the pre-tll decoding circuit 60 decodes and reproduces the image signal by the reverse operation of the predictive coding circuit 20, and i% 60
Output via 00.

Of course, when orthogonal variation is used, the prediction τi4
1] The decoding circuit 60 has a function of performing orthogonal inverse transformation.

Next, using Figure 43, (B), the unequal length encoding circuit 30
The following describes the unequal length decoding circuit 50.

The unequal length encoding circuit 30 is shown in the third column.

The encoding control signal is transmitted to the M encoding circuit 30 via line 4000.
0 and e te encoding circuit 302 . ■The operation of the code Kitakai@300 will be explained in detail later, but the code conversion output is sent to the multiplexer (M P
At the same time, it sends a message to the encoding circuit 301 via the code 3031 that this code conversion has been completed.
Shown below. Then, in the V=+ encoding circuit 30], the line 2
At the same time that the code Km of the motion vector supplied through 000 is completed and supplied to the multiplexer 303 via the binding 3133, the completion of this code fm is indicated in the following manner.
132 to the e encoding circuit 302. Here, it is assumed that the motion vectors within N scanning lines are collectively code-converted and output, and arranged after the coding mode as shown in B in FIG. In the e-encoding circuit 302, the prediction error signal (or transformation coefficient) supplied via the line 2030 is code-converted according to the encoding mode signal, and is supplied to the multiplexer 303 via the line 3233, at the same time this code conversion is performed. has ended (M 4% via 13230
It is shown in the encoding circuit 300. multiplexer 3n31Tt,
Line l? shown in Figure 1A? ′? I4, encoding mode signal and run length three signals, or iN i ! ”＜I
The four signals of line synchronization, encoding mode signal, function vector code, and prediction i-difference-i1 shown in B are 8-multiplexed.

The multiplexed signal is supplied to a buffer memory 304,
After speed matching is performed, it is output to the transmission "63 n 00. When the buffer memory 304 is full t,'+=4(,n
Mol Answer-: Shows the proportion of 1 in t used) is 4
The signal is supplied to the encoding control circuit 40 via 3040.

'', published 3im (B) shows an unequal length decoding circuit 50.The converted code supplied via the transmission path 3000 is speed-matched by the -tan buffer memo IJ 503, and then sent to the M decoding circuit. 500, V decoding circuit 501, and e
The signal is supplied to a decoding circuit 502. The M decoding circuit 500 performs line synchronization, encoding mode decoding, and N scanning 4 to 1.
If there is a code that indicates how many times the same code conversion has been repeated in the 7''-■ position, perform the appropriate coding of this code. At the same time, outputting the encoded mode signal via line 5061,
[Instructs the V decoding circuit 501 and the e decoding circuit 502 to repeat and output the same quantification result for the number of repetitions specified by [5050]. This-
191] is a so-called stop that stops encoding. At this time, both the motion vector and the forward reconnaissance signal are often represented by zero, and it is sufficient to output four zeros to the intercostals of the coding station 5E. When the determined number of look-backs is completed and the next line synchronization and encoding mode decoding are completed (see B in FIG. Instruct @501 to start effect vector No. 9. The v decoding circuit 501 decodes the +10J vector and outputs it via @5063. When this output is completed, the e-comment circuit 502 is instructed to start decoding the prediction error signal via the line 5152. The decoded prediction error signal is output via line 5062. Both the V decoding circuit 501 and the e decoding circuit 502 must be configured so that the same output can be repeated once under the control of the M decoding circuit 500.
As mentioned above, it is normally configured so that zero can be output. When the e-'f'W encoding circuit 502 completes the decoding of the prediction error signal, it notifies the e-'f'W encoding circuit 502 of the completion via the chip 5250.

Next, we will discuss the details of M encoding circuit 1?!30 and M decoding circuit 50 using No. 41''1(A) and (B).
Explain to J.

FIG. 4(4) shows the M encoding circuit 30. The encoding mode signal provided over line 4000 is applied to mode encoding circuits 310, 7 . It is simultaneously supplied to the ffl generator 312 and the delay circuit 311. The mode coder circuit 310 adds line synchronization to the input coded mode signal, converts the code, and supplies it to the multiplexer Mr317. Daisanki 3 ],
2, the M delay circuit 311 calculates the difference between the encoded mode signal delayed by N scanning lines, and the zero detection circuit 31
In step 3, zero detection is performed, that is, a match is checked.

When the zero detection circuit 313 detects zero, it instructs the run count [P1 path 314 to increase the count value by 8 by 1 through the gate 1314, and determines whether or not a zero exists through the link 1316. Control +141 Tell Uoro 316. The run counting circuit 314 executes counting of the fourth order to be turned over according to the count start/end commands supplied via the line 1614, and upon receiving the end command, the counting results are transferred to the run encoding circuit 314.
Supply to 5. The run encoding circuit 315 converts the input counting result and supplies it to the multiplexing circuit 317 . ?
The jll+ wholesale circuit 316 controls the counting and multiplexing of this run. It receives and receives a zero or non-zero signal through line 1316, but when it transitions from non-zero to zero,
4, the run counting circuit 314 is instructed to start counting, and when the transition from zero to non-zero occurs, the run counting circuit 314 is instructed to end counting. Also line 1
mode encoding circuit 310 during run counting via 617
The multiplexing circuit 317 is controlled so that the output of the run encoding circuit 315 is not multiplexed, and the output of the run encoding circuit 315 is multiplexed only after run counting is completed. In addition, if run counting is performed, the start of motion vector encoding is set to V after outputting the next mode code, or every time a mode code is output if run counting is not performed. Encoding circuit 301
instruct. During run counting, there is no output from the V-mori-northern circuit 301, which corresponds to an output of zero. Regarding the e-encoding circuit 302, the V-encoding circuit 301 also operates during run counting.
Since the end of the sign conversion of the motion vector is not indicated, there is no output, which also corresponds to an output of zero.

The operation of the control circuit 316 is restarted by a signal indicating the end of code conversion of the prediction error signal supplied via the twisted line 3230 of the e-encoding circuit 302. The code representing the line synchronization and coding mode signals multiplexed in this way or the line synchronization, coding mode signal and the number of repetitions is line 3.
034 to the multiplexer 303.

FIG. 4+, 13) shows the M decoding circuit 50. line 503
The output of the buffer memory 503 fed through 0 is
The signal is supplied to a mode decoding circuit 510 and a run decoding circuit 511. Mode decoding circuit 510 decodes the line synchronization, encoding mode signal and supplies the decoding result to holding circuit 513 via line 1013.

When there is a pass code indicating the number of repetitions after the encoding mode signal, the run decoding circuit 511 decodes the run length and then sends the information indicating the run length to the control circuit 5 via +IHxx2.
At the same time, it instructs the holding circuit 513 to hold the encoded mode signal just decoded via the line 5110, and also generates a signal to the gate circuit 514 instructing the number of repetitions. let The control circuit 512 counts the time corresponding to the supplied number of repetitions, and when this time has elapsed, it sends a signal to the holding circuit 513 via a line 5120 to end the holding, and to the gate circuit 514 to stop the signal instructing the repetition. issue instructions to do so. Also, at this time, the fact that the repetition has ended is transmitted to the mode decoding circuit 510 via the line 1210, and the mode decoding circuit 510 is instructed to execute the decoding of the encoded mode signal.

When there is no information indicating the run length after the encoding mode signal, the run decoding circuit 511 does not output any particular signal to the holding circuit 513 and gate circuit 514, and the encoding mode signal is sent to the control circuit 512 via line 1112. Indicates completion of signal decoding. At this time, the V decoding circuit 501 is instructed to start decoding the motion vector via i5'051. The operation of the control circuit 512 is controlled by the e-encoding circuit 502.
The process starts with a signal indicating the end of decoding of the prediction error signal supplied via line 5050, and ends immediately with an instruction to the v decoding circuit 501 via line 5051 to start decoding the motion vector. From the gate circuit 514 the line 5050
A repetition signal is output through the V decoding circuit 5, but when there is no information indicating repetition, it is an inactive signal, and the V decoding circuit 5
01, has no effect on the e decoding circuit 502. When there is information indicating repetition, this signal becomes active, and according to the above example, the outputs of the V decoding circuit 501 and the e decoding circuit 502 are both set to zero.

(Effect of the invention) When the present invention is used, when the same encoded output appears four times, the number of repetitions is encoded instead of repeating the final encoding, so the amount of code required is small. Therefore, when encoding and transmitting an image signal at a very low transmission rate, it is possible to allocate an extra transmission rate to the encoding of the original image part, resulting in an improvement in the quality of one image. Therefore, when the present invention is put into practice, the lower the transmission speed, the greater the effect.

The present invention also provides a predictive coding method as an example.
．． 6i can be used for orthogonal transformation as well, so
The scope of its applicability is wide, and when the present invention is put into practical use, its effects are extremely large.

[Brief explanation of drawings]

Figure 1 is a block diagram explaining the detailed explanation of the present invention, 2.3.41', <1 is a block diagram explaining the implementation of the present invention, and in the figure, 1o: i vector detection circuit; ? 11 is an encoding circuit, 30 is an unequal length encoding circuit, 40 is an encoding circuit,
50 is an unequal length decoding circuit, 60 is a predictive encoding system, 30
0 is the M encoding circuit, 301 is the I/T activation circuit, 302
is an e encoding circuit, 303 is a multiplexer (MPX),
304 is a buffer memory, 503 is a buffer memory, 5
00 is M1 encoding 11'' Raku, 501 is V decoding circuit, 50
2 is an e decoding circuit.

Claims (1)

[Claims] 1. In encoding an image signal, means for reducing the redundancy included in the image according to an encoding parameter selected in units of N (an integer where N≧1) scanning lines from the image including the correlation. , a first encoding means for encoding information representing the encoding parameter every N scanning lines, and an image signal with reduced redundancy, which is an output of the redundancy reducing means, every N scanning lines a second encoding means for encoding the outputs of both the first and second encoding means into the previous N
determining means for determining whether or not the output is the same as the output for the scanning line; and when the determination by the determining means indicates that the output is the same, third encoding for encoding the number of consecutive times in units of the N scanning lines; and means for multiplexing the outputs of the first and second encoding means, or the first, second, and third encoding means using the determination result of the determination means. An image encoding device for 2. An image signal whose redundancy is reduced and code converted using encoding parameters selected in units of N scanning lines,
A code group consisting of both the encoding parameter and the code-converted image signal, and when the same code is repeated in units of N scanning lines, the image signal is decoded from the code group replaced by information representing the number of repetitions. In doing so, means for separating the encoding parameter, the code-converted image signal, and information representing the number of repetitions when the information is included, respectively; and a step for decoding the encoding parameter that is the output of the separating means. a second decoding means that uses the output of the first decoding means to decode the code-converted image signal that is the output of the separation means; A device for decoding an image signal, comprising: control means for manipulating and outputting the output of the second decoding means by the number of repetitions indicated by the information when the information indicating the number of times is separated and output. .