JPS6181056A - Noise eliminating circuit - Google Patents

Noise eliminating circuit

Info

Publication number
JPS6181056A
JPS6181056A JP20469084A JP20469084A JPS6181056A JP S6181056 A JPS6181056 A JP S6181056A JP 20469084 A JP20469084 A JP 20469084A JP 20469084 A JP20469084 A JP 20469084A JP S6181056 A JPS6181056 A JP S6181056A
Authority
JP
Japan
Prior art keywords
signal
input signal
noise
input
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20469084A
Other languages
Japanese (ja)
Inventor
Takehiko Minowa
箕輪 剛彦
Toshifumi Yamamoto
敏文 山本
Masami Fukuda
福田 正巳
Fusayoshi Takezawa
房美 竹沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP20469084A priority Critical patent/JPS6181056A/en
Publication of JPS6181056A publication Critical patent/JPS6181056A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/069Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection by detecting edges or zero crossings

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Dc Digital Transmission (AREA)
  • Noise Elimination (AREA)

Abstract

PURPOSE:To prevent the erroneous detection of signals due to noise by generating a discriminating signal which is turned on when the variation of the rise of an input signal is larger than that of the noise and is turned off when the variation of the fall of the input signal is larger than that of the noise and transmitting or not transmitting the input signal to a noise eliminating circuit in accordance with turning-on or off of the discriminating signal. CONSTITUTION:An input signal 4 to a FAX is inputted to a logarithmic amplifier 6 and is subjected to a logarithmic amplification. When this signal is inputted to a differentiating circuit 8, the differentiating circuit 8 outputs a signal which becomes as shown in a figure (a) by the rise of the input signal and becomes as shown in a figure (b) by the fall of the input signal. When this signal is inputted to a comparator 10, an RS flip flop 12 is set through an operational amplifier 1001 by the signal shown in the figure (a) and is reset through an operational amplifier 1002 by the signal shown in the figure (b) because a voltage corresponding to >=10dB variation of the input signal is applied to the (+) terminal of the operational amplifier 1001 and the (-) terminal of the operational amplifier 1002.

Description

【発明の詳細な説明】 し発明の技術的分野〕 不発明は、ファクシミリ装置の網制御において、ノイズ
による受信信号誤検知を防止するノイズ除去回路lこ関
する。
DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a noise removal circuit for preventing false detection of received signals due to noise in network control of facsimile machines.

し発明の技術的背景〕 ファクシミリ装置のt2制御部は、第8図に示す様に、
回線とのインターフェースとなるネットワークコントロ
ールユニット(以下NCUと称す)100と、変復調を
行うモデム102と、それらを制御する主制御部(以下
CPUと称す)104とから成る。
Technical background of the invention] As shown in FIG. 8, the t2 control section of the facsimile machine
It consists of a network control unit (hereinafter referred to as NCU) 100 that serves as an interface with a line, a modem 102 that performs modulation and demodulation, and a main control unit (hereinafter referred to as CPU) 104 that controls them.

入力信号は、ファクシミリ装置(以下FAXと称す)側
に切り替えられているNCUl 00を通り、モデム1
02に入力される。モデム102では、入力信号の復調
信号と信号が受信されていることを伝える信号(以下C
Dと称す)をCP U IQ、1へ入力する。
The input signal passes through NCUl 00, which is switched to the facsimile machine (hereinafter referred to as FAX) side, and is sent to modem 1.
02 is input. The modem 102 receives a demodulated signal of the input signal and a signal indicating that the signal is being received (hereinafter referred to as C).
D) is input to CPU IQ,1.

CPUl04では、こめCDを監視し、この信号がオン
の時は、自ら信号を送出せず、安価で容易な信号衝突防
止を行っていた。
The CPU104 monitors the CD, and when this signal is on, it does not send a signal itself, which is an inexpensive and easy way to prevent signal collision.

〔背景技術の問題点〕[Problems with background technology]

ところで、モデム102は、理想的には、FAX信号に
関係のある信号を受信した場合のみCDをCPUl04
に入力することが望すれる。しかるに、従来はモデム1
02が受信可能なレベルの信号が釆ると、全てCDを出
し、 CPUlO4に相手局より信号が来ているこ出を
伝えていた、この為、モデム102の受信範囲にノイズ
が入ると、CDをCPUlO4へ送る為、自ら信号を送
出しないという不都合があった。
By the way, ideally, the modem 102 transfers the CD to the CPU 104 only when it receives a signal related to a FAX signal.
It is desirable to enter the following information. However, conventionally modem 1
When a signal reaches a level that modem 102 can receive, it outputs all CDs and tells CPUIO4 that a signal is coming from the other station.For this reason, when noise enters the reception range of modem 102, it outputs a CD. There was an inconvenience that the signal was not sent out by itself in order to send the signal to the CPUIO4.

このように、従来のファクシミリ値打では、信号の有無
をレベルで判断していた為に、モデムの受信可能範囲に
ノイズが入って来ると・それを相手局からの信号と判断
し、自局よりの信号を出さないという問題点があった。
In this way, in conventional facsimile dialing, the presence or absence of a signal was determined based on the level, so if noise came within the modem's reception range, it would be judged as a signal from the other station, and the signal would be transmitted from the own station. There was a problem in that it did not give a signal.

〔発明の目的〕[Purpose of the invention]

本発明は、上記問題点を除去し、受信レベル内にノイズ
等があっても、信号のみを検出することが可能なノイズ
除去回路を提供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a noise removal circuit capable of eliminating the above-mentioned problems and detecting only a signal even if there is noise or the like within the reception level.

〔発明の概要〕[Summary of the invention]

本発明では、入力信号の立ち上がりの変化量がノイズの
変化量より大きくなるとオンとなり、前記入力信号の立
ち下がりの変化量がノイズの変化量より犬きくなるとオ
フになる判別信号を発生させ、該判別信号のオンオフに
応じて、前記入力信号の本回路への伝送を接断すること
1こよって前記目的を達成する。
In the present invention, a discrimination signal is generated that is turned on when the amount of change in the rising edge of the input signal is greater than the amount of change in the noise, and is turned off when the amount of change in the falling edge of the input signal is greater than the amount of change in the noise. The above object is achieved by disconnecting or disconnecting the transmission of the input signal to this circuit in accordance with the on/off state of the discrimination signal.

〔発明の実施例〕[Embodiments of the invention]

以下、図面に基づいて、本発明の1実施例を具体的かつ
詳細に説明する。第1図は本発明の工実施例に係る回路
のブロック図であり、第1図において2は、本回路への
入力信号ライン、4 it F AXへの入力信号ライ
ン、6は2つのオペアンプ、抵抗、トランジスタより成
るログアンプ、8は公知の微分回路、10は抵抗を及び
オペアンプ1001 ・1002からなるコンパレータ
であり、12はRSフリップフロップであり、14は本
実施例により発生するCD信号を伝送するCD信号ライ
ン、16は切換回路、18は本回路ラインである。
DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described in detail below based on the drawings. FIG. 1 is a block diagram of a circuit according to an embodiment of the present invention. In FIG. 1, 2 is an input signal line to this circuit, 4 is an input signal line to it FAX, 6 is two operational amplifiers, A log amplifier consisting of a resistor and a transistor, 8 a known differentiating circuit, 10 a comparator consisting of a resistor and operational amplifiers 1001 and 1002, 12 an RS flip-flop, and 14 transmitting the CD signal generated by this embodiment. 16 is a switching circuit, and 18 is a main circuit line.

ログアンプ6は回線からのデシベル入力をリニアな電圧
値にする為のものである。第2図及び第3図はログアン
プ6の入力信号及び出力信号を示し縦軸が電圧、横軸が
dBmを表わす。同図に示す如く、例えば−4QdBm
から一30dBmの入力レベルの変化量と、 LOdB
mからOdBmの変化量が異なっていても、出力電圧の
変化量が、−4QdBmから一30dBmと、−1Qd
Bmから068m間で等しくなる。
The log amplifier 6 is used to convert the decibel input from the line into a linear voltage value. FIGS. 2 and 3 show input and output signals of the log amplifier 6, with the vertical axis representing voltage and the horizontal axis representing dBm. As shown in the figure, for example, -4QdBm
The amount of change in input level from -30dBm to LOdB
Even if the amount of change from m to OdBm is different, the amount of change in the output voltage is -4QdBm to -30dBm, and -1Qd
It becomes equal between Bm and 068m.

微分回路8は、現在のレベルが変化すると、ある時定数
に従って、ハイレベルの変化であればノ\イレベルに、
ローレベルであればローレベルに、ある時間だけ変化す
る。
When the current level changes, the differentiating circuit 8 changes it to a no level according to a certain time constant if the change is at a high level;
If it is low level, it changes to low level for a certain amount of time.

この信号を表わしたのが第4図であり、縦軸が電圧、横
軸が時間を表わす。aの部分は信号が現在のレベルから
高い方向に変化したことを示し、bの部分は現在のレベ
ルから低い方向に変化していることを示す。
This signal is shown in FIG. 4, where the vertical axis represents voltage and the horizontal axis represents time. The portion a indicates that the signal has changed upward from the current level, and the portion b indicates that the signal has changed downward from the current level.

コンパレータ10は、第4図において示される2の信号
(信号ON)とbの信号(信号OF F ’)に対して
、それぞれスレッシホールドを決めて予め抵抗で分圧さ
れている。
The comparator 10 has thresholds determined for each of the signal 2 (signal ON) and the signal b (signal OFF') shown in FIG. 4, and voltages are divided in advance using resistors.

即ち、オペアンプ1001の(十)端子とオペアンプ1
002の(−)端子に、例えば、0.24Vの電圧が印
加されている。
That is, the (10) terminal of operational amplifier 1001 and operational amplifier 1
For example, a voltage of 0.24V is applied to the (-) terminal of 002.

万ペアンブ1001の出力は、RSフリップフロップ1
2のS(セクト)端子と接続され、オペアンプ1002
の出力はRSフリンブフロノブ12のR(リセット)端
子と接続される。
The output of 1001 million pampers is the RS flip-flop 1
It is connected to the S (sect) terminal of 2, and the operational amplifier 1002
The output of is connected to the R (reset) terminal of the RS flimb flow knob 12.

該R,Sフリ、プフロツプ12の出力信号たるCD14
が切換回路16に入力され、この切換回路16では、C
DI 4がローレベルの時には切換回路16の接片はB
(アース)側に接続されて、CD14がハイレベルにな
ると、切換回路16の接片がA側に接続され、入力信号
2が本回路ライン18に伝送される。
CD14 which is the output signal of the R, S flipflop 12
is input to the switching circuit 16, and in this switching circuit 16, C
When DI 4 is at low level, the contact of switching circuit 16 is B.
When the CD 14 becomes high level, the contact piece of the switching circuit 16 is connected to the A side, and the input signal 2 is transmitted to the main circuit line 18.

次に、本実施例の動作について説明する。Next, the operation of this embodiment will be explained.

第5図は、モデムの受信範囲内にノイズがある入力信号
のタイムチャート、又、第6図は意味のある入力信号の
タイムチャートであり、縦軸がdBm、横軸が時間を表
わす。今、第6図に示す様に、1QdB以上変化する信
号が意味のある信号であり、この信号がログアンプ6に
入力される場合を考える。FAXへの入力信号4は、ロ
グアンプ6に入力され、上述した如く、対数増巾される
FIG. 5 is a time chart of an input signal with noise within the receiving range of the modem, and FIG. 6 is a time chart of a meaningful input signal, where the vertical axis represents dBm and the horizontal axis represents time. Now, as shown in FIG. 6, a case will be considered in which a signal that changes by 1QdB or more is a meaningful signal, and this signal is input to the log amplifier 6. The input signal 4 to the FAX is input to the log amplifier 6 and is logarithmically amplified as described above.

即ち、入力信号の1QdBの変化は、ログアンプ6によ
りどこで変化しても出力電圧の変化部としては等しくな
ろう 次にこの信号は、微分回路8へ入力される すると、微
分回路8では、入力信号の立ちあがりで第4図aに示さ
れる信号となり、入力信号の立ち下がりで、第4図すに
示す如き信号を出力する。
In other words, a 1QdB change in the input signal will result in the same change in the output voltage no matter where it changes due to the log amplifier 6. Next, this signal is input to the differentiating circuit 8. Then, in the differentiating circuit 8, the input signal At the rising edge of the signal, the signal shown in FIG. 4a is obtained, and at the falling edge of the input signal, the signal shown in FIG. 4 is outputted.

次iC1第4図に示す如き信号がコンパレーク10に入
力されると、前述した如く、コンパレータ1゜の抵抗に
より、オペアンプ1001・1002には、10dB以
上の入力信号の変化に対応する電圧(例えば0.24V
 )カオヘ77プ1001 (7)(+)端子及びオペ
アンプ1002の(−2端子に印加されている為、第4
図aの信号により、オペアンプ1001を介してRSフ
リップフロップ12がセットされ、又、第4図すの信号
により、オペアンプ1002を介してRSフリップフロ
ップ12がリセットされる。
Next, when a signal as shown in iC1 FIG. .24V
) Kaohe 77p1001 (7) Since the voltage is applied to the (+) terminal and the (-2 terminal of the operational amplifier 1002, the 4th
The signal shown in FIG. 4 sets the RS flip-flop 12 via the operational amplifier 1001, and the signal shown in FIG.

しかして、第6図ζこ示す如き入力信号があった場合、
RSフリップフロップ12の出力信号CDは、同図にお
いて示されるΔtの期間だけハイレベルとなり、他の期
間ではローレベルとなる如き信号となる。
However, if there is an input signal as shown in Figure 6ζ,
The output signal CD of the RS flip-flop 12 is at a high level only during the period Δt shown in the figure, and at a low level during other periods.

このCD信号が、切換回路16に入力されると、CDが
ハイレベルの時にのみ切換回路16の接片がAと接続し
、入力信号2が本回路18に伝送される。
When this CD signal is input to the switching circuit 16, the contact piece of the switching circuit 16 connects to A only when CD is at a high level, and the input signal 2 is transmitted to the main circuit 18.

しかして、第6図に示される入力信号があった時には、
本回路18に表わされる信号は第7図に示す如き信号と
なる。
However, when there is an input signal shown in Fig. 6,
The signal represented by this circuit 18 is as shown in FIG.

〔発明の効果〕〔Effect of the invention〕

以上、詳細かつ具体的に説明した如く、本発明によれば
、意味のある信号が入力されていない時には、本回路へ
の信号の入力はなく、意味のある信号が入力された時に
のみ、その信号が本回路へ入力されるので、ノイズによ
る信号誤検知を防止することができる。
As described above in detail and specifically, according to the present invention, no signal is input to this circuit when no meaningful signal is input, and only when a meaningful signal is input. Since the signal is input to this circuit, false detection of the signal due to noise can be prevented.

又、本発明は、意味のある入力信号の有無を判断させ、
切換回路の切換を行うものであるから、FAXにかぎら
ず、データ伝送装置の網制御部に容易に応用することが
出来る。
Further, the present invention allows determining the presence or absence of a meaningful input signal,
Since the switching circuit is switched, it can be easily applied not only to FAX machines but also to network control units of data transmission devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の1実施例に係るノイズ除去回路のブ
ロック図、第2図及び第3図は、ログアンプの入力信号
及び出力信号を示すグラフ、第4図は、微分回路の出力
信号を示すグラフ、第5図はMODEMの受信範囲内に
ノイズが存する入力信号を示すタイムチャート、第6図
は意味のある入力信号を示すタイムチャート、第7図は
、本回路に表わされる信号を示すタイムチャート、第8
図はファクシミリ装置の網制御部の構成を示すブロック
図である。 6・・・ログアンプ、8・・・微分回路、10・・・コ
ンパレータ、12・・・RSフリップフロップ、16.
切換回路。 第2図 t □ 第5図 ・・岬 t□
FIG. 1 is a block diagram of a noise removal circuit according to an embodiment of the present invention, FIGS. 2 and 3 are graphs showing input signals and output signals of a log amplifier, and FIG. 4 is an output of a differentiating circuit. Graphs showing signals; Figure 5 is a time chart showing an input signal with noise within the receiving range of the MODEM; Figure 6 is a time chart showing meaningful input signals; Figure 7 is a signal represented by this circuit. Time chart showing 8th
The figure is a block diagram showing the configuration of a network control section of a facsimile machine. 6... Log amplifier, 8... Differential circuit, 10... Comparator, 12... RS flip-flop, 16.
switching circuit. Figure 2 t □ Figure 5... Cape t □

Claims (1)

【特許請求の範囲】[Claims] (1)入力信号の立ちあがりの変化量がノイズの変化量
より大きくなると、オンとなり、前記入力信号の立ち下
がりの変化量が、ノイズの変化量より大きくなるとオフ
となる判別信号を発生する手段と、該判別信号のオンオ
フに応じて前記入力信号の本回路への伝送を接断する切
換手段とを有することを特徴とするノイズ除去回路。
(1) means for generating a discrimination signal that turns on when the amount of change in the rising edge of the input signal is greater than the amount of change in noise; and turns off when the amount of change in the falling edge of the input signal becomes greater than the amount of change in noise; , and switching means for connecting or disconnecting transmission of the input signal to the circuit according to whether the discrimination signal is turned on or off.
JP20469084A 1984-09-28 1984-09-28 Noise eliminating circuit Pending JPS6181056A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20469084A JPS6181056A (en) 1984-09-28 1984-09-28 Noise eliminating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20469084A JPS6181056A (en) 1984-09-28 1984-09-28 Noise eliminating circuit

Publications (1)

Publication Number Publication Date
JPS6181056A true JPS6181056A (en) 1986-04-24

Family

ID=16494693

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20469084A Pending JPS6181056A (en) 1984-09-28 1984-09-28 Noise eliminating circuit

Country Status (1)

Country Link
JP (1) JPS6181056A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0642235A2 (en) * 1993-09-01 1995-03-08 Siemens Aktiengesellschaft Method for the determination and evaluation of an optical signal and datat recording apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0642235A2 (en) * 1993-09-01 1995-03-08 Siemens Aktiengesellschaft Method for the determination and evaluation of an optical signal and datat recording apparatus
EP0642235A3 (en) * 1993-09-01 1996-05-01 Siemens Ag Method for the determination and evaluation of an optical signal and datat recording apparatus.

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