JPS617918A - Multipoint analog input device - Google Patents

Multipoint analog input device

Info

Publication number
JPS617918A
JPS617918A JP12760084A JP12760084A JPS617918A JP S617918 A JPS617918 A JP S617918A JP 12760084 A JP12760084 A JP 12760084A JP 12760084 A JP12760084 A JP 12760084A JP S617918 A JPS617918 A JP S617918A
Authority
JP
Japan
Prior art keywords
value
theoretical value
point
analog
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12760084A
Other languages
Japanese (ja)
Inventor
Seiichi Heratsu
箆津 精一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Fuji Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd, Fuji Electric Manufacturing Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP12760084A priority Critical patent/JPS617918A/en
Publication of JPS617918A publication Critical patent/JPS617918A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To curtail a zero or span adjustment by storing data of a zero point and a span point of each analog signal in a memory, and deriving a theoretical value of the analog signal inputted thereafter, from a theoretical value corresponding to said data. CONSTITUTION:First of all, input signals Vi1-Vin are also set to 0%, a switch S1 is closed and a command for inputting an input quantity to a CPU5 is generated. As a result, a value of 0% of each analog quantity is inputted through a multiplexer 2 and stored in a memory 6. Subsequently, the input signals Vi1- Vin are set to 100%, switches S2, S3 are closed, and when a command is generated in the CPU5, a value of 100% of the input signal is stored in the memory 6. The unknown quantity inputted thereafter can be calculated easily from a theoretical value of that time and a digital value of the time of 0% and 100%. In this way, when deriving the theoretical value, the difference between a zero point and a scan point is calculated, therefore, a drift offset quantity existing on the way is offset, and accordingly, the operation can be executed exactly.

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 この発明は温度、圧力等の各種プロセス蓋で代表される
アナログ量をマイクロコンピュータ(単に、マイコンと
もいう。)の如ぎディジタル処理装置に取り込むための
多点アナログ入力装置に関する。
[Detailed Description of the Invention] [Technical Field to Which the Invention Pertains] This invention is a method of importing analog quantities represented by various process lids such as temperature and pressure into a digital processing device such as a microcomputer (simply referred to as a microcomputer). The present invention relates to a multi-point analog input device for use in a computer.

〔従来技術とその問題点〕[Prior art and its problems]

第4図はかかるアナログ入力装置の従来例を示す構成図
である。同図において、1(11〜1n)。
FIG. 4 is a block diagram showing a conventional example of such an analog input device. In the figure, 1 (11-1n).

3は演算増幅器(オペアンプ)、2はマルチプレクサ、
4はアナログ/ディジタル(A/D )変換器、5はマ
イコンの如きディジタル処理装置(CPU)である。な
お、R11、R12〜Rnl s Rn2は抵抗、R1
4p Rts −Rn4 j FLn5は可変抵抗器で
ある。
3 is an operational amplifier, 2 is a multiplexer,
4 is an analog/digital (A/D) converter, and 5 is a digital processing unit (CPU) such as a microcomputer. Note that R11, R12 to Rnl s Rn2 are resistors, and R1
4p Rts -Rn4 j FLn5 is a variable resistor.

このような構成において、オペアンプ11〜1nからの
各アナログ量は、マルチプレクサ2にて順次選択され、
オペアンプ3にて適宜に増幅された後、A/D変換器4
によりディジタル量に変換されてCPU5へ取り込まれ
る。ここで用いられるオペアンプ1は、その構成素子で
ある抵抗等のノ(2ツキによって特性が互いに異なるの
で、可変抵抗器を操作する等して入力量のゼロ点、スノ
くン点を調整することが必要である。しかしながら、こ
の調整は各入力単位毎に行々われるため、入力点数が増
大するとW4整に賛する時間がぼう犬となるばかりでな
く、部品点数等が増えて高価になるという難点を有して
いる。
In such a configuration, each analog quantity from the operational amplifiers 11 to 1n is sequentially selected by the multiplexer 2,
After being appropriately amplified by the operational amplifier 3, the A/D converter 4
is converted into a digital quantity and taken into the CPU 5. The operational amplifier 1 used here has different characteristics depending on its constituent elements, such as resistors. However, since this adjustment is performed for each input unit, as the number of input points increases, not only does the time required for W4 adjustment become wasted, but the number of parts increases, making it expensive. It has its drawbacks.

〔発明の目的〕[Purpose of the invention]

この発明は上記に鑑みてなされたもので、ゼロまたはス
パン11整のための部品点数および時間を削減すること
が可能なアナログ入力装置を提供することを目的とする
The present invention has been made in view of the above, and an object of the present invention is to provide an analog input device that can reduce the number of parts and time for zero or span adjustment.

〔発明の要点〕[Key points of the invention]

この発明は、ディジタル処理装置には一般的にメモリが
使用されている点に着目し、このメモリに各アナログ信
号のゼロ点とスパン点のデータをそれぞれ前もって取り
込んでおき、このデータとそれに対応する理論値とから
その後に入力されるアナログ信号の理Wk値を求めるこ
とにより、各入力点毎の調整を不要ならしめたものであ
る。
This invention focuses on the fact that a memory is generally used in a digital processing device, and stores the data of the zero point and span point of each analog signal in advance in this memory, and stores this data and the corresponding data. By determining the theoretical Wk value of the analog signal input thereafter from the theoretical value, adjustment for each input point is not required.

〔発明の実施例〕 第1図はこの発明の実施例を示す構成図、第2図は未知
アナログ入力量の理論値への換算操作を説明するための
グラフである。
[Embodiment of the Invention] FIG. 1 is a block diagram showing an embodiment of the invention, and FIG. 2 is a graph for explaining the conversion operation of an unknown analog input amount into a theoretical value.

#!1図からも明らかなように、この実施例は第4図に
示されるものに対して、スイッチ81〜S3゜ランダム
アクセスメモリ(RAM)6%が設けられていて、未知
のアナログ入力を取り込む前に、以下の如く入力信号V
i1〜Minの0%と100%の値をそれぞれ取り込む
点が特徴である。
#! As is clear from FIG. 1, this embodiment has switches 81 to S3 and 6% random access memory (RAM) compared to the one shown in FIG. Then, the input signal V is as follows:
The feature is that the values of 0% and 100% of i1 to Min are taken in, respectively.

すなわち、まず、入力信号■11〜Minをすべて0%
にするとともに、スイッチS1を閉じてCPU5に入力
量の0%値を取り込むための指令を発する。なお、この
ときスイッチS3も閉成される。
That is, first, all input signals 11 to Min are set to 0%.
At the same time, it closes the switch S1 and issues a command to the CPU 5 to take in the 0% value of the input amount. Note that at this time, switch S3 is also closed.

これにより、マルチプレクサ2を介して各アナログ量の
0%の値がディジタル量に変換されて取り込まれるので
、メモリ6ではこれらの各ディジタル量を順次記憶する
。次いで、入力信号Vil〜Vi。
As a result, the 0% value of each analog quantity is converted into a digital quantity and taken in via the multiplexer 2, and the memory 6 sequentially stores these digital quantities. Next, input signals Vil-Vi.

をすべて100%にした後、スイッチSmは開放し、ス
イッチS 2 s S 3を閉成すると、CPU5には
入力信号の100%値を取り込むための指令が発せられ
るので、上記と同様にして入力信号の100%の値(デ
ィジタル量)がメモリ6に順次記憶される。なお、その
後はスイッチS3を開くことによって、メモリ6への再
書込みを阻止するとともにデータの消滅を防止するよう
にしている。
After setting all values to 100%, the switch Sm is opened and the switch S2sS3 is closed. A command is issued to the CPU 5 to take in the 100% value of the input signal, so the input signal is input in the same manner as above. 100% values (digital quantities) of the signals are sequentially stored in the memory 6. Note that after that, by opening the switch S3, rewriting to the memory 6 is prevented and data is prevented from disappearing.

このよ5にして得られた、任意の点における0%、10
0%時のディジタル量をそれぞれPOlPlooとし、
また、これに対応する理論値をそれぞれDO,Dloo
とし、さらに、この点にその後入力される未知の量をP
xとすると、そのときの理論値Dxは、 として求められることがわかる。これは、第2図のグラ
フからも明らかであるが、直線Bの如く得られる測定値
(Po z Ploo )を、直線人の如き理論値(D
o 、 Dloo )に換算したものということができ
、簡単な比例関係を利用して求めることができる。この
とき、各人力点におけるオペアンプの特性等が異なれば
、その測定値POp P 100  も互(・に異なる
ことになるので、未知の量Pxが同じであっても、得ら
れる理論値Dxは各入力点毎に異なることは云う迄もな
い。また、上式からも明らかなよ5に、理論IDxを求
めるに当たってゼロ点とスパン点との差を演算している
ことから、その途中に存在するドリフトまたはオフセッ
ト量が相殺されるため、正確な演算が可能となるもので
おる。
0% at any point, 10 obtained in this way
Let the digital amount at 0% be POlPloo,
In addition, the corresponding theoretical values are DO and Dloo, respectively.
Furthermore, the unknown quantity that will be input later at this point is P
Assuming that x, it can be seen that the theoretical value Dx at that time can be obtained as follows. This is clear from the graph in Figure 2, but the measured value (Po z Ploo ) obtained like the straight line B is converted to the theoretical value (D
o, Dloo), and can be obtained using a simple proportional relationship. At this time, if the characteristics of the operational amplifier at each human power point are different, the measured values POp P 100 will also be different from each other, so even if the unknown quantity Px is the same, the obtained theoretical value Dx will be different from each other. Needless to say, it is different for each input point.Also, as is clear from the above equation, since the difference between the zero point and the span point is calculated when calculating the theoretical IDx, there are Since the amount of drift or offset is canceled out, accurate calculation is possible.

第3図はこの発明の他の実施例を示す構成図である。FIG. 3 is a block diagram showing another embodiment of the present invention.

これは、同図からも明らかなように、第1図に示される
如きオペアンプ11〜1nおまび抵抗器RotR12s
 R13〜Rn1 p ELn2 J Rn3を取り除
き、大幅なコストダウンを図るようにした点が特徴であ
り、その他は第1図と同様である。
As is clear from the same figure, the operational amplifiers 11 to 1n and resistors RotR12s as shown in FIG.
The feature is that R13 to Rn1 p ELn2 J Rn3 are removed to achieve a significant cost reduction, and the rest is the same as in FIG. 1.

なお、上記いずれの実施例においても、メモリに格納さ
れるゼロ、スパンデータを適宜に更新することにより、
経年変化等によるドリフトの影響をも除去することが可
能である。
In any of the above embodiments, by appropriately updating the zero and span data stored in the memory,
It is also possible to eliminate the influence of drift due to aging and the like.

〔発明の効果〕〔Effect of the invention〕

この発明によれば、各入力アナログ量のゼロ。 According to the invention, zero of each input analog quantity.

スパン点のデータを計測して記憶し、この計測データと
それに対応する理論値とを用(・て未知アナログ量の理
論値を求めるようにしたから、人手または機械による調
整部品とそのための作業が省略されるばかりでなく、コ
ストダウンが図られる利点がもたらされるものである。
Data at span points is measured and memorized, and this measured data and the corresponding theoretical value are used to determine the theoretical value of the unknown analog quantity, which eliminates the need for manual or mechanical adjustment parts and the associated work. This has the advantage of not only being omitted but also reducing costs.

また、未知のアナログ量を演算により理論値に変換する
ようにしているので、途中に介在する回路のドリフトま
たはオフセットを除去することができる。さらには、メ
モリに格納されるゼロ、スパンデータを適宜に更新する
ことにより、経年変化等にもとづくドリフトの影響をも
除去することが可能である。
Furthermore, since the unknown analog quantity is converted into a theoretical value by calculation, it is possible to remove the drift or offset of the intervening circuit. Furthermore, by appropriately updating the zero and span data stored in the memory, it is possible to eliminate the influence of drift due to aging and the like.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の実施例を示す構成図、第2図はこの
発明による換算操作を説明するためのグラフ、第3図は
この発明の他の実施例を示す構成図、第4図は従来例を
示す構成図である。 符号説明 1(11〜’n)、3・・・・・・演算増幅器(オペア
ンプ)、2・・・・・・マルチプレクサ、4・・・・・
・アナログ/ディジタル(A/D )変換器、5・・・
・・・ディジタル処理装置(マイクロコンピュータ)、
6・・・・・・ランダムアクセスメモリ、T I ’=
 Tn・・・・・・入力信号端子、R11p R12t
 R13〜RHI x Rn2 y Rn3 ”””抵
抗、R14p R15〜Rn4 J Rn5 ”曲可変
抵抗、81−83・・・・・・スイッチ。 代理人 弁理士 並 木 昭 夫 代理人 弁理士 松 崎    清 第 1 図 第 3 図
FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a graph for explaining the conversion operation according to the present invention, FIG. 3 is a block diagram showing another embodiment of the present invention, and FIG. FIG. 2 is a configuration diagram showing a conventional example. Code explanation 1 (11~'n), 3... operational amplifier, 2... multiplexer, 4...
・Analog/digital (A/D) converter, 5...
...Digital processing device (microcomputer),
6...Random access memory, T I '=
Tn...Input signal terminal, R11p R12t
R13 ~ RHI x Rn2 y Rn3 """ Resistor, R14p R15 ~ Rn4 J Rn5 "Variable resistance, 81-83...Switch. Agent Patent Attorney Akio Namiki Agent Patent Attorney Kiyota Matsuzaki Figure 1 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 複数箇所のアナログ信号を順次選択し各々をディジタル
値に変換してディジタル処理装置に取り込むための多点
アナログ入力装置において、該処理装置により前もつて
読み込まれる各アナログ信号のゼロ点およびスパン点の
ディジタル値をそれぞれ記憶する記憶手段と、該記憶さ
れた値とそれぞれに対応する理論値とからその後に入力
される未知アナログ信号の理論値を算出する演算手段と
を設けてなることを特徴とする多点アナログ入力装置。
In a multi-point analog input device for sequentially selecting analog signals from multiple locations, converting each into digital values, and inputting them into a digital processing device, the zero point and span point of each analog signal read in advance by the processing device are It is characterized by comprising a storage means for storing each digital value, and an arithmetic means for calculating a theoretical value of an unknown analog signal to be inputted thereafter from the stored value and the corresponding theoretical value. Multipoint analog input device.
JP12760084A 1984-06-22 1984-06-22 Multipoint analog input device Pending JPS617918A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12760084A JPS617918A (en) 1984-06-22 1984-06-22 Multipoint analog input device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12760084A JPS617918A (en) 1984-06-22 1984-06-22 Multipoint analog input device

Publications (1)

Publication Number Publication Date
JPS617918A true JPS617918A (en) 1986-01-14

Family

ID=14964093

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12760084A Pending JPS617918A (en) 1984-06-22 1984-06-22 Multipoint analog input device

Country Status (1)

Country Link
JP (1) JPS617918A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6225317A (en) * 1985-07-26 1987-02-03 Hitachi Ltd Analog input device
JPH08110300A (en) * 1994-10-07 1996-04-30 Agency Of Ind Science & Technol Dew point measuring instrument utilizing slab light waveguide

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5667442A (en) * 1979-11-06 1981-06-06 Nec Corp Data collector
JPS56116146A (en) * 1980-02-15 1981-09-11 Toyoda Mach Works Ltd Collector of measuring signal

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5667442A (en) * 1979-11-06 1981-06-06 Nec Corp Data collector
JPS56116146A (en) * 1980-02-15 1981-09-11 Toyoda Mach Works Ltd Collector of measuring signal

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6225317A (en) * 1985-07-26 1987-02-03 Hitachi Ltd Analog input device
JPH08110300A (en) * 1994-10-07 1996-04-30 Agency Of Ind Science & Technol Dew point measuring instrument utilizing slab light waveguide

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