JPS6178440U - - Google Patents
Info
- Publication number
- JPS6178440U JPS6178440U JP16322684U JP16322684U JPS6178440U JP S6178440 U JPS6178440 U JP S6178440U JP 16322684 U JP16322684 U JP 16322684U JP 16322684 U JP16322684 U JP 16322684U JP S6178440 U JPS6178440 U JP S6178440U
- Authority
- JP
- Japan
- Prior art keywords
- input terminal
- circuit
- input
- terminal
- reference voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第１図は本考案の一実施例のブロツク図、第２
図は第１図に示す実施例の詳細回路の一例を示す
回路図、第３図は第２図に示すスレシヨールド回
路の詳細回路の一例を示す回路図である。
１……入力端子、２……出力端子、３……スレ
シヨールド回路、４……スイツチ回路、５……イ
ンピーダンス変換器、６，７……制御信号。
Fig. 1 is a block diagram of an embodiment of the present invention;
1 is a circuit diagram showing an example of a detailed circuit of the embodiment shown in FIG. 1, and FIG. 3 is a circuit diagram showing an example of a detailed circuit of the threshold circuit shown in FIG. 2. 1... Input terminal, 2... Output terminal, 3... Threshold circuit, 4... Switch circuit, 5... Impedance converter, 6, 7... Control signal.
Claims (1)
れるスイツチ回路とインピーダンス変換器と、前
記入力端子に入力端子が接続し前記入力端子への
入力電圧が一定のしきい値レベル以上の場合には
前記スイツチ回路を導通状態にして前記入力端子
に入力された電圧を前記出力端子へ導き前記入力
端子への入力電圧が前記一定のしきい値レベルよ
り低い場合には前記スイツチ回路を非導通状態と
し前記インピーダンス変換器を動作状態にして前
記インピーダンス変換器を介して前記入力端子に
入力された電圧を前記出力端子へ導くスレシヨー
ルド回路とを含むことを特徴とするＡ／Ｄ変換器
の基準電圧入力回路。 (2) インピーダンス変換器が正転入力端子と反
転入力端子と制御入力端子とを有する差動増幅器
で構成され、前記正転入力端子が基準電圧入力回
路の入力端子に接続し、前記反転入力端子が前記
基準電圧入力回路の出力端子に接続し前記制御入
力端子がスレシヨールド回路の第１の制御出力端
子に接続し、前記スレシヨールド回路の第２の制
御出力端子がスイツチ回路の制御入力端子に接続
する実用新案登録請求の範囲第(1)項記載のＡ／
Ｄ変換器の基準電圧入力回路。 (3) スレシヨールド回路がシステリシスを有す
る回路である実用新案登録請求の範囲第(1)項記
載のＡ／Ｄ変換器の基準電圧入力回路。[Claims for Utility Model Registration] (1) A switch circuit and an impedance converter connected in parallel between an input terminal and an output terminal, an input terminal connected to the input terminal, and an input voltage to the input terminal If the voltage is above a certain threshold level, the switch circuit is made conductive and the voltage input to the input terminal is guided to the output terminal so that the voltage input to the input terminal is lower than the certain threshold level. and a threshold circuit that sets the switch circuit in a non-conducting state, sets the impedance converter in an active state, and guides the voltage input to the input terminal via the impedance converter to the output terminal. A reference voltage input circuit for an A/D converter. (2) The impedance converter is composed of a differential amplifier having a normal input terminal, an inverted input terminal, and a control input terminal, and the normal input terminal is connected to the input terminal of the reference voltage input circuit, and the inverted input terminal is connected to the input terminal of the reference voltage input circuit. is connected to an output terminal of the reference voltage input circuit, the control input terminal is connected to a first control output terminal of a threshold circuit, and a second control output terminal of the threshold circuit is connected to a control input terminal of a switch circuit. A/ as stated in paragraph (1) of claims for utility model registration
Reference voltage input circuit for D converter. (3) A reference voltage input circuit for an A/D converter according to claim (1), wherein the threshold circuit is a circuit having systeresis.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16322684U JPS6178440U (en) | 1984-10-29 | 1984-10-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16322684U JPS6178440U (en) | 1984-10-29 | 1984-10-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6178440U true JPS6178440U (en) | 1986-05-26 |
Family
ID=30721085
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16322684U Pending JPS6178440U (en) | 1984-10-29 | 1984-10-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6178440U (en) |
-
1984
- 1984-10-29 JP JP16322684U patent/JPS6178440U/ja active Pending
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