JPS6177413A - Surface acoustic wave device - Google Patents

Abstract

PURPOSE:To improve the entire efficiency of elements by splitting an output gate electrode into plural number and providing plural number of independently adjustable DE bias circuits. CONSTITUTION:The output gate electrode 5' is split into plural number in a direction typing signal input transducers 4a, 4b provided in the vicinity of both ends of the electrodes. A bias voltage optimum to the C-V characteristic beneath each electrode 5' is applied from DC bias power supplies 7' equalin its number to the independently adjustable electrode 5'. Then a signal processed at mutual acting region is added at a signal in the region beneath the electrodes 5' and outputted via a DC blocking capacitor 8'. Since the optimum bias is applied at each split unit region, the entire efficiency of the element is improved.

Description

Detailed Description of the Invention [Field of Application of the Invention] The present invention relates to a monolithic surface acoustic wave (hereinafter referred to as SA
It is abbreviated as W. ) devices, in particular SAW convolvers or correlators.

[Background of the invention]

There are SAW convolvers and SAW correlators as small and lightweight signal processing e&function devices that utilize SAWypt. These can be roughly divided into separation medium type and monolithic type based on their structure, but the monolithic type is particularly popular from the viewpoint of productivity and efficiency. In a monolithic SAW convolver or correlator that combines a semiconductor substrate and a piezoelectric film, its signal processing function is generated by nonlinear interaction between the SAW and a space charge layer on the semiconductor surface. In order to utilize this effect, a conventional semiconductor substrate 1. shown in FIGS. 3 and 4 has been used. @A structure having a piezoelectric film 2 provided thereon via an edge #aV, signal input transducers 4a and 4b provided near both ends on the surface of the piezoelectric film 20, and a gate electrode 5 for outputting a processed signal. It is used. Third
In the figure, 6 is a Todoroki electrode, in Figure 4, 7 is a variable DC bias power supply, 8 is a DC blocking capacitor, 9a, 9b and 9C are matching circuits, 10a and 10b are signal sources, and 11 is a External load resistance χ table for fault signal output.

In this structure, nonlinear interaction takes place in a region directly below the gate electrode &5 (hereinafter referred to as an interaction region in this specification), and the output is extracted from between the gate electrode 5 and the surface electrode 60. The strength of the interaction is determined by the capacity-voltage % characteristic (
Since it depends on C-V%), it changes greatly depending on the DC bias voltage applied between the gate electrode 5 and the grounded back electrode 6. Therefore, in the traditional method, Gate! It has been common practice to apply a bias voltage whose maximum value Y, which is the total output added within the pole, as the optimum bias, to uniformly apply it to the entire interaction region to perform the operation.

However, the C-v% characteristic within the interaction region is usually not uniform (and has an in-plane distribution), so when the interaction region is lengthened for the purpose of increasing the signal processing ability of the device, etc. In the method of applying a uniform bias voltage to the entire region as in the above method, the applied bias may not be optimal for all parts of the region due to the distribution of the C-■ characteristics, and the optimum operating temperature for the device cannot be determined. This is an issue that cannot be ignored.

[Purpose of the invention]

The purpose of the present invention is to improve the overall device efficiency.
1 m, it is possible to distribute the DC bias voltage in the nonlinear interaction region of the element in accordance with the distribution of C-v%. It is to provide SAW & Y of the food items mentioned above.

[Summary of the invention]

In order to achieve the above object, a SAW folding device according to the present invention, a semiconductor substrate, and a pressure 1 provided on the surface thereof are provided. The signal input transducer χ is inserted between the membrane and the signal input transducer provided near both ends on the surface thereof, and the signal input transducer χ on the surface. (Multiple output gate electrodes pointed in the connecting direction and the above-mentioned multiple output gate electrodes)! In an advantageous embodiment of the invention, the semiconductor substrate comprises a plurality of DC bias sources connected to each of the poles and which can be adjusted independently. The piezoelectric film is a silicon single crystal formed on one main surface of the sapphire quasicrystal, and the piezoelectric film is a zinc oxide film formed on a silicon dioxide layer formed on the silicon crystal surface or the silicon film. This is an aluminum nitride film formed on the crystal surface.

Below, with reference to the drawings, the present invention will be described using examples.
Although detailed explanations will be given in Section 7, these are merely examples, and it goes without saying that various modifications and improvements may be made without going beyond the scope of the present invention.

[Embodiments of the invention]

FIG. 1 is a top view of the SAW device according to the present invention.
Reference numbers common to the figures indicate the same parts as in FIG. 4, and I is divided into multiple parts according to the invention. As seen in FIG. 1, in the SAW device according to the present invention, the output gate! The other 5' is both 14
Signal input transducer 4a provided nearby
It is divided into a plurality of parts in the direction connecting 4-by-y with the gate electrode 5', and can be adjusted independently for each part.The same number of DC biases as the gate electrodes 5' are applied from the source 7'' to the C-v% characteristics directly under each electrode 5'. The optimum bias voltage is applied to the interaction region.The signals processed in the interaction region are summed at each gate electrode for each signal in the region directly below the divided gate electrode 5'. It is output via 8゛.

The present invention relates to a monolithic type SAW convolver or correlator, in which a conductive substrate 1 and a pressure membrane 3 are connected.
This assumes a layered structure element with When considering the operating efficiency or temperature characteristics of the element, integration with IC, etc., the structure should be ZnO/5i02/Si or ZnO/5iOz/Si/AA203 or A! N/Si or A! N/Si/A-203 is advantageous. Here, AJzOa is a single crystal of sapphire, and Si is silicon j! ! represents a crystal, ZnO and A
7N is a piezoelectric film.

FIG. 2 is a top view of a SAW device according to one embodiment of the present invention. Not only the capacitor 8, but also the matching circuit 9cl and the output external load resistor 11' are divided corresponding to the output gate electrode 5'. With this implementation, the output can be taken independently for each gate voltage.

[Effect between lights]

As explained above, according to the present invention, the monolithic type S
In an AW convolver or correlator, the output gate electrode is divided into multiple parts, so the divided goo)! The applied bias can be adjusted independently for each pole as the smallest unit area. Therefore, for the distribution of C-V% in the nonlinear interaction region of the device, the optimum bias in that region can be adjusted for each unit region. Since it can be selectively applied, the overall device efficiency can be increased as well.

[Brief explanation of the drawing]

1 and 2 are top views of SAW tearing apparatuses according to two different embodiments of the present invention and schematic diagrams of their peripheral circuits, FIG. 3 is a sectional view of a conventional SAW apparatus, and FIG. 4 is a conventional FIG. 2 is a top view of the SAW device and a schematic diagram of its peripheral circuit. 1... Thousand conductor substrate, 2... Piezoelectric film, 3... - Absent R film, 4a, 4b... Transducer for signal input, 5.
5'... Output gate electrode, 6... Back electrode, 7.
7'...DC bias power supply, 8.8'...DC blocking capacitor, 9 a+ 9 b, 9 c,
9 c-matching circuit, 10a, 10b...signal source, 11
．． 11...External load resistance for signal output.

Claims (3)

[Claims] (1) A semiconductor substrate, a piezoelectric film provided on one main surface thereof, signal input transducers provided near both ends of the surface, and the signal input transducers on the surface. a plurality of output gate electrodes arranged in a direction connecting the signal input transducer in the area where the input signal is input; and a plurality of output gate electrodes that are connected to each of the plurality of output gate electrodes and can be adjusted independently. A surface acoustic wave device comprising a DC bias power supply. (2) The semiconductor substrate is a silicon single crystal formed on one main surface of a silicon single crystal or a sapphire single crystal, and the piezoelectric film is formed on a silicon dioxide insulating layer formed on the silicon single crystal surface. 2. The surface acoustic wave device according to claim 1, wherein the surface acoustic wave device is a zinc oxide film. (3) The semiconductor substrate is a silicon single crystal formed on one principal surface of a silicon single crystal or a sapphire single crystal, and the piezoelectric film is an aluminum nitride film formed on the silicon single crystal surface. A surface acoustic wave device according to claim 1.