JPS617698A - Method of producing multilayer circuit board - Google Patents

Method of producing multilayer circuit board

Info

Publication number
JPS617698A
JPS617698A JP12864784A JP12864784A JPS617698A JP S617698 A JPS617698 A JP S617698A JP 12864784 A JP12864784 A JP 12864784A JP 12864784 A JP12864784 A JP 12864784A JP S617698 A JPS617698 A JP S617698A
Authority
JP
Japan
Prior art keywords
wiring circuit
substrate
metal foil
sheet
adhesive resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12864784A
Other languages
Japanese (ja)
Inventor
宏 荒木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SAKAI DENSHI KOGYO KK
Original Assignee
SAKAI DENSHI KOGYO KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SAKAI DENSHI KOGYO KK filed Critical SAKAI DENSHI KOGYO KK
Priority to JP12864784A priority Critical patent/JPS617698A/en
Publication of JPS617698A publication Critical patent/JPS617698A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は主としてハイブリッドIC用の多層配線板の製
造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention mainly relates to a method of manufacturing a multilayer wiring board for a hybrid IC.

(従来技術) 一般にハイブリッドIC用の多層配線板としては、放熱
性に優れたものが良く、そのため該配線板の基板として
、従来では絶縁性及び放熱性に優れているセラミックが
用いられているのであって、又その製造方法としては、
該セラミック製の基板上に銀パラジュウムから成る導電
性−の塗料を印刷して焼結により配線回路を形成する工
程と、該配線回路上に低融点ガラスから成る塗料を塗っ
て焼結により前記配線回路上に絶縁層を形成する工程と
から成り、これら工程を所定回数繰り返すことにより多
層配線板を形成している。
(Prior Art) In general, multilayer wiring boards for hybrid ICs should have excellent heat dissipation properties, and for this reason, ceramics, which have excellent insulation and heat dissipation properties, have conventionally been used as substrates for such wiring boards. There is, and the manufacturing method is as follows.
A step of printing a conductive paint made of silver palladium on the ceramic substrate and sintering it to form a wiring circuit, and applying a paint made of low melting point glass on the wiring circuit and sintering it to form the wiring circuit. A multilayer wiring board is formed by repeating these steps a predetermined number of times.

(発明が解決しようとする問題点) ところが以上の製造方法では、前記各工程における塗料
の焼結に、例えば400度ないし600度での高温処理
作業を行わなければならす、該高温処理を行う設備に多
額の費用を必要とし、従ってOIS記配線板の製造コス
トか高くなっていたのであり、又前述のごとく配線板の
基板として大きくて平滑なものが得にくいセラミンクを
用いているので、大型の多層配線板を形成することが難
しかったのてあ゛る; (問題点を解決するための手段) しかして本発明は以上の問題点を解決するため、多層配
線板の基板として、大きくて平滑なものが簡単に入手で
き、しかもセラミ’lりに比較し格段に安価である金属
板を利用すると共に、該金属製の基板に絶縁性の接着樹
脂層を介して金属箔を接着するとともに一該金属箔上に
工・ソチングレジスト膜を施してエツチング処理により
配線回路を形成する工程と、絶縁性の接着樹脂層上に金
属箔を重合してなるシートに、各配線回路のランドを接
続するホールを穿設する工程と、該シートを、前記基板
」二に形成した配線回路上に、前記接着樹脂層を介して
接着する工程と、前記シートの金属箔にエツチングレジ
スト膜を施してエツチング処理により配線回路形成す−
る工程さ、前記ホールを介して各配線回路を接続する工
程とにより所望の多層配線板を安価に製造すべくなした
のである。
(Problems to be Solved by the Invention) However, in the above manufacturing method, high-temperature treatment at, for example, 400 to 600 degrees Celsius is required for sintering the paint in each of the above steps, and equipment for performing the high-temperature treatment is required. Therefore, the manufacturing cost of the OIS printed wiring board was high.Also, as mentioned above, since ceramics are used as the substrate for the wiring board, which is difficult to obtain large and smooth ones, it is difficult to obtain large and smooth ones. It has been difficult to form a multilayer wiring board; (Means for solving the problem) However, in order to solve the above problems, the present invention aims to form a large and smooth substrate for a multilayer wiring board. In addition to using a metal plate that is easily available and much cheaper than ceramic, a metal foil is bonded to the metal board via an insulating adhesive resin layer. A step of forming a wiring circuit by applying an etching resist film on the metal foil and etching it, and connecting the lands of each wiring circuit to a sheet made by polymerizing the metal foil on an insulating adhesive resin layer. a step of adhering the sheet onto the wiring circuit formed on the substrate through the adhesive resin layer; and applying an etching resist film to the metal foil of the sheet and etching it. Wiring circuits are formed through processing.
This was done in order to manufacture a desired multilayer wiring board at low cost by the process of connecting each wiring circuit through the holes.

(実  施  例  ) 以下本発明の詳細な説明する。(Example ) The present invention will be explained in detail below.

まず、」−下両面を平滑面とした厚さ1mmのアルミ金
属からなる基板(1)を形成し、該基板(1)上に、絶
縁効果に優れた未硬化の接着用樹脂フィルム(2)〈ニ
ッカン工業株式会社製の商品名5AF−40>を仮接着
した」二で、更に該フィルム(2)上に、厚さ35μの
銅箔(3)を重ね合わせた後、気泡抜き及び熱圧着を行
うことで前記接着用樹脂フィルム(2)を硬化させて、
第1図に示すごと(前記銅箔(3)を該樹脂フィルム(
2)を介して前記基板(1) −Lに接着する。
First, a substrate (1) made of aluminum metal with a thickness of 1 mm with smooth lower surfaces is formed, and an uncured adhesive resin film (2) with excellent insulation effect is formed on the substrate (1). <Product name 5AF-40 manufactured by Nikkan Kogyo Co., Ltd.> was temporarily bonded. After layering a copper foil (3) with a thickness of 35μ on the film (2), air bubbles were removed and thermocompression bonded. By performing the above, the adhesive resin film (2) is cured,
As shown in Figure 1 (the copper foil (3) is
2) is bonded to the substrate (1)-L via the substrate (1)-L.

そして該銅箔」二にエツチングレジスト膜を施して、周
知のエツチング処理作業により第2図に示すごとく所定
の配線回路(4)を形成する。
Then, an etching resist film is applied to the copper foil 2, and a predetermined wiring circuit (4) is formed as shown in FIG. 2 by a well-known etching process.

以ににより(A)工程を終了する。This completes step (A).

一方、前記き同様の絶縁性に優れた未硬化の接着用樹脂
フィルム(5)〈ニノカン工業株式会社製の商品名5A
F−40>J乙に同じく厚さ35μの銅箔(6)を仮圧
着した/−ト(7)を荊成する。
On the other hand, an uncured adhesive resin film (5) with excellent insulation properties similar to the above (trade name 5A manufactured by Ninokan Kogyo Co., Ltd.)
F-40>J A copper foil (6) with a thickness of 35 μm is also temporarily crimped to form a /-t (7).

そして前記ソート(7)に後記のごとく形成する配線回
路(9)と前記基板(1)上に形成した前記配線回路(
4)とを接続するためのホール(8) ・・を、前記シ
ートの所定位置に、第3図に示すようにドリリングもし
くはプレス加工により穿設する。
Then, in the sorting (7), a wiring circuit (9) formed as described below and a wiring circuit (9) formed on the substrate (1) are formed.
Holes (8) for connecting with the sheet (4) are bored at predetermined positions in the sheet by drilling or pressing as shown in FIG.

以上により(B)工程を終了する。With the above steps, the step (B) is completed.

次に前記(B)工程で形成した前記シート(7)を前記
基板(1)における配線回路(4)の所定位置に重ねた
後、気泡抜きと熱圧着により前記フィルム(7)の樹脂
フィルム(5)を硬化させることで、第4図に示すごと
く前記シート(7)、換言すれば該/−)(7)の銅箔
(6)を前記フィルム(5)を介して前記基板(1)に
固定する。
Next, after overlapping the sheet (7) formed in the step (B) at a predetermined position of the wiring circuit (4) on the substrate (1), the resin film (7) of the film (7) is removed by removing air bubbles and thermocompression bonding. 5), the sheet (7), in other words, the copper foil (6) of the /-) (7) is cured, as shown in FIG. Fixed to.

以」二により(C)工程を終了する。Step (C) is completed by the following steps.

そして、前記シート(7)の銅箔(6)」−にエツチン
グレジスト膜を施して、前記と同様エツチング処理作業
で、第5図に示すごとく所定の配線回路(9)を形成す
る。
Then, an etching resist film is applied to the copper foil (6) of the sheet (7), and a predetermined wiring circuit (9) is formed as shown in FIG. 5 by the same etching process as described above.

以上により(D)工程を終了する。With the above, step (D) is completed.

しかして前述のごとくして前記基板(1)J:に複数の
配線回路(4)(9)を積層したならば、最後に第6図
に示すごとく前記ホール(8)・・・内に半田(■0)
を充填して、前記各配線回路(4)及び(9)を所定部
位で接続するのである。
When a plurality of wiring circuits (4) and (9) are laminated on the board (1) J: as described above, finally the holes (8) are filled with solder as shown in FIG. (■0)
The wiring circuits (4) and (9) are connected at predetermined locations.

以上により(E)工程を終了する。With the above, step (E) is completed.

以」ユのごとく(A)工程から順次(B)(C)(D)
(E)工程を行うことで、所定数の配線回路を備えた多
層配線板を形成することができる。
(A) Sequentially from the process (B) (C) (D)
By performing the step (E), a multilayer wiring board including a predetermined number of wiring circuits can be formed.

尚、以上の実施例では、2つの配線回路i、)(9)を
有する多層配線板を形成したが、これに限定されるもの
ではなく、例えば3つの配線回路を備えた配線板とする
場合には、前記(B)工程により更に別途形成したソー
トを、前記実施例における前記基板(1)上の前記配線
回路(9)上に(C)工程により接着して該ソートの銅
箔にCC)(D)工程により3番目の配線回路を形成し
た後、連通ずる両/−ト間のホールを介して各配線回路
を接続する(E)工程を行えばよい。
Incidentally, in the above embodiment, a multilayer wiring board having two wiring circuits i, In this case, the sort formed separately in the step (B) is adhered to the wiring circuit (9) on the substrate (1) in the embodiment in the step (C), and the copper foil of the sort is coated with CC. ) After forming the third wiring circuit in step (D), step (E) may be performed in which each wiring circuit is connected through the hole between the two communicating holes.

又前記実施例で゛は、(E)工程においてキロ1(10
)により前記ホールを介して前記各配線回路を接続して
いるが、これに限定されるものではなく、例えば、導電
性樹脂を前記ホール(8)に充填して硬化させることで
、該導電性樹脂を介して前記各配線回路を接続してもよ
い。
Further, in the above embodiment, ゛ is 1 kg (10 kg) in step (E).
), the wiring circuits are connected through the holes, but the invention is not limited to this. For example, by filling the holes (8) with conductive resin and curing them, the conductive resin The respective wiring circuits may be connected via resin.

又以」二の実施例では(A)→(B)→(C)→(D)
→(E)工程の順で多層配線板を製造するようにしてい
るが、これに限定されるものではなく、例えば(A)→
(B)→(D)呻(、C)→(E)工程の順で製造して
もよい。
In the second embodiment, (A) → (B) → (C) → (D)
→ (E) Although the multilayer wiring board is manufactured in the order of the process, it is not limited to this. For example, (A) →
It may be manufactured in the order of steps (B) → (D), C) → (E).

又以上の実施例では基板にアルミ板を使用したが、これ
に限定されるものではなく、例えばステンレス板や鉄板
を用いてもよい。
Further, in the above embodiments, an aluminum plate was used as the substrate, but the substrate is not limited to this, and for example, a stainless steel plate or an iron plate may be used.

(発明の効果) 以上のごとく本発明による製造方法で製造された多層配
線板は、従来のように高温を必要とする焼結作業が必要
でないので、それだけ設備投資費が少なくてすみ、又大
きくて平滑なものが簡単に入手出来しかも放熱性に優れ
ている金属板を基板として用いているので、ハイブリッ
ドIC用に適した大型の多層配線板を安価に提供できる
に至ったのである。
(Effects of the Invention) As described above, the multilayer wiring board manufactured by the manufacturing method of the present invention does not require sintering work that requires high temperatures as in the past, so the equipment investment cost is reduced accordingly, and the Since the substrate is a metal plate that is easily available, smooth and has excellent heat dissipation, it has become possible to provide a large multilayer wiring board suitable for hybrid ICs at a low cost.

【図面の簡単な説明】[Brief explanation of drawings]

第1図から第6図は本発明の製造方法により製造される
多層配線板の各工程における概略断面図である。 (1)・・・・・・基板 (2)・・・・・・接着樹脂層 (3)・・・・・・金属箔 (4)・・・・・・配線回路 (7)・・・・・・ソート (8)・・・・・・ホール (9)・・・・・・配線回路 代  理  人  弁理士  津  1) 直  入箱
1図 5  第4図
1 to 6 are schematic cross-sectional views at each step of a multilayer wiring board manufactured by the manufacturing method of the present invention. (1)...Substrate (2)...Adhesive resin layer (3)...Metal foil (4)...Wiring circuit (7)... ... Sort (8) ... Hall (9) ... Wiring circuit agent Patent attorney Tsu 1) Direct delivery box 1 Figure 5 Figure 4

Claims (1)

【特許請求の範囲】[Claims] 金属製の基板に絶縁性の接着樹脂層を介して金属箔を接
着するとともに、該金属箔上にエッチングレジスト膜を
施してエッチング処理により配線回路を形成する工程(
A)と、絶縁性の接着樹脂層上に金属箔を重合してなる
シートに、各配線回路のランドを接続するホールを穿設
する工程(B)と、該シートを、前記基板上に形成した
配線回路上に、前記接着樹脂層を介して接着する工程(
C)と、前記シートの金属箔にエッチングレジスト膜を
施してエッチング処理により配線回路を形成する工程(
D)と、前記ホールを介して各配線回路を接続する工程
(E)とから成ることを特徴とする多層配線板の製造方
法。
A process of bonding a metal foil to a metal substrate via an insulating adhesive resin layer, and forming a wiring circuit by applying an etching resist film on the metal foil and performing an etching process (
A), a step (B) of drilling holes for connecting the lands of each wiring circuit in a sheet formed by polymerizing metal foil on an insulating adhesive resin layer, and forming the sheet on the substrate. a step of adhering onto the printed wiring circuit via the adhesive resin layer (
C) and the step of applying an etching resist film to the metal foil of the sheet and forming a wiring circuit by etching treatment (
A method for manufacturing a multilayer wiring board, comprising the steps of (D) and (E) connecting each wiring circuit through the holes.
JP12864784A 1984-06-21 1984-06-21 Method of producing multilayer circuit board Pending JPS617698A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12864784A JPS617698A (en) 1984-06-21 1984-06-21 Method of producing multilayer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12864784A JPS617698A (en) 1984-06-21 1984-06-21 Method of producing multilayer circuit board

Publications (1)

Publication Number Publication Date
JPS617698A true JPS617698A (en) 1986-01-14

Family

ID=14989982

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12864784A Pending JPS617698A (en) 1984-06-21 1984-06-21 Method of producing multilayer circuit board

Country Status (1)

Country Link
JP (1) JPS617698A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH036096A (en) * 1989-06-02 1991-01-11 Matsushita Electric Works Ltd Circuit board
JPH04119696A (en) * 1990-09-11 1992-04-21 Denki Kagaku Kogyo Kk Metal-base multilayered circuit board

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54157268A (en) * 1978-06-02 1979-12-12 Oki Electric Ind Co Ltd Metal plate compound multilayer flexible board

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54157268A (en) * 1978-06-02 1979-12-12 Oki Electric Ind Co Ltd Metal plate compound multilayer flexible board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH036096A (en) * 1989-06-02 1991-01-11 Matsushita Electric Works Ltd Circuit board
JPH04119696A (en) * 1990-09-11 1992-04-21 Denki Kagaku Kogyo Kk Metal-base multilayered circuit board

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