JPS6174493U - - Google Patents

Info

Publication number
JPS6174493U
JPS6174493U JP15779784U JP15779784U JPS6174493U JP S6174493 U JPS6174493 U JP S6174493U JP 15779784 U JP15779784 U JP 15779784U JP 15779784 U JP15779784 U JP 15779784U JP S6174493 U JPS6174493 U JP S6174493U
Authority
JP
Japan
Prior art keywords
signal
waveform
recording pen
electromagnetic solenoid
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15779784U
Other languages
Japanese (ja)
Other versions
JPH0615757Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP15779784U priority Critical patent/JPH0615757Y2/en
Publication of JPS6174493U publication Critical patent/JPS6174493U/ja
Application granted granted Critical
Publication of JPH0615757Y2 publication Critical patent/JPH0615757Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図と第2図は、この考案による記録用ペン
アツプダウン回路の実施例に係り、第1図はその
構成を示すブロツク線図、第2図は各部の信号波
形図、第3図はこの考案の出願前に本出願人によ
つて提案された電磁ソレノイドの一例を示す概略
的縦断面図である。 図中、10は制御信号発生回路、11はコンパ
レータ、12は基準電圧発生回路、13は微分回
路、14はコンデンサ、15は抵抗、17は電磁
ソレノイドである。
1 and 2 show an embodiment of the recording pen up-down circuit according to this invention. FIG. 1 is a block diagram showing its configuration, FIG. 2 is a signal waveform diagram of each part, and FIG. 1 is a schematic vertical cross-sectional view showing an example of an electromagnetic solenoid proposed by the applicant before the application of this invention. In the figure, 10 is a control signal generation circuit, 11 is a comparator, 12 is a reference voltage generation circuit, 13 is a differential circuit, 14 is a capacitor, 15 is a resistor, and 17 is an electromagnetic solenoid.

Claims (1)

【実用新案登録請求の範囲】 記録用のペンを保持する電磁ソレノイドに電流
方向が互いに反対な信号を加えて駆動し、上記記
録用のペンを上げ下げさせる波形記録装置の記録
用ペンアツプダウン回路において、 (イ) 上記電磁ソレノイドの応答周波数より高い
周波数でオン、オフする正極性又は負極性の直流
断続信号と上記応答周波数より低い周波数でオン
、オフし上記直流断続信号と同一極性の矩形波状
信号とを所定のタイミングで時系列的に送出する
制御信号発生回路と、 (ロ) 該制御信号発生回路からそれぞれ送出され
る上記信号に波形整形を施すためのコンパレータ
と、 (ハ) コンデンサと抵抗とを含み、上記コンパレ
ータを介して入力される上記制御信号発生回路の
信号から、上記電磁ソレノイド駆動用の電流方向
が反対な正極性と負極性の2つの直流信号を形成
する微分回路とを備えたことを特徴とする波形記
録装置の記録用ペンアツプダウン回路。
[Claim for Utility Model Registration] In a recording pen up-down circuit of a waveform recording device that drives an electromagnetic solenoid holding a recording pen by applying signals with opposite current directions to raise and lower the recording pen. (a) An intermittent DC signal of positive or negative polarity that turns on and off at a frequency higher than the response frequency of the electromagnetic solenoid, and a rectangular waveform signal that turns on and off at a frequency lower than the response frequency and has the same polarity as the intermittent DC signal. (b) a comparator for waveform shaping the signals respectively sent from the control signal generating circuit; and (c) a capacitor and a resistor. and a differentiating circuit that forms two DC signals of positive polarity and negative polarity with opposite current directions for driving the electromagnetic solenoid from the signal of the control signal generation circuit inputted via the comparator. A recording pen up-down circuit for a waveform recording device, characterized in that:
JP15779784U 1984-10-19 1984-10-19 Pen-up circuit for recording of waveform recorder Expired - Lifetime JPH0615757Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15779784U JPH0615757Y2 (en) 1984-10-19 1984-10-19 Pen-up circuit for recording of waveform recorder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15779784U JPH0615757Y2 (en) 1984-10-19 1984-10-19 Pen-up circuit for recording of waveform recorder

Publications (2)

Publication Number Publication Date
JPS6174493U true JPS6174493U (en) 1986-05-20
JPH0615757Y2 JPH0615757Y2 (en) 1994-04-27

Family

ID=30715784

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15779784U Expired - Lifetime JPH0615757Y2 (en) 1984-10-19 1984-10-19 Pen-up circuit for recording of waveform recorder

Country Status (1)

Country Link
JP (1) JPH0615757Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022142572A (en) * 2021-03-16 2022-09-30 アンリツ株式会社 Short pulse generation circuit and short pulse generation method, and sampling pulse oscilloscope using the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6987481B1 (en) * 2020-01-17 2022-01-05 東芝三菱電機産業システム株式会社 Ultrasonic atomizer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022142572A (en) * 2021-03-16 2022-09-30 アンリツ株式会社 Short pulse generation circuit and short pulse generation method, and sampling pulse oscilloscope using the same

Also Published As

Publication number Publication date
JPH0615757Y2 (en) 1994-04-27

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