JPS6174462A - Multi-scan type television receiver - Google Patents

Abstract

PURPOSE:To prevent malfunction when there are equalizing pulses and vertical pulses which double frequency of horizontal synchronizing signal and to display fine video signal by providing an equalizing pulse interval correction circuit relating to a voltage conversion circuit. CONSTITUTION:A horizontal synchronizing signal issued from a horizontal synchronizing signal input terminal 7H is inputted to a differentiation circuit 25 of a frequency/voltage conversion circuit 31 of a multi-scan type television receiver, and the half of the total of an equalizing pulse P and vertical pulse Vp of synchronizing signal is set to become equal to threshold voltage SH of a monostable multivibrator 31a. The signal from the circuit 25 is se at voltage D by a time constant of the vibrator 31a, and the pulse signal of the equalizing pulse width outputted is supplied to an LPF 31. And it is smoothed by smoothing circuit of an LFP 31b and corrects the increase of integration voltage with the equalizing pulse P and vertical pulse Vp, and outputs voltage E to an output terminal 31c, thus preventing malfunction due to the equalizing pulse P and vertical pulse Vp.

Description

Detailed Description of the Invention [Industrial Application Field] In addition to the reception of normal television broadcasting, the present invention is applicable to receiving video signals with different horizontal frequencies from a conversion device that doubles the number of horizontal scanning lines. The present invention relates to a multi-scan television receiver capable of receiving images.

[Conventional technology]

For example, in an NTSC television signal, the vertical frequency is approximately 6QHz and the horizontal frequency is approximately 15.75%.
Images are formed at kHz. In response, a conversion device has been proposed that doubles the number of scanning lines through arithmetic processing or the like to improve the quality of the received image. When using this device, the signal that will be output will have a vertical frequency of approximately 60H.
z K, the horizontal frequency is approximately 31.5 kHz.

In addition, in the output signal of a so-called high-resolution display computer, the horizontal frequency is approximately 24 kHz.
There is something about z. Furthermore, in so-called high-definition televisions, the horizontal frequency is expected to be approximately 33.75 kHz.

A multi-scan television receiver has been proposed that allows a single device to receive various video signals having different horizontal frequencies.

FIG. 5 shows an example of this multi-scanning type television receiver, and in this FIG. of/
4-When receiving a normal composite video signal from a computer, etc., the composite video signal supplied to the input terminal (1) is supplied to the RGB processing circuit (3) through the video processing circuit (2), and the red color is The three primary color signals of signal R1, green signal G, and evening color signal B are formed. In addition, the video/RGB switching signal supplied to the input terminal (4) is supplied to the gross circuit (3), whereby the three primary color signals from the selected video signal are sent to the color cathode ray tube (6) through the output circuit (5). supplied to

Further, the composite video signal from the input terminal (1) is supplied to a synchronization separation circuit (7) K, where vertical and horizontal synchronization signals are separated. Further, the switching signal from the input terminal (4) is supplied to the separation circuit (7), and the vertical synchronization signal of the video signal selected by this button is supplied to the vertical deflection circuit (8), which produces a vertical deflection. A signal is supplied to the vertical deflection yoke (9) of the force 2-cathode ray tube (6). Further, the horizontal synchronization signal of the video signal selected by the separation circuit (7) is supplied to the AFC circuit α1, and the signal from this AFC circuit αQ is transmitted to the horizontal oscillation circuit (
At the same time, a normal control signal from the mode detection circuit @ is supplied to the horizontal oscillation circuit C11). And the signal from this horizontal oscillation circuit α is the horizontal deflection circuit @
The horizontal deflection signal thus formed is supplied to the horizontal deflection yoke of the color cathode ray tube (6). Furthermore, the signal from the horizontal deflection circuit (to) is supplied to a high voltage generation circuit αQ such as a flyback transformer, and the generated high voltage is supplied to the high voltage terminal αQ of this color cathode ray tube (6), and a part of the signal is is supplied to the AFC circuit C1O.

Further, commercial power from the power input terminal αη is supplied to the power supply circuit α, and a normal voltage according to the signal from the mode detection circuit (6) is supplied to the horizontal deflection circuit (to). Also, if the commercial power from the power input terminal αη is connected to another power supply circuit (to)
The voltage generated thereby is supplied to other circuits.

As a result, a normal composite video signal is received. On the other hand, when receiving the three primary color signals of digital or analog R, G, and B signals from some personal computers, request captain demodulators, teletext demodulators, or scan converters, the input terminal ( 20R)(
20G) (20B) K The digital R, G, and B signals supplied to the input terminals (21R), (21G, and 21B) are selected by the selector switch (2). and is supplied to an RGB processing circuit (3), selected by a switching signal from an input terminal (4), and supplied to an output circuit (5).

Also, digital R, G and B from the input terminal (2O8)
The synchronizing signal of the signal and the synchronizing signal of the analog R, G, and B signals from the input terminal (218) are selected by the changeover switch 4 and supplied to the synchronization separation circuit (7), and the synchronized signal is supplied to the input terminal (4).
Vertical deflection circuit (8) and A
FC circuit αOK is supplied. Furthermore, the signal from the separation circuit (7) is supplied to the mode detection circuit (6)K, and a control signal corresponding to the frequency of the horizontal synchronization signal is formed to drive the horizontal oscillation circuit αυ, the horizontal deflection circuit (to), and the power supply circuit (1). Fed into barrels.

As a result, the three primary color signals of digital or analog R, G, and B signals are received. Furthermore, when performing so-called superimposed image reception in which R, G, and B signals are displayed superimposed on the above-mentioned normal composite video signal, the switching signal supplied to input machine (4) K is set to RGB mode. At the same time, the position of the superimposed signal supplied to the input terminal (goods), the Ys signal indicating the position and the Ym signal indicating the superimposed range are supplied to the RGB process circuit (3), and these signals are Switching between the composite video signal and the R, G, and B signals is performed between the Ys and Ym signals.

Various signals are received in the manner described above.

Furthermore, in the above device, the horizontal deflection system is specifically the sixth one.
It is configured as shown in the figure. In Figure 6, the separation circuit (
The horizontal synchronization signal from 7) is sent to the horizontal synchronization signal input terminal (7H
) is supplied to the frequency-voltage conversion circuit (3) constituting the mode detection circuit (6) to form a voltage according to the horizontal frequency. This frequency-voltage conversion circuit 01) is, for example, a horizontal synchronizing signal input terminal (7H
) is supplied to a mono multivibrator (31a) having a predetermined time constant, and the output signal of this mono multivibrator (31m) is supplied to a smoothing low-pass filter (31b), which is connected to an output terminal. At (31c), a voltage corresponding to the horizontal frequency is obtained. This voltage is supplied to a voltage controlled variable frequency oscillator (VCO) 0 forming a horizontal oscillation circuit αp through a limiter circuit 0 which determines the lower limit and a buffer amplifier (g). The oscillation output of this vCO (b) passes through the drive circuit (to) to the horizontal deflection circuit (
It is supplied to the switching transistors (g) constituting the circuits (to).

In addition, the voltage from the frequency-voltage conversion circuit G) is passed through a limiter circuit (B) that determines the upper and lower limits, and a gain control amplifier (To) to the power supply circuit (for example, a Y-Z type para7 that constitutes one frame).
) Supplied to the IJ rack source circuit (g). The output voltage of this power supply circuit shaft is fed back to the gain control amplifier (to) through the voltage divider circuit to stabilize the output voltage.

This output voltage is supplied to a 7 light pack transformer (41).

A horizontal output transistor (T) is connected in series to this flyback transformer. Further, a damper diode (6), a resonance capacitor (A), and a series circuit of a horizontal deflection yoke α◆ and a figure-8 correction capacitor are connected in parallel to this transistor (G).

Further, the horizontal synchronizing signal is supplied to the detection circuit (9) constituting the AFC circuit α1, and the signal from the voltage dividing circuit (9) provided in series with the transistor (G) is supplied to the detection circuit (9).
is supplied to form an AFC signal. This signal is supplied to the control terminal of the VCO (34) through a low pass filter (LPF) α.

Furthermore, the switch circuit (9
) through which the capacitor (6) ring is connected. In addition, a capacitor (to) is connected in parallel to the figure 8 correction capacitor through a one-switch circuit (to). Also frequency -
The voltage from the voltage conversion circuit Op is supplied to a comparison circuit (goods) for binary comparison corresponding to voltages of 20 kHz and 30 kHz of the input horizontal frequency, for example, and the voltage is 20 kHz or less, 20 ~
Comparison outputs corresponding to each range of 30 kHz and above 30 kHz are formed, and a switch circuit (
Control is performed so that both of the two switches built in the product) and the product are both turned off or one of them is turned on.

Thus, in this horizontal deflection system, vc.

(b) 15 to 34 k in synchronization with the input horizontal synchronization signal
An oscillation signal that varies in Hz is formed to perform horizontal deflection, and a voltage that varies from 58 to 123 cels, for example, depending on the horizontal frequency is generated at the power supply circuit axis, so that the amplitude of the horizontal deflection is constant. Control is performed to ensure that Further, in parallel with the resonance capacitor (to) and the figure 8 correction capacitor, capacitors (6) and 62 rings are connected according to the horizontal frequency range, and the characteristics of each are corrected.

Further, in the above-mentioned apparatus, the vertical deflection system is specifically constructed as shown in FIG. In Figure 8, the separation circuit (
The vertical synchronization signal from 7) is connected to the vertical synchronization signal input terminal (7v
) is supplied to the sawtooth wave oscillator fiK that constitutes the vertical deflection circuit (8), for example, the capacitor □□□ is connected to the current source
A sawtooth wave is formed by charging and discharging with a current of . This sawtooth wave is supplied to a binary comparison circuit (product) to form a comparison output indicating a predetermined voltage range and below or above it, and this comparison output is supplied to the control terminal of an up-down counter (UDC). be done. A vertical synchronizing signal is supplied to the counting terminal of this UDC (to). The count value of this UDC (To) is the DA conversion circuit (D
AC) (to), and the current source is controlled by the converted analog value.

Therefore, a sawtooth wave whose peak value (amplitude) is controlled within a predetermined voltage range is extracted from the sawtooth wave oscillator 6◇, regardless of the frequency of the vertical synchronization signal. This sawtooth wave is supplied to the vertical deflection yoke (9) through a vertical output amplifier circuit. Further, a series circuit including a capacitor branch and a resistor is connected in series to this vertical deflection yoke (9), and a voltage dividing circuit (to) is connected in parallel to this resistor. This voltage divider circuit (7)
The divided voltage output is supplied to the vertical output amplifier circuit (supply).

This ensures that vertical deflection always has a constant amplitude even if the vertical frequency changes. Furthermore, by making one of the resistors constituting the voltage dividing circuit fO variable, the amplitude of the vertical deflection can be arbitrarily controlled.

Furthermore, another set of circuits (oscillator (c) to DACf*) of oscillator O]) to DACM is provided, and this circuit 0DAC
The output value of f* is supplied to the pin distortion correction signal forming circuit (c), and the vertical period para? The pin distortion correction signal is supplied to a forming circuit (c) to form a pin distortion correction signal.

This signal is supplied to the pin distortion correction circuit.

Thus, in the device described above, the necessary horizontal and vertical deflections are effected according to the various different horizontal and vertical frequencies, as well as the reception of the various signals.

[Problem that the invention seeks to solve]

By the way, in this multi-scanning type television receiver, a voltage according to the horizontal synchronizing signal is generated by a frequency-voltage conversion circuit 0■ as shown in FIG. The oscillation frequency of the horizontal oscillation circuit 4 and the power supply voltage of the horizontal oscillation circuit 4 are determined, and thereby video signals with different horizontal synchronizing signal frequencies can be received well.For example, when a composite video signal of a television broadcast is being received. When K, the frequency of this horizontal synchronization signal is, for example, NT
In the case of the SC system, the frequency is approximately 15.75 kHz, but as shown in Figure 2, the equalization pulse period and vertical pulse period of this synchronization signal are approximately 15.75 kHz. The output voltage of the frequency-voltage conversion circuit G as shown in FIG. 7 is as shown in FIG. 3B.
As shown in the figure, the voltage gradually increases during the equalization pulse and vertical nodal periods, and it may be erroneously determined that the frequency of the horizontal synchronizing signal has increased. Since the time constant of the filter (31b) is selected to be relatively large, it takes time for the voltage increase during this equalization pulse period to return to a steady state, which causes problems such as horizontal synchronization being impossible. There was a risk that it would happen.

In view of this point, the present invention provides the equalization pulse P1 vertical pulse V
The purpose is to eliminate the inconvenience caused by p.

[Means for solving problems]

The present invention allows video signals with different horizontal synchronizing signal frequencies to be received by determining the deflection frequency of the horizontal deflection circuit (to) based on the output voltage of the frequency-voltage conversion circuit (01) for the horizontal synchronizing signal of the input video signal. In a multi-scanning television receiver, this frequency-voltage conversion circuit Op.
An equalization and 41 pulse period correction circuit (2) for correcting the equalization/arm pulse period is provided in connection with this.

[For production]

According to the present invention, since the equalization pulse period correction circuit is provided in connection with the frequency-voltage conversion circuit 0, it is possible to prevent malfunctions occurring during the equalization Δ pulse period.

〔Example〕

An embodiment of the multi-scan television receiver of the present invention will be described below with reference to FIG.

In FIG. 1, parts corresponding to those in FIGS. 5, 6, and 7 are designated by the same reference numerals, and detailed explanation thereof will be omitted.

In this example, the horizontal deflection system of a multi-scan television receiver as shown in FIG. 5 is constructed as shown in FIG. 6, and the frequency-voltage conversion circuit 0η is constructed as shown in FIG. It is composed of

In FIG. 1, a horizontal synchronizing signal supplied to a horizontal synchronizing signal input terminal (7H) is supplied to a mono multivibrator (31a) via a differentiating circuit (E).

In this case, when the equalization pulse period and vertical pulse period of the synchronizing signal as shown in FIG. 2A are passed through this differentiation circuit 4, the equalization pulse period and vertical pulse period as shown in FIG. The threshold voltage SH of the mono multivibrator (31m) is made to be approximately half of the sum of the equalized four pulses P and the vertical pulse Vp.

Therefore, the signal obtained at the output side of this mono multivibrator (31m) is approximately half of the sum of the equalization pulse P and vertical pulse Vp of the equalization pulse period and vertical pulse period of the synchronization signal, as shown in the second figure. A .4 pulse signal with equal pulse width determined by the time constant of the thinned out mono-multivibrator (31 m) is obtained. Therefore, on the output side of the low/4' filter (31b) that constitutes this smoothing circuit, a DC voltage is obtained which is corrected for the increase in the integrated voltage caused by the equalization i4 pulse P and the vertical pulse Vp as shown in Figure 2E. It will be done. The rest of the structure is the same as in FIGS. 5 and 6.

In this example, as described above, the signal passing through the differentiating circuit (A) is approximately half of the sum of the equalization pulse P and the vertical pulse vp of the synchronization signal of the composite video signal as shown in FIG. 2C. is less than the Sundschhold voltage SH of the mono multivibrator (31m), so the signal obtained at the output side of the mono multivibrator (31a) is equalized by the equalization pulse P and the vertical pulse vp, as shown in the second figure. The output side of the white pulse filter (31b) is a pulse signal whose number of pulses is thinned out by approximately half of the total sum.
A DC voltage corrected for the increase in integral voltage due to the equalization pulse P and vertical pulse Vp as shown in FIG. A video signal having the frequency of the horizontal synchronization signal can be received well.

Further, FIG. 3 shows another example of the main part of the present invention. Referring to FIG. 3, parts in FIG. 3 corresponding to those in FIG. 1 are designated by the same reference numerals, and detailed explanation thereof will be omitted.

In this Figure 3, a mono multivibrator (31 m
) to one fixed contact (2) of the switch (2).
6M) and the movable contact (
26 &) constitutes a smoothing circuit.
1b) is connected to the output terminal (31c), and the output side of this low/mother filter (31b) constitutes a holding circuit.The low! Connect to the other fixed contact (26H) of the changeover switch (4) via the filter (a). Further, (28a) indicates a vertical paradera signal input terminal to which a Nononora signal with a vertical period V obtained at the connection point of the vertical deflection yoke (9) and the capacitor in FIG. A 742 galley signal with a vertical period V as shown in FIG. On the output side of the comparator circuit, a control signal (28
S) is obtained, and the movable contact (283) of the changeover switch (a) is
26m). That is, during the period of this control signal (28S), the movable contact (26a) of this changeover switch (to) is connected to the other fixed contact (26H), and at other times, this movable contact (26a) is connected to one fixed contact (26H). 26M).

Since FIG. 3 is configured as described above, the control signal (28
g) When there is no ', that is, except during the vertical blanking period, the movable contact (26m) of changeover switch 4 is connected to one fixed contact (
26M) connected to the mono multivibrator (31a)
The output signal of is supplied to the low-pass filter (31b), and a voltage corresponding to the frequency of the horizontal synchronizing signal is obtained at the output terminal (31c).
) is supplied to the holding circuit (b), and during the period of the control signal (288), that is, the vertical blanking period, the movable contact (26m) of the changeover switch (g) is supplied to the other fixed contact (
26H), and at this time, the voltage held by the holding circuit K is obtained at the output terminal (311). Therefore, according to this example, as shown in FIG.・
A DC voltage that is not affected by the current pulse Vp can be obtained. Therefore, it can be easily understood that the same effects as those of the above-mentioned embodiments can be obtained in this embodiment as well.

It goes without saying that the present invention is not limited to the above-described embodiments, and that various other configurations can be made without departing from the gist of the present invention.

[1 Effect of the Invention] According to the present invention, since the equalization pulse period correction circuit is provided in connection with the frequency-voltage conversion circuit 0], the horizontal synchronizing signal 2
Even if there is an equalization pulse P1 with twice the frequency of the vertical nodalus vp, it is possible to prevent malfunctions caused by these factors, and there is an advantage that video signals with different frequencies of the horizontal synchronization signal can be switched to achieve good image reception. .

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of the essential parts of an embodiment of the multi-scan television receiver of the present invention, FIG. 2 is a diagram for explaining the present invention, and FIG. 3 is a multi-scan television receiver of the present invention. FIG. 4 is a line diagram for explaining FIG. 3; FIG. 5 is a configuration diagram showing an example of a multi-scan television receiver. , FIG. 6 and FIG. 8 are block diagrams showing an example of the main part of FIG. 5, respectively, and FIG. 7 is a block diagram showing an example of the main part of FIG. 6. (1) is composite video signal input terminal, (3) is RGB f process circuit, (5) is output circuit, (6) is color cathode ray tube, (7H) is horizontal synchronization signal input terminal, (8) is vertical deflection Circuit, (2) is horizontal deflection circuit, □□□ is differential circuit, Op
is a frequency-voltage conversion circuit, (31m) is a mono multivibrator, and (31b) is a low-north filter. Figure 4 0 old-11---=7 4M Ginkuzu-1--- Procedural amendment December 6, 1981 Patent 1pn No. t 97316 2.
'A Akira (7) Name, ,, ga scan ゎ7-L, Etsu 5
Relationship with the case of the person who makes the payment (elephant machine 3, compensation) 191 patents Address: 6-7-35, Tokyo Parts and Illustrations Name (2)
18) Sony Corporation Representative Director Norio Ohga 4, Agent Address: 1-8-1 Nishi-Shinjuku, Shinjuku-ku, Tokyo 03-
343-5821fl15 (Shinjuku Building) 6, 7ii
(1) In the specification, on page 7, lines 9 and 12 to 13, the words ``gain control amplifier (38) J'' are corrected to ``control amplifier (38) J.'' ( 2) In the drawings, Figures 6 and 8 are corrected as shown in the attached sheet.

Claims (1)

[Claims] The horizontal synchronization signal of the input video signal is supplied to a frequency-voltage conversion circuit, and the deflection frequency of the horizontal deflection circuit is determined by the output voltage of the frequency-voltage conversion circuit, thereby receiving video signals with different horizontal synchronization signal frequencies. A multi-scan television receiver characterized in that an equalization pulse period correction circuit for correcting an equalization pulse period is provided in conjunction with the frequency-voltage conversion circuit. John receiver.