JPS6174383A - Semiconductor laser array device and manufacture thereof - Google Patents
Semiconductor laser array device and manufacture thereofInfo
- Publication number
- JPS6174383A JPS6174383A JP19575984A JP19575984A JPS6174383A JP S6174383 A JPS6174383 A JP S6174383A JP 19575984 A JP19575984 A JP 19575984A JP 19575984 A JP19575984 A JP 19575984A JP S6174383 A JPS6174383 A JP S6174383A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- thin film
- multilayer thin
- mesa
- laser array
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Semiconductor Lasers (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明は、コヒーレント光源として、或いは高出力、高
密度、高輝度光源として、各種電子機器。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention is applicable to various electronic devices as a coherent light source or as a high output, high density, high brightness light source.
光学8iJaに用いられる半導体レーザアレイ装置およ
びその製造方法に関するものである。The present invention relates to a semiconductor laser array device used in optical 8iJa and a method for manufacturing the same.
(従来例の構成とその問題点)
半導体レーザアレイ装置の重要な用途の1つに高出力高
集積光源がある。これは、1チツプ内に多数のレーザ発
振領域を持ち、そのそれぞれが互いに近接し、レーザ光
の発振波長、位相等の特性が揃っている必要がある。従
来の液相エピタキシャル成長法により作製したレーザア
レイ装置では、基板につくりっけのストライプや成長エ
ピタキシャル層上でのZn拡散やプロトン照射、絶縁膜
によるストライプを用いるため、単位レーザ発振領域の
占めるチップ面精が比較的大きくなり、多数の発振領域
を適当な大きさのチップに集積するとき、その集積度は
低く、また、液相エピタキシャル、成長法を用いて作製
するため、レーザ光の発振波長のバラツキ等特性のバラ
ツキも大きくなる欠点がある。(Conventional Structure and its Problems) One of the important uses of semiconductor laser array devices is as a high-output, highly integrated light source. This requires that one chip has a large number of laser oscillation regions, each of which is close to each other, and whose characteristics such as the oscillation wavelength and phase of the laser light are uniform. Laser array devices manufactured using the conventional liquid phase epitaxial growth method use stripes formed on the substrate, Zn diffusion on the grown epitaxial layer, proton irradiation, and stripes formed by an insulating film, so that the chip surface occupied by a unit laser oscillation area is When a large number of oscillation regions are integrated into a chip of an appropriate size, the degree of integration is low, and since it is manufactured using liquid phase epitaxial and growth methods, the oscillation wavelength of the laser light There is a drawback that variations in characteristics such as variations become large.
(発明の目的)
本発明は上記欠点に鑑み、レーザ光の発振波長などの特
性のバラツキが少なく、チップ上にレーザ発振領域を大
きな集積度で集積可能な構造を有する半導体レーザアレ
イ装置およびその製造方法を提供することを目的とする
。(Object of the Invention) In view of the above-mentioned drawbacks, the present invention provides a semiconductor laser array device having a structure in which there is little variation in characteristics such as the oscillation wavelength of laser light and can integrate laser oscillation regions on a chip with a large degree of integration, and its manufacture. The purpose is to provide a method.
(発明の構成)
この目的を達成するために、本発明の半導体レーザアレ
イ装置は、半導体基板上に二重ヘテロ構造を含む多層薄
膜を設け、前記多層薄膜上に先端平坦面とその隣接側面
のなす内角が鈍角で、前記隣接側面以外の少なくとも一
側面が前記先端平坦面をなす内角が90°以下であるス
トライプ状の凸部を有し、かつ前記凸部の両側面がp−
n接合を含む多層薄膜でとり囲まれ、前記凸部直下の活
性層の共振器面および半導体接合面に平行な方向の長さ
が、2つの発振領域を持つのに十分な長さを有している
。この構成により、特性のバラツキが少なく、レーザ発
振領域を比較的大きな集積度で集積化することを可能と
する。(Structure of the Invention) In order to achieve this object, the semiconductor laser array device of the present invention provides a multilayer thin film including a double heterostructure on a semiconductor substrate, and a flat end surface and its adjacent side surface are formed on the multilayer thin film. The inner angle formed by the protrusion is an obtuse angle, and at least one side surface other than the adjacent side surface has a striped convex portion having an inner angle of 90° or less forming the flat end surface, and both side surfaces of the convex portion are p-
Surrounded by a multilayer thin film including an n-junction, the length of the active layer immediately below the convex portion in a direction parallel to the resonator plane and the semiconductor junction plane is sufficient to have two oscillation regions. ing. With this configuration, there is little variation in characteristics and it is possible to integrate the laser oscillation region with a relatively large degree of integration.
(実施例の説明)
本発明の半導体レーザアレイ装置について、一実施例を
用いて具体的に説明する。(Description of Embodiment) The semiconductor laser array device of the present invention will be specifically described using one embodiment.
半導体基板としてn型GaAs基板10(キャリア濃度
:10”■−a)を用いる。この基板上に有機金属気相
エピタキシャル成長法(以下、 MOCVD法とする。An n-type GaAs substrate 10 (carrier concentration: 10''-a) is used as a semiconductor substrate.Metalorganic vapor phase epitaxial growth (hereinafter referred to as MOCVD) is performed on this substrate.
)により、第1図に示すようにn“−GaAsバッファ
層11(キャリア濃度=10i″dl−”)を1μm、
n型Ga1−xAidxAsクラッド層12を1.5
p m、Ga1−、AらAs活性層13(O≦y(x;
y<z)を0.1μm、 p型Ga1−zAIIzAs
クラッド層14をL5ptrrエピタキシャル成長させ
た。この時のMOCVD法による結晶成長条件の一例を
示す。成長速度は2μm/時、成長温度は770℃、全
ガス流量は512/分、■族元素に対する■族元素の供
給モル比は40である。その後、第1図に示すようにp
型Ga1−zizAsクラッド層14上にピッチ300
μm、[20μmでフォトレジストマスク15を残し、
化学エツチングにより、第2図に示すような形状に加工
する。第2図でp型Ga□−2AQzAsクラッド層1
4の膜厚は中央の厚い部分が1.5μm1周辺の薄い部
分が0.3μmとなるようにする。また、第2図のリッ
ジの高さd工jd2はそれぞれ0.2μI、1.0μ腸
とした。l工はフォトレジストマスクの幅、e2はメサ
型リッジ部分の幅である。), as shown in FIG.
The n-type Ga1-xAidxAs cladding layer 12 is 1.5
p m, Ga1-, A et al. As active layer 13 (O≦y(x;
y<z) is 0.1 μm, p-type Ga1-zAIIzAs
The cladding layer 14 was grown L5ptrr epitaxially. An example of crystal growth conditions using the MOCVD method at this time is shown below. The growth rate was 2 μm/hour, the growth temperature was 770° C., the total gas flow rate was 512/min, and the molar ratio of group Ⅰ elements to group Ⅰ elements was 40. Then, as shown in Figure 1, p
The pitch is 300 on the type Ga1-zizAs cladding layer 14.
μm, [leave photoresist mask 15 at 20 μm,
It is processed into the shape shown in FIG. 2 by chemical etching. In Figure 2, p-type Ga□-2AQzAs cladding layer 1
The film thickness of No. 4 is set such that the thick part at the center is 1.5 μm and the thin part around 1 is 0.3 μm. Further, the heights d and jd2 of the ridge in FIG. 2 were set to 0.2 μI and 1.0 μI, respectively. 1 is the width of the photoresist mask, and e2 is the width of the mesa ridge portion.
なお、Ga□−1AらAs活性層13を露出しない理由
は、エツチングや結晶成長の時に損傷を避けるためであ
る。フォトレジストを除去し表面洗浄したのち、再びM
OCVD法により、第3図に示すように、n+−GaA
s電流阻止層16(キャリア濃度:10”cn−”)を
前述の成長条件で1μmの厚さでエピタキシャル成長さ
せ、さらにP”−GaAsコンタクト層17(キャリア
濃度: 5X10”an−3)を1.0μmの厚さで成
長させる。The reason why the Ga□-1A or As active layer 13 is not exposed is to avoid damage during etching or crystal growth. After removing the photoresist and cleaning the surface, apply M again.
By OCVD method, as shown in Fig. 3, n+-GaA
The s current blocking layer 16 (carrier concentration: 10"cn-") was epitaxially grown to a thickness of 1 .mu.m under the above-mentioned growth conditions, and the P"-GaAs contact layer 17 (carrier concentration: 5.times.10"an-3) was grown epitaxially to a thickness of 1.mu.m. Grow to a thickness of 0 μm.
表面洗浄の後、n型GaAs基板lOの表面およびP+
−GaAsコンタクト層17の表面にそれぞれオーミッ
ク電極18および19を形成し、第3図の構造とした。After surface cleaning, the surface of the n-type GaAs substrate IO and P+
-Ohmic electrodes 18 and 19 were formed on the surface of the GaAs contact layer 17, respectively, resulting in the structure shown in FIG.
この構造のものに電流を流すと、ストライプ状の凸部上
のn”−GaAs電流阻止層16には電流が流れない。When a current is passed through this structure, no current flows through the n''-GaAs current blocking layer 16 on the striped convex portions.
しかし、この層の両側から電流が流れ込み、p型Ga、
zA1zAsクラッド層14のストライプ状の凸部を通
して、第3図に示す活性領域20に流れ込む。However, current flows from both sides of this layer, p-type Ga,
It flows into the active region 20 shown in FIG. 3 through the striped convex portions of the zA1zAs cladding layer 14.
この時、第3図に示す、隣接する電流注入ストライプ間
の躍層dWが十分に離れておれば、活性領域20で、2
つのレーザ発振領域が形成される。70mAのしきい値
付近で2つのレーザ発振領域はほぼ同時に発振が起こり
、それぞれ安定な単−横モード発振が得られた。なお、
注入電流がストライプ状の凸部に狭さくされる理由は、
第3図でp側電極18を+、n側電極19を−にすると
、p型GaX−2izAsクラッド層14とn”−Ga
As電流阻止J’516の界面のp−n接合が逆バイア
スとなり、電流阻止の働きをするからである。また、こ
の実施例では、n”−GaAs電流阻止層16はGa1
−、AI!、As活性層13より禁止帯幅が狭いので光
を吸収し、その結果p型GaニーzAilzAsクラッ
ド514のストライプ状の凸部に光も閉じ込められるこ
ととなる。At this time, if the cline dW between adjacent current injection stripes shown in FIG.
Two laser oscillation regions are formed. The two laser oscillation regions oscillated almost simultaneously near the threshold of 70 mA, and stable single-transverse mode oscillation was obtained in each region. In addition,
The reason why the injected current is narrowed to the striped convex portion is because
In FIG. 3, when the p-side electrode 18 is set to + and the n-side electrode 19 is set to -, the p-type GaX-2izAs cladding layer 14 and the n''-Ga
This is because the p-n junction at the interface of the As current blocker J'516 becomes reverse biased and acts as a current blocker. Further, in this embodiment, the n''-GaAs current blocking layer 16 is Ga1
-, AI! Since the forbidden band width is narrower than that of the As active layer 13, it absorbs light, and as a result, the light is also confined in the striped convex portions of the p-type Ga knee zAilzAs cladding 514.
ところで1通常のレーザアレイ装置では、1つのストラ
イプ状凸部直下の活性領域では、1つのレーザ発振領域
しか得られない。この構成が基本単位となりレーザアレ
イを形成する。しかしながら本発明の場今は、上記と異
なり、2つのレーザ発振領域を持つので、同数のレーザ
発振領域を持つレーザアレイを作製すると、チップは約
半分の体積となり小型化が可能である。By the way, in a typical laser array device, only one laser oscillation region can be obtained in the active region directly under one striped convex portion. This configuration becomes a basic unit and forms a laser array. However, in the case of the present invention, unlike the above, there are two laser oscillation regions, so if a laser array with the same number of laser oscillation regions is manufactured, the volume of the chip becomes about half, and miniaturization is possible.
なお、本発明のp−n接合面を形成する材料はGaAs
系、Ga1As系以外の材料を用いてもよい。Note that the material forming the p-n junction surface of the present invention is GaAs.
Materials other than Ga1As-based and Ga1As-based may also be used.
また2本実施例では、GaAs系、GaAlAs系半導
体レーザについて述べたが、InP系や他の多元混晶系
を含む化合物半導体を材料とする半導体レーザについて
も同様に本発明を適用することが可能である。さらに導
電性基板として、p型基板を用いても、また半絶縁性基
板を用いてもよく、結晶成長方法に他の物質供給律速の
結晶成長方法、たとえば分子線エピタキシャル成長法(
通常MBE法と呼ばれる)を用いてもよい。In addition, in the two embodiments, GaAs-based and GaAlAs-based semiconductor lasers have been described, but the present invention can be similarly applied to semiconductor lasers made of compound semiconductors including InP-based and other multi-component mixed crystal systems. It is. Furthermore, as the conductive substrate, a p-type substrate or a semi-insulating substrate may be used, and the crystal growth method may include other material supply rate-limiting crystal growth methods, such as molecular beam epitaxial growth (
(usually called MBE method) may also be used.
(発明の効果)
本発明の半導体レーザアレイ装置は、低しきい値動作で
、単−横モード発振するレーザを高集積化することがで
きる4a造を有するものであり、その実用的効果は著し
い。(Effects of the Invention) The semiconductor laser array device of the present invention has a 4A structure that allows highly integrated lasers that oscillate in a single transverse mode with low threshold operation, and its practical effects are remarkable. .
第1図ないし第3図は本発明の一実施例の半導体レーザ
アレイ装置の製造過程を示す図である。
10− n型GaAs基板、11− n”−GaAsバ
ッファ層、 12・・・n型Ga□−、AlxAsクラ
ッド層、 13・・・Ga、−、AN、As活性M(0
≦y<x;y<z)、14・・・p型Ga□−、Alx
Asクラッド層、15・・・ フォトレジストマスク、
16・・・n”−GaAs電流阻止層、17− p”−
GaAsコンタクト層、18 ・p側片−ミック電極、
19・・・n側オーミック電極、20・・・活性領域、
れ・・・フォトレジストマスクの幅、e2 ・・・メサ
形リッジ部分の幅、do。
d2・・・リッジの高さ、d、・・・隣接する電流注入
ストライブ間の距離。
第1図
第2図
第3図1 to 3 are diagrams showing the manufacturing process of a semiconductor laser array device according to an embodiment of the present invention. 10- n-type GaAs substrate, 11- n''-GaAs buffer layer, 12... n-type Ga□-, AlxAs cladding layer, 13... Ga, -, AN, As active M(0
≦y<x;y<z), 14...p-type Ga□-, Alx
As cladding layer, 15... photoresist mask,
16...n"-GaAs current blocking layer, 17-p"-
GaAs contact layer, 18 ・p side piece-mic electrode,
19... n-side ohmic electrode, 20... active region,
Re: Width of photoresist mask, e2: Width of mesa-shaped ridge portion, do. d2... Height of ridge, d,... Distance between adjacent current injection stripes. Figure 1 Figure 2 Figure 3
Claims (2)
設けられ、前記多層薄膜上に先端平坦面とその隣接側面
とのなす内角が鈍角で、前記隣接側面以外の少なくとも
一側面が前記先端平坦面となす内角が90°以下である
ストライプ状の凸部が形成され、前記凸部の両側面がp
−n接合を含む多層薄膜でとり囲まれ、かつ前記凸部直
下の活性層の共振器面および半導体接合面に平行な方向
の長さが、2つの発振領域を持つのに十分な長さである
ことを特徴とする半導体レーザアレイ装置。(1) A multilayer thin film including a double heterostructure is provided on a semiconductor substrate, and an internal angle formed between a flat end surface and an adjacent side surface thereof is an obtuse angle, and at least one side surface other than the adjacent side surface is formed at the tip end. A striped convex portion having an internal angle of 90° or less with the flat surface is formed, and both side surfaces of the convex portion are p
- The length of the active layer in the direction parallel to the resonator plane and the semiconductor junction plane, which is surrounded by a multilayer thin film including an n-junction and directly under the convex portion, is long enough to have two oscillation regions. A semiconductor laser array device characterized by the following.
るとともに二重ヘテロ構造を含む多層薄膜を形成する工
程と、前記ストライプ状の凸部の両側面を、有機金属気
相エピタキシャル成長方法又は分子線エピタキシャル成
長方法を用いてp−n接合を含む多層薄膜でとり囲む工
程とを含むことを特徴とする半導体レーザアレイ装置の
製造方法。(2) forming a multilayer thin film having striped convexities on the surface and including a double heterostructure on a semiconductor substrate; 1. A method for manufacturing a semiconductor laser array device, comprising the step of surrounding the semiconductor laser array device with a multilayer thin film including a pn junction using a line epitaxial growth method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19575984A JPS6174383A (en) | 1984-09-20 | 1984-09-20 | Semiconductor laser array device and manufacture thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19575984A JPS6174383A (en) | 1984-09-20 | 1984-09-20 | Semiconductor laser array device and manufacture thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6174383A true JPS6174383A (en) | 1986-04-16 |
Family
ID=16346482
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19575984A Pending JPS6174383A (en) | 1984-09-20 | 1984-09-20 | Semiconductor laser array device and manufacture thereof |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6174383A (en) |
-
1984
- 1984-09-20 JP JP19575984A patent/JPS6174383A/en active Pending
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