JPS6167796A - プリント回路用銅箔およびその製造方法 - Google Patents

プリント回路用銅箔およびその製造方法

Info

Publication number
JPS6167796A
JPS6167796A JP18659184A JP18659184A JPS6167796A JP S6167796 A JPS6167796 A JP S6167796A JP 18659184 A JP18659184 A JP 18659184A JP 18659184 A JP18659184 A JP 18659184A JP S6167796 A JPS6167796 A JP S6167796A
Authority
JP
Japan
Prior art keywords
copper foil
chromium
copper
zinc
thin film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18659184A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0259880B2 (enExample
Inventor
Kazuyoshi Aso
阿曾 和義
Takeshi Yamagishi
山岸 武
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Denkai Co Ltd
Original Assignee
Nippon Denkai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Denkai Co Ltd filed Critical Nippon Denkai Co Ltd
Priority to JP18659184A priority Critical patent/JPS6167796A/ja
Publication of JPS6167796A publication Critical patent/JPS6167796A/ja
Publication of JPH0259880B2 publication Critical patent/JPH0259880B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Electroplating Methods And Accessories (AREA)
JP18659184A 1984-09-07 1984-09-07 プリント回路用銅箔およびその製造方法 Granted JPS6167796A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18659184A JPS6167796A (ja) 1984-09-07 1984-09-07 プリント回路用銅箔およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18659184A JPS6167796A (ja) 1984-09-07 1984-09-07 プリント回路用銅箔およびその製造方法

Publications (2)

Publication Number Publication Date
JPS6167796A true JPS6167796A (ja) 1986-04-07
JPH0259880B2 JPH0259880B2 (enExample) 1990-12-13

Family

ID=16191226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18659184A Granted JPS6167796A (ja) 1984-09-07 1984-09-07 プリント回路用銅箔およびその製造方法

Country Status (1)

Country Link
JP (1) JPS6167796A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5320919A (en) * 1990-06-08 1994-06-14 Sumitomo Bakelite Company Limited Copper foil for inner layer circuit of multi-layered printed circuit board, method of producing the same and multi-layered printed circuit board having the same
US6168703B1 (en) 1997-09-04 2001-01-02 Ga-Tek Inc. Copper foil and laminate containing a hydrogen inhibitor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5320919A (en) * 1990-06-08 1994-06-14 Sumitomo Bakelite Company Limited Copper foil for inner layer circuit of multi-layered printed circuit board, method of producing the same and multi-layered printed circuit board having the same
US6168703B1 (en) 1997-09-04 2001-01-02 Ga-Tek Inc. Copper foil and laminate containing a hydrogen inhibitor

Also Published As

Publication number Publication date
JPH0259880B2 (enExample) 1990-12-13

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